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https://github.com/AsahiLinux/u-boot
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Merge git://git.denx.de/u-boot-socfpga
This commit is contained in:
commit
28824407f3
6 changed files with 56 additions and 17 deletions
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@ -89,7 +89,7 @@
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#size-cells = <1>;
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compatible = "n25q00";
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reg = <0>; /* chip select */
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spi-max-frequency = <50000000>;
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spi-max-frequency = <100000000>;
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m25p,fast-read;
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page-size = <256>;
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block-size = <16>; /* 2^16, 64KB */
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@ -69,9 +69,9 @@ struct socfpga_reset_manager {
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#define RSTMGR_UART0 RSTMGR_DEFINE(1, 16)
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#define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 18)
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#define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 19)
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#define RSTMGR_QSPI RSTMGR_DEFINE(0, 5)
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#define RSTMGR_SDMMC RSTMGR_DEFINE(0, 22)
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#define RSTMGR_DMA RSTMGR_DEFINE(0, 28)
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#define RSTMGR_QSPI RSTMGR_DEFINE(1, 5)
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#define RSTMGR_SDMMC RSTMGR_DEFINE(1, 22)
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#define RSTMGR_DMA RSTMGR_DEFINE(1, 28)
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#define RSTMGR_SDR RSTMGR_DEFINE(1, 29)
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/* Create a human-readable reference to SoCFPGA reset. */
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@ -37,9 +37,8 @@ static int cadence_spi_write_speed(struct udevice *bus, uint hz)
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}
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/* Calibration sequence to determine the read data capture delay register */
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static int spi_calibration(struct udevice *bus)
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static int spi_calibration(struct udevice *bus, uint hz)
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{
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struct cadence_spi_platdata *plat = bus->platdata;
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struct cadence_spi_priv *priv = dev_get_priv(bus);
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void *base = priv->regbase;
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u8 opcode_rdid = 0x9F;
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@ -64,7 +63,7 @@ static int spi_calibration(struct udevice *bus)
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}
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/* use back the intended clock and find low range */
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cadence_spi_write_speed(bus, plat->max_hz);
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cadence_spi_write_speed(bus, hz);
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for (i = 0; i < CQSPI_READ_CAPTURE_MAX_DELAY; i++) {
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/* Disable QSPI */
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cadence_qspi_apb_controller_disable(base);
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@ -111,7 +110,7 @@ static int spi_calibration(struct udevice *bus)
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(range_hi + range_lo) / 2, range_lo, range_hi);
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/* just to ensure we do once only when speed or chip select change */
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priv->qspi_calibrated_hz = plat->max_hz;
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priv->qspi_calibrated_hz = hz;
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priv->qspi_calibrated_cs = spi_chip_select(bus);
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return 0;
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@ -123,17 +122,25 @@ static int cadence_spi_set_speed(struct udevice *bus, uint hz)
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struct cadence_spi_priv *priv = dev_get_priv(bus);
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int err;
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if (hz > plat->max_hz)
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hz = plat->max_hz;
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/* Disable QSPI */
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cadence_qspi_apb_controller_disable(priv->regbase);
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cadence_spi_write_speed(bus, hz);
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/* Calibration required for different SCLK speed or chip select */
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if (priv->qspi_calibrated_hz != plat->max_hz ||
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/*
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* Calibration required for different current SCLK speed, requested
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* SCLK speed or chip select
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*/
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if (priv->previous_hz != hz ||
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priv->qspi_calibrated_hz != hz ||
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priv->qspi_calibrated_cs != spi_chip_select(bus)) {
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err = spi_calibration(bus);
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err = spi_calibration(bus, hz);
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if (err)
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return err;
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/* prevent calibration run when same as previous request */
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priv->previous_hz = hz;
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}
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/* Enable QSPI */
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@ -291,10 +298,6 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
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plat->regbase = (void *)data[0];
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plat->ahbbase = (void *)data[2];
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/* Use 500KHz as a suitable default */
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plat->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
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500000);
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/* All other paramters are embedded in the child node */
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subnode = fdt_first_subnode(blob, node);
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if (subnode < 0) {
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@ -302,6 +305,10 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
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return -ENODEV;
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}
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/* Use 500 KHz as a suitable default */
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plat->max_hz = fdtdec_get_uint(blob, subnode, "spi-max-frequency",
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500000);
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/* Read other parameters from DT */
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plat->page_size = fdtdec_get_int(blob, subnode, "page-size", 256);
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plat->block_size = fdtdec_get_int(blob, subnode, "block-size", 16);
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@ -38,6 +38,7 @@ struct cadence_spi_priv {
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int qspi_is_init;
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unsigned int qspi_calibrated_hz;
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unsigned int qspi_calibrated_cs;
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unsigned int previous_hz;
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};
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/* Functions call declaration */
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@ -489,6 +489,19 @@ int fdtdec_get_pci_bar32(const void *blob, int node,
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s32 fdtdec_get_int(const void *blob, int node, const char *prop_name,
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s32 default_val);
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/**
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* Unsigned version of fdtdec_get_int. The property must have at least
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* 4 bytes of data. The value of the first cell is returned.
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*
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* @param blob FDT blob
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* @param node node to examine
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* @param prop_name name of property to find
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* @param default_val default value to return if the property is not found
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* @return unsigned integer value, if found, or default_val if not
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*/
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unsigned int fdtdec_get_uint(const void *blob, int node, const char *prop_name,
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unsigned int default_val);
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/**
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* Get a variable-sized number from a property
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*
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@ -36,3 +36,21 @@ int fdtdec_get_int(const void *blob, int node, const char *prop_name,
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debug("(not found)\n");
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return default_val;
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}
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unsigned int fdtdec_get_uint(const void *blob, int node, const char *prop_name,
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unsigned int default_val)
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{
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const int *cell;
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int len;
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debug("%s: %s: ", __func__, prop_name);
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cell = fdt_getprop(blob, node, prop_name, &len);
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if (cell && len >= sizeof(unsigned int)) {
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unsigned int val = fdt32_to_cpu(cell[0]);
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debug("%#x (%d)\n", val, val);
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return val;
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}
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debug("(not found)\n");
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return default_val;
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}
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