Commit graph

86 commits

Author SHA1 Message Date
Kumar Gala
f59b55a5b8 Stop using immap_t for guts offset on 85xx
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
instead of getting it via &immap->im_gur.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:19 -06:00
Kumar Gala
f852ce72f1 Add libfdt based ft_cpu_setup for mpc85xx
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:19 -06:00
Wolfgang Denk
992742a5b0 Cleanup coding style; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-11-03 23:09:27 +01:00
urwithsughosh@gmail.com
df90968b48 Setting MSR[DE] in do_reset
Hello,
   This patch ensures the soft reset of the board for the 85xx boards
   by setting the MSR[DE] in the do_reset function.

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
2007-10-19 13:13:44 -05:00
urwithsughosh@gmail.com
1e701e7013 MSR overwrite fix
Hello,
  This patch fixes the MSR overwrite in the start.S when moving out of
  the last 4K page.

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
2007-10-19 13:13:27 -05:00
Kumar Gala
e1ce3cb617 Remove magic numbers from cache related operations for mpc85xx
The mpc85xx start code uses some magic numbers that we actually
have #defines for in <config.h> so use those instead.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-19 11:25:01 -05:00
Ed Swarthout
1487adbdcf 85xx io out functions need sync after write.
This fixes the mc146818 rtc_read/write functions for 85xx.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2007-09-26 16:50:02 -05:00
Haiying Wang
7a1ac419fa Enable L2 cache for MPC8568MDS board
The L2 cache size is 512KB for 8568, print out the correct informaiton.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2007-08-29 00:11:44 -05:00
Randy Vinson
7f3f2bd2dc 85xxCDS: Add make targets for legacy systems.
The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.

Signed-off-by Randy Vinson <rvinson@mvista.com>
2007-08-14 01:51:39 -05:00
Andy Fleming
da9d4610d7 Add support for UEC to 8568
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:47:44 -05:00
Haiying Wang
d111d6382c Empirically set cpo and clk_adjust for mpc85xx DDR2 support
This patch is against u-boot-mpc85xx.git of www.denx.com

Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
both MPC8548CDS board and MPC8568MDS board, especially for supporting
533MHz DDR2.

Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
DDR2 on all current board versions especially ver 1.92 or later to bring
up.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2007-08-14 01:45:51 -05:00
Kumar Gala
3db0bef59e Use an absolute address when jumping out of 4k boot page
On e500 when we leave the 4k boot page we should use an absolute address since
we don't know where the board code may want us to be really running at.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-14 01:45:09 -05:00
Andy Fleming
39980c610c MPC85xx BA bits not set for 3-bit bank address DIMM
The current implementation does not set the number of bank address bits
(BA) in the processor. The default assumes 2 logical bank bits. This
works fine for a DIMM that uses devices with 4 internal banks (SPD
byte17 = 0x4) but needs to be set appropriately for a DIMM that uses
devices with 8 internal banks (SPD byte17 = 0x8).

Signed-off-by: Greg Davis <DavisG@embeddedplanet.com>
2007-08-14 01:44:55 -05:00
Andy Fleming
6c543597bb Fix minor 85xx warnings
Some patches had inserted warnings into the build:
* mpc8560ads declared data without using it
* cpu_init declared ecm and immap without using it in all CONFIGs
* MPC8548CDS.h had its default filenames changed so that they contained
  "\m" in the paths.  Made the defaults not Windows-specific (or
  anything-specific)

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:39:14 -05:00
Andy Fleming
61a21e980a 85xx start.S cleanup and exception support
From: Ed Swarthout <Ed.Swarthout@freescale.com>

Support external interrupts from platform to eliminate system hangs.
Define CONFIG_INTERRUPTS board configure option to enable.
Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.

Remove extra cpu initialization redundant with hardware initialization.
Whitespace cleanup.

Define and use _START_OFFSET consistent with other processors using
ppc_asm.tmpl

Move additional code from .text to boot page to make room for
exception vectors at start of image.

Handle Machine Check, External and Critical exceptions.

Fix e500 machine check error determination in traps.c

TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:34:21 -05:00
Ed Swarthout
40c7f9b0de 85xx allow debugger to configure ddr.
Only check for mpc8548 rev 1 when compiled for 8548.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:22:01 -05:00
Ed Swarthout
29372ff38c mpc85xx L2 cache reporting and SRAM relocation option.
Allow debugger to override flash cs0/cs1 settings to enable alternate
boot regions

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:21:55 -05:00
Jon Loeliger
068b60a0eb cpu/ rtc/ include/: Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-10 10:27:39 -05:00
Jon Loeliger
4431283c7e cpu/m*: Remove obsolete references to CONFIG_COMMANDS
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-09 19:06:00 -05:00
Jon Loeliger
56b304ac20 Fix #if typo in CONFIG_CMD_* changes.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-05 03:41:23 +02:00
Jon Loeliger
f48070fe5f cpu/mpc*/ : Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.

All transformations are of the form:
Before:
    #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
    #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-04 00:23:18 +02:00
Wolfgang Denk
98c440bee6 Merge with /home/wd/git/u-boot/custodian/u-boot-testing 2007-07-03 15:07:56 +02:00
Rafal Jaworowski
02032e8f14 [ppc] Fix build breakage for all non-4xx PowerPC variants.
- adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros
- minor 4xx cleanup
2007-06-22 14:58:04 +02:00
Kim Phillips
255a3577c8 Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-05-17 00:07:21 +02:00
Wolfgang Denk
2f15278c2e Coding stylke cleanup; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-05-05 18:23:11 +02:00
Andy Fleming
ffa621a0d1 Cleaned up some 85xx PCI bugs
* Cleaned up the CDS PCI Config Tables and added NULL entries to
  the end
* Fixed PCIe LAWBAR assignemt to use the cpu-relative address
* Fixed 85xx PCI code to assign powar region sizes based on the
  config values (rather than hard-coding them)
* Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-05-02 15:50:13 -05:00
Andy Fleming
6743105988 Add support for the 8568 MDS board
This included some changes to common files:
* Add 8568 processor SVR to various places
* Add support for setting the qe bus-frequency value in the dts
* Add the 8568MDS target to the Makefile

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-05-02 15:50:02 -05:00
Andy Fleming
66ed6cca3f Reworked 85xx speed detection code
Changed the code to read the registers and calculate the clock
rates, rather than using a "switch" statement.

Idea from Andrew Klossner <andrew@cesa.opbu.xerox.com>

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23 19:58:28 -05:00
Andy Fleming
0d8c3a2096 Support 1G size on 8548
e500v2 and newer cores support 1G page sizes.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23 19:58:28 -05:00
Andy Fleming
1f9a318cea Only set ddrioovcr for 8548 rev1.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23 19:58:28 -05:00
Andy Fleming
9343dbf85b Tweak DDR ECC error counter
Enable single-bit error counter when memory was cleared by ddr controller.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23 19:58:28 -05:00
Timur Tabi
85e7c7a45e 85xx: write MAC address to mac-address and local-mac-address
Some device trees have a mac-address property, some have local-mac-address,
and some have both.  To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.

Signed-off-by: Timur Tabi <timur@freescale.com>
2007-04-23 19:58:28 -05:00
Andy Fleming
03b81b48ee Some 85xx cpu cleanups
* Cleaned up the TSR[WIS] clearing
* Cleaned up DMA initialization

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-04-23 19:58:28 -05:00
Andy Fleming
151d5d992e Add cpu support for the 8544
Recognize new SVR values, and add a few register definitions

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-04-23 19:58:28 -05:00
Zang Roy-r61911
96629cbabd u-boot: Fix e500 v2 core reset bug
The following patch fixes the e500 v2 core reset bug.
For e500 v2 core, a new reset control register is added to reset the
processor.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2007-04-23 19:58:27 -05:00
Zang Roy-r61911
63247a5acd u-boot: v2: Remove the fixed TLB and LAW entrynubmer
Remove the fixed TLB and LAW entry nubmer. Use actually TLB and LAW
entry number to control the loop.  This can reduce the potential risk
for the 85xx processor increasing its TLB adn LAW entry number.

Signed-off-by: Swarthout Edward <swarthout@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2007-04-23 19:58:27 -05:00
Wolfgang Denk
47a6989c10 Code cleanup 2006-10-24 15:32:57 +02:00
Jon Loeliger
2047672684 Converted all 85xx boards to use a common FSL I2C driver.
Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-20 15:50:15 -05:00
Jon Loeliger
13a7fcdf37 * Fix a bunch of compiler warnings for gcc 4.0
Signed-off-by: Matthew McClintock <msm@freescale.com>
2006-10-19 11:33:52 -05:00
Jon Loeliger
daaba9859b Merge branch 'master' of http://www.denx.de/git/u-boot 2006-10-10 17:21:42 -05:00
Jon Loeliger
1fd5699a4a Coding style changes to remove local varible blocks
and reformat a bit nicer.
2006-10-10 17:19:03 -05:00
Wolfgang Denk
2b208f5308 Move "ar" flags to config.mk to allow for silent "make -s"
Based on patch by Mike Frysinger, 20 Jun 2006
2006-10-09 01:02:05 +02:00
Jon Loeliger
afa98843e4 Merge branch 'master' of http://www.denx.de/git/u-boot
Conflicts:

	board/stxxtc/Makefile
2006-09-19 08:51:24 -05:00
Marian Balakowicz
f93286397e Add support for a saving build objects in a separate directory.
Modifications are based on the linux kernel approach and
support two use cases:

  1) Add O= to the make command line
  'make O=/tmp/build all'

  2) Set environement variable BUILD_DIR to point to the desired location
  'export BUILD_DIR=/tmp/build'
  'make'

The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'

Command line 'O=' setting overrides BUILD_DIR environent variable.

When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
2006-09-01 19:49:50 +02:00
Matthew McClintock
34c3c0e01d * Switched default PCI speed for 8540 ADS back to 33MHz
* Added comments and a printf to warn that PCI-X won't
  work at 33MHz
  Patch by Andy Fleming 17-Mar-2006

Signed-off-by: Andy Fleming <afleming@freescale.com>
2006-08-09 13:51:05 -05:00
Matthew McClintock
97074ed965 * Added support for initializing second PCI bus on 85xx Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
2006-08-09 13:50:44 -05:00
Matthew McClintock
0e16387db1 * Add Flat Dev Tree construction for MPC85xx ADS and CDS boards Patch by Jon Loeliger 17-Jan-2006
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-08-09 13:50:30 -05:00
Wolfgang Denk
d87080b721 GCC-4.x fixes: clean up global data pointer initialization for all boards. 2006-03-31 18:32:53 +02:00
Wolfgang Denk
b38dbd4622 Fix bug in [id]cache_status commands for MPC85xx processors;
should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
2006-03-13 00:46:05 +01:00
Wolfgang Denk
a889bd27ef Fix DPRAM offset/size for MPC8541/8555.
Simplify TQM85xx Makefile handling.
2005-12-06 15:02:31 +01:00