Commit graph

1175 commits

Author SHA1 Message Date
Bin Meng
3fe6e6e2aa x86: baytrail: acpi: Add full reset bit to the reset register value in FADT
It was noticed a few times, that the reboot from Linux (reboot command)
is different from the reboot (reset command) under U-Boot. The U-Boot
version does seem to reset the board more deeply (PCI cards etc) than
the Linux reboot.

This is actually caused by missing full reset bit in the reset register
value in the ACPI FADT table.

Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
2017-09-02 23:35:55 +08:00
Bin Meng
438505fe69 x86: tangier: kconfig: Guard tangier-specific options
These options should not be exposed to other platforms.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-08-24 11:00:47 +08:00
Bin Meng
81c727d86c x86: baytrail: Fix turbo enable
CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED must be turned on for Baytrail.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-24 11:00:47 +08:00
Bin Meng
2ddb1a177a x86: Convert CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED to Kconfig
This converts CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED to a Kconfig option.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-24 11:00:47 +08:00
Bin Meng
1e6ebee667 x86: fsp: Configure SPI opcode registers before SPI is locked down
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.

This introduces a Kconfig option CONFIG_FSP_LOCKDOWN_SPI for such
FSPs. When it is on, U-Boot will configure the SPI opcode registers
before the lock-down.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-24 11:00:47 +08:00
Simon Glass
00caae6d47 env: Rename getenv/_f() to env_get()
We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16 08:30:24 -04:00
Simon Glass
c1c3fe2307 env: Convert CONFIG_ENV_IS_IN... to a choice
At present we support multiple environment drivers but there is not way to
select between them at run time. Also settings related to the position and
size of the environment area are global (i.e. apply to all locations).

Until these limitations are removed we cannot really support more than one
environment location. Adjust the location to be a choice so that only one
can be selected. By default the environment is 'nowhere', meaning that the
environment exists only in memory and cannot be saved.

Also expand the help for the 'nowhere' option and move it to the top since
it is the default.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Move all of the imply logic to default X if Y so it works again]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-15 20:50:01 -04:00
Bin Meng
323a6d6910 x86: acpi: Fix build error with certain configuration
When CONFIG_EFI_PARTITION is not set, the following build error is
seen in arch/x86/lib/acpi_s3.c:

  error: expected declaration specifiers or '...' before '*' token
  static void asmlinkage (*acpi_do_wakeup)(void *vector) = (void*)WAKEUP_BASE;

This is actually caused by missing asmlinkage declaration, but with
CONFIG_EFI_PARTITION on, the declaration comes from part.h which
is included from common.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-08 21:13:05 +08:00
Bin Meng
091e51d20f x86: Remove dead ISA related codes
Neither new design uses ISA bus, nor does any U-Boot codes use these
codes. Remove them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-08 16:46:32 +08:00
Tom Rini
07d7783822 Merge git://git.denx.de/u-boot-x86 2017-08-01 15:38:32 -04:00
Bin Meng
24357dfd2a x86: Switch all boards to use DM SCSI
After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Simon Glass
b7c6baef28 x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01 20:17:02 +08:00
xypron.glpk@gmx.de
6461f45b71 x86: ivybridge: remove unused uma_memory_size
The value of uma_memory_size depends on an undefined value
from the stack. The value of uma_memory_size is changed but
never used.

So simply remove this superfluous code.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
724368928c x86: Convert INTEL_ICH6_GPIO to Kconfig
This converts Intel ICH6 GPIO driver to Kconfig, and add it to the
imply list of platform drivers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
b9342b2cc6 x86: kconfig: Move USB to platform Kconfig
Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
97e12b06af x86: qemu: kconfig: Imply platform specific drivers
Imply Qemu-specific drivers in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
b0e3adf669 x86: quark: kconfig: Imply platform specific drivers
Imply Quark-specific drivers in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
71305b4478 x86: tangier: kconfig: Imply platform specific drivers
Imply Tangier-specific drivers in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
a65ae28618 x86: queensbay: kconfig: Imply platform specific drivers
Imply drivers that work with Intel Queensbay platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
08fb85b2a4 x86: coreboot: kconfig: Imply drivers that are useful
U-Boot as coreboot payload can run on any x86 hardware ideally.
Let's imply some common drivers that are useful.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
1b15ef9cd2 x86: broadwell: kconfig: Imply platform specific drivers
Imply Broadwell-specific drivers in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
a5b212942b x86: ivybridge: kconfig: Imply platform specific drivers
Imply drivers that are working with Ivybridge platform in the
platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
e88e1ef550 x86: baytrail: kconfig: Imply platform specific drivers
BayTrail integrates lots of peripherals that have U-Boot drivers.
Imply those in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
67f99f970f x86: kconfig: Imply ENABLE_MRC_CACHE in the platform Kconfig
Platform knows whether MRC cache is implemented, but using it can
be a choice of a specific board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
5d89b37f71 x86: kconfig: Select ARCH_EARLY_INIT_R in the platform Kconfig
This is architecture-dependent early initialization hence should
be put in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
3612b1efeb x86: kconfig: Select ARCH_MISC_INIT in the platform Kconfig
arch_misc_init() is intended to do architecture-dependent stuff.
This is required by each platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
30b1ecd265 x86: kconfig: Let board select BOARD_EARLY_INIT_F
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes
and should be not 'default y' for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
1e452b4686 x86: kconfig: Imply HAVE_INTEL_ME in the platform Kconfig
Intel Management Engine is required by the platform, however it's
not a must have when building a U-Boot image. For example, during
development normally programming ME firmware is a one-time effort.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Andy Shevchenko
c3df28f6e2 x86: Make table address selectable
Some firmwares might have another window for generated tables.

So, introduce two configuration options to select start address and
maximum length for the generated tables.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01 20:17:02 +08:00
Bin Meng
e719b6b0f8 x86: Enforce toolchain to generate 64-bit codes for 64-bit U-Boot
64-bit U-Boot image is a combination of 32-bit U-Boot (SPL) plus
64-bit U-Boot (proper). For the U-Boot proper, it has be compiled
to 64-bit object codes. Attempting to use a toolchain to compile
64-bit U-Boot for qemu-x86_64, like kernel.org 4.9 i386-linux-gcc,
fails with the following errors:

  arch/x86/cpu/intel_common/microcode.c:79:2: error: PIC register
  clobbered by 'ebx' in 'asm'

The issue is because toolchain is preconfigured to generate code
for the 32-bit architecture (i386), and currently '-m64' is missing
in the makefile fragment. Using kernel.org 4.9 x86_64-linux-gcc
works out of the box, since it is preconfigured to generate 64-bit
codes.

When compiling U-Boot SPL, '-m32' is passed to the toolchain, no
mater 32-bit (i386-linux-) or 64-bit (x86_64-linux) the toolchain
is preconfigured to generate.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
9a95f51ffe x86: Use default stack boundary alignment
At present U-Boot x86 build is using -mpreferred-stack-boundary=2
which is 4 bytes stack boundary alignment. With 64-bit U-Boot, the
minimal required stack boundary alignment is 16 bytes.

If -mpreferred-stack-boundary is not specified, the default is 4
(16 bytes). Switch to use the default one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Simon Glass
745a94f352 ahci: Support non-PCI controllers
At present the AHCI SCSI driver only supports PCI with driver model.
Rename the existing function to indicate this and add support for adding
a non-PCI controller .

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:00 +09:00
Andy Shevchenko
382fabb297 x86: acpi: Don't touch hardware on HW reduced platforms
If ACPI HW reduced bit in FADT is set we should ignore any ACPI hardware
communications.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Andy Shevchenko
ace7762b28 x86: acpi: Export acpi_fill_mcfg() with __weak attribute
Some platforms might require different approach when filling memory
mappings configuration table.

Allow them to override the common method.

At the same time export acpi_create_mcfg_mmconfig().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Andy Shevchenko
b156da91fb x86: acpi: Deduplicate acpi_fill_madt() implementation
In Baytrail and Quark support code acpi_fill_madt() is identical.

Deduplicate its implementation by moving to lib/acpi_tables.c.

At the same time mark acpi_fill_madt() with __weak attribute to keep a
possibility to override it in platform code

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Andy Shevchenko
2dcbef6f6c x86: acpi: Name fields in FADT in accordance with specification
ACPI specification defines FADT fields marked as reserved in U-Boot.

Name these fields in accordance with ACPI specification.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Andy Shevchenko
684c4cd011 x86: acpi: Fill OEM revision
Fill OEM revision field in the tables by U-Boot build date.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Stefan Roese
66712c298d x86: conga-qeval20-qa3-e3845.dts: Enable xHCI support in dts
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Stefan Roese
1f4e25780a x86: dfi-bt700: Add xHCI USB support
Change from EHCI to xHCI on the DFI BayTrail SoM.

The xHCI USB hub is connected to an GPIO on the DFI BayTrail SoM. For
correct operation, it needs to get reset upon power-up. Otherwise it
may happen that the hub is not detected after a software reboot. This
patch also configures this GPIO in the dts for correct operation.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Andy Shevchenko
495f3774be x86: Add Intel Edison board files
Add Intel Edison board which is using U-Boot.

The patch is based on work done by the following people (in alphabetical
order):
	Aiden Park <aiden.park@intel.com>
	Dukjoon Jeon <dukjoon.jeon@intel.com>
	eric.park <eric.park@intel.com>
	Fabien Chereau <fabien.chereau@intel.com>
	Felipe Balbi <felipe.balbi@linux.intel.com>
	Scott D Phillips <scott.d.phillips@intel.com>
	Sebastien Colleur <sebastienx.colleur@intel.com>
	Steve Sakoman <steve.sakoman@intel.com>
	Vincent Tinelli <vincent.tinelli@intel.com>

In case we're building for Intel Edison, we must have 4096 bytes of
zeroes in the beginning on u-boot.bin. This is done in
board/intel/edison/config.mk.

First run sets hardware_id environment variable which is read from
System Controller Unit (SCU).

Serial number (serial# environment variable) is generated based on eMMC
CID.

MAC address on USB network interface is unique to the board but kept the
same all over the time.

Set mac address from U-Boot using following scheme:
	OUI = 02:00:86
	next 3 bytes of MAC address set from eMMC serial number

This allows to have a unique mac address across reboot and flashing.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[bmeng: Add MAINTAINERS file for Intel Edison board]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30 10:30:25 +08:00
Felipe Balbi
e71de54a49 x86: Add Intel Tangier support
Add Intel Tangier SoC support.

Intel Tangier SoC is a core part of Intel Merrifield platform. For
example, Intel Edison board is based on such platform.

The patch is based on work done by the following people (in alphabetical
order):
	Aiden Park <aiden.park@intel.com>
	Dukjoon Jeon <dukjoon.jeon@intel.com>
	eric.park <eric.park@intel.com>
	Fabien Chereau <fabien.chereau@intel.com>
	Scott D Phillips <scott.d.phillips@intel.com>
	Sebastien Colleur <sebastienx.colleur@intel.com>
	Steve Sakoman <steve.sakoman@intel.com>
	Vincent Tinelli <vincent.tinelli@intel.com>

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-30 10:30:25 +08:00
Andy Shevchenko
b7026b0c98 x86: Add dma-mapping.h to architectural code
Some cross-platform drivers rely on this header present.
Make it so for x86.

It's just a copy'n'paste of arch/arm/include/asm/dma-mapping.h.

Suggested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-30 10:30:25 +08:00
Bin Meng
c9621012a6 x86: minnowmax: Enable USB xHCI support
BayTrail SoC supports both EHCI and xHCI controllers. However only
one host controller (either EHCI or xHCI) can be used. To enable
HSIC and SS ports, xHCI must be used. This turns on xHCI support on
Intel MinnowMax board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2017-07-28 23:34:27 +02:00
Simon Glass
91c868fe7c Convert CONFIG_ENV_IS_IN_SPI_FLASH to Kconfig
This converts the following to Kconfig:
   CONFIG_ENV_IS_IN_SPI_FLASH

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-07-25 21:31:03 -04:00
Simon Glass
32e9ec1f88 x86: Move link to use driver model for SCSI
As a demonstration of how to use SCSI with driver model, move link over
to use this. This patch needs more work, but illustrates the concept.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-11 10:08:19 -06:00
Bin Meng
da2364cc14 Revert "x86: Convert MMC to driver model"
This reverts commit ddb3ac3c71.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-27 16:31:30 +08:00
Simon Glass
3ff240c92f x86: Don't include asm/u-boot.h in common
With a small fixup to u-boot-x86.h, this is not actually needed anywhere,
so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:35 -04:00
Simon Glass
6862b50f6e x86: Make u-boot-x86.h a private header
Rather than including this arch-specific header file in common.h, include
it from within x86's u-boot.h header.

Also drop the comment about something to be fixed. It is not clear what
needs fixing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:32 -04:00
Bin Meng
d7f7ba36b2 x86: fsp: Remove the call to set up internal uart in fsp_init()
First of all, it's inappropriate to call setup_internal_uart() in a
generic API fsp_init(), as CONFIG_INTERNAL_UART is an option that
is only available on BayTrail platform. Secondly even for BayTrail,
there is no need to call setup_internal_uart() at all, as Intel FSP
will do this for us.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
37d1023264 x86: baytrail: Fix boot hang with a debug build
It was observed that when -DDEBUG is used to generate a debug build,
U-Boot does not boot on MinnowMax board. A workaround is to disable
CONFIG_DEBUG_UART. The real issue is that in order to have the debug
uart to work, BayTrail SoC needs to be configured so that its internal
uart is available to be used as the debug uart.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
f8f291b096 x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer
At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
for these options and change the property from a boolean type to
an integer type, and change their names to explicitly indicate what
the property is really for.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
5e74e5a682 x86: baytrail: Use macros instead of magic numbers for FSP settings
Introduce various meaningful macros for FSP settings and switch over
to use them instead of magic numbers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
6702488cfa x86: baytrail: Remove "serial-debug-port-*" settings
"serial-debug-port-address" and "serial-debug-port-type" settings
are actually reserved in the FSP UPD data structure. Remove them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
455a5a8086 x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1
The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per
FSP default settings. 0 is not valid.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
c2f17939f4 x86: minnowmax: Remove incorrect pad-offset of several pins
Remove 'pad-offset' of soc_gpio_s5_0, soc_gpio_s5_1, soc_gpio_s5_2,
pin_usb_host_en0 and pin_usb_host_en1. These offsets are actually
wrong. Correct value should be added by 0x2000, but since they
are supposed to be 'mode-gpio', 'pad-offset' is not needed at all.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-17 17:13:06 +08:00
Bin Meng
770ee01742 x86: ich6_gpio: Add use-lvl-write-cache for I/O access mode
Add a device-tree property use-lvl-write-cache that will cause
writes to lvl to be cached instead of read from lvl before each
write. This is required on some platforms that have the register
implemented as dual read/write (such as Baytrail).

Prior to this fix the blue USB port on the Minnowboard Max was
unusable since USB_HOST_EN0 was set high then immediately set
low when USB_HOST_EN1 was written.

This also resolves the 'gpio clear | set' command warning like:
  "Warning: value of pin is still 0"

Signed-off-by: George McCollister <george.mccollister@gmail.com>
<rebased on latest origin/master, fixed all baytrail boards>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-17 17:13:06 +08:00
Stefan Roese
7025b05415 x86: bootm: Add dm_remove_devices_flags() call to bootm_announce_and_cleanup()
This patch adds a call to dm_remove_devices_flags() to
bootm_announce_and_cleanup() so that drivers that have one of the removal
flags set (e.g. DM_FLAG_ACTIVE_DMA_REMOVE) in their driver struct, may
do some last-stage cleanup before the OS is started.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-17 17:13:06 +08:00
Simon Glass
ddb3ac3c71 x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2017-05-17 17:13:06 +08:00
Bin Meng
5ae5aa9310 x86: acpi: Fix Windows S3 resume failure
U-Boot sets up the real mode interrupt handler stubs starting from
address 0x1000. In most cases, the first 640K (0x00000 - 0x9ffff)
system memory is reported as system RAM in E820 table to the OS.
(see install_e820_map() implementation for each platform). So OS
can use these memories whatever it wants.

If U-Boot is in an S3 resume path, care must be taken not to corrupt
these memorie otherwise OS data gets lost. Testing shows that, on
Microsoft Windows 10 on Intel Baytrail its wake up vector happens to
be installed at the same address 0x1000. While on Linux its wake up
vector does not overlap this memory range, but after resume kernel
checks low memory range per config option CONFIG_X86_RESERVE_LOW
which is 64K by default to see whether a memory corruption occurs
during the suspend/resume (it's harmless, but warnings are shown
in the kernel dmesg logs).

We cannot simply mark the these memory as reserved in E820 table
because such configuration makes GRUB complain: unable to allocate
real mode page. Hence we choose to back up these memories to the
place where we reserved on our stack for our S3 resume work.
Before jumping to OS wake up vector, we need restore the original
content there.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
68769ebcbc x86: pci: Allow conditionally run VGA rom in S3
Introduce a new CONFIG_S3_VGA_ROM_RUN option so that U-Boot can
bypass executing VGA roms in S3.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
82a5648f56 x86: acpi: Turn on ACPI mode for S3
Before jumping to OS waking up vector, we need turn on ACPI mode
for S3, just like what we do for a normal boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
0f4e25887d x86: acpi: Refactor acpi_resume()
To do something more in acpi_resume() like turning on ACPI mode,
we need locate ACPI FADT table pointer first. But currently this
is done in acpi_find_wakeup_vector().

This changes acpi_resume() signature to accept ACPI FADT pointer
as the parameter. A new API acpi_find_fadt() is introduced, and
acpi_find_wakeup_vector() is updated to use FADT pointer as the
parameter as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
995727850f x86: acpi: Make enter_acpi_mode() public
enter_acpi_mode() is useful on other boot path like S3 resume, so
make it public.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
b208d1915f x86: apci: Change PM1_CNT register access to RMW
In enter_acpi_mode() PM1_CNT register is changed to PM1_CNT_SCI_EN
directly without preserving its previous value. Update to change
the register access to read-modify-write (RMW).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
bffd798136 x86: Adjust board_final_cleanup() order
Call board_final_cleanup() before write_tables(), so that anything
done in board_final_cleanup() on a normal boot path is also done
on an S3 resume path.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
95e50dd197 x86: Do not clear high table area for S3
When SeaBIOS is being used, U-Boot reserves a memory area to be
used for configuration tables like ACPI. But it should not be
cleared otherwise ACPI table will be missing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
ba65808e7d x86: fsp: Save stack address to CMOS for next S3 boot
At the end of pre-relocation phase, save the new stack address
to CMOS and use it as the stack on next S3 boot for fsp_init()
continuation function.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
9f1fad1e36 x86: Add an early CMOS access library
This adds a library that provides CMOS (inside RTC SRAM) access
at a very early stage when driver model is not available yet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
3a34cae011 x86: acpi: Resume OS if resume vector is found
In an S3 resume path, U-Boot does everything like a cold boot except
in the last_stage_init() it jumps to the OS resume vector.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
e76bf38f18 x86: acpi: Add one API to find OS wakeup vector
This adds one API acpi_find_wakeup_vector() to locate OS wakeup
vector from the ACPI FACS table, to be used in the S3 boot path.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
2b2d666f9c x86: acpi: Add wake up assembly stub
This adds a wake up stub before jumping to OS wake up vector.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
7d0d2efef8 x86: fsp: Mark memory used by U-Boot as reserved in the E820 table for S3
U-Boot itself as well as everything that is consumed by U-Boot (like
heap, stack, dtb, etc) needs to be reserved and reported in the E820
table when S3 resume is on.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
e652e1304a x86: baytrail: Conditionally report S3 in the ACPI table
When U-Boot is built without ACPI S3 support, it should not report
S3 in the ACPI table otherwise when kernel does STR it won't work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
b727961b07 x86: Store and display previous sleep state
Add one member in the global data to store previous sleep state,
and display the state during boot in print_cpuinfo().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
1206723b6e x86: fsp: acpi: Pass different boot mode to FSP init
When ACPI S3 resume is turned on, we should pass different boot mode
to FSP init instead of default BOOT_FULL_CONFIG.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
b7ef3bffff x86: Add post codes for OS resume
This adds OS_RESUME (0x40) and RESUME_FAILURE (0xed) post codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
fcf2fba472 x86: baytrail: acpi: Add APIs for determining/clearing sleep state
This adds APIs for determining previous sleep state from ACPI I/O
registers, as well as clearing sleep state on BayTrail SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Bin Meng
4372c111d4 x86: acpi: Add Kconfig option and header file for ACPI resume
This introduces a Kconfig option for ACPI S3 resume, as well as a
header file to include anything related to ACPI S3 resume.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
2017-05-17 17:11:46 +08:00
Simon Glass
deb9599915 fs: Kconfig: Add a separate config for FS_CBFS
Rather than using CMD_CBFS for both the filesystem and its command, we
should have a separate option for each. This allows us to enable CBFS
support without the command, if desired, which reduces U-Boot's size
slightly.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply FS_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-30 13:40:57 -04:00
Simon Glass
d66a10fc00 fs: Convert CONFIG_CMD_CBFS to Kconfig
This converts the following to Kconfig:
   CONFIG_CMD_CBFS

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-30 13:40:56 -04:00
Simon Glass
3ff0900aaf x86: Display the SPL banner only once
At present on a cold reboot we must reset the CPU to get it to full speed.
With 64-bit U-Boot this happens in SPL. At present we print the banner
before doing this, the end result being that we print the banner twice.
Print the banner a little later (after the CPU is ready) to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2017-04-18 15:51:21 +08:00
Simon Glass
a6eb6769c6 x86: Drop leading spaces in cpu_x86_get_desc()
The Intel CPU name can have leading spaces. Remove them since they are not
useful.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-04-18 15:51:21 +08:00
Andy Shevchenko
ca0d29e4f0 x86: Introduce minimal PMU driver for Intel MID platforms
This simple PMU driver allows to tyrn power on and off for selected
devices. In particularly Intel Tangier needs to power on SDHCI
controllers in order to access to them during board initialization.

In the future it might be expanded to cover other Intel MID platforms,
that's why it's located under arch/x86/lib and called pmu.c.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-10 10:02:03 +08:00
Felipe Balbi
bb416465fd x86: Add SCU IPC driver for Intel MID platforms
Intel MID platforms have few microcontrollers inside SoC, one of them
is so called System Controller Unit (SCU).

Here is the driver to communicate with microcontroller.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-10 10:02:03 +08:00
Stefan Roese
13c531e52a x86: bootm: Fix FIT image booting on x86
Checking 'is_zimage' at this time will always fail and therefore booting
a FIT style image will always lead to this error message:

"## Kernel loading failed (missing x86 kernel setup) ..."

This change now removes this check and booting of FIT images works just
fine.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-04-10 10:02:03 +08:00
Stefan Roese
cccab03a52 x86: Add file names from Kconfig in descriptor/intel-me nodes in u-boot.dtsi
Since we now have the file names configurable via Kconfig for the flash
descriptor and intel-me files, add these from Kconfig in the corresponding
dts nodes.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-04-10 10:02:03 +08:00
Stefan Roese
3dc0f8446a x86: Kconfig: Add options to configure the descriptor.bin / me.bin filenames
This introduces two Kconfig options to enable board specific filenames
for the Intel binary blobs to be used to generate the SPI flash image.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-04-10 10:02:03 +08:00
Simon Glass
e47b2d674f board_f: Make relocation functions generic
This header file is used by three archs. It could be used by all of them
since relocation is a common function. Move it into a generic file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-05 16:36:57 -04:00
Simon Glass
96d4b75c0d board_f: Make init_helpers generic
This header file is used by two archs. It could be used by all of them
since it allows the cache to be on during relocation. Move it into a
generic file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-05 16:36:56 -04:00
Simon Glass
5e924a13e7 Move dram_init_banksize() to a common header
This is an weak function present on all archs so we should have it in the
common header file. Remove it from arch-specific headers and add a
function comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-05 16:36:51 -04:00
Simon Glass
76b00aca4f board_f: Drop setup_dram_config() wrapper
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 16:36:51 -04:00
Simon Glass
76d1d02fd2 board_f: x86: Use checkcpu() for CPU init
At present we misuse print_cpuinfo() do so CPU init on x86. This is done
because it is the next available call after the console is enabled. But
several arches use checkcpu() instead. Despite the horrible name (which
we can fix), it seems a better choice.

Adjust the various x86 CPU implementations to move their init code into
checkcpu() and use print_cpuinfo() only for printing CPU info.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 13:55:09 -04:00
Simon Glass
671549e5b0 board_f: x86: Rename x86_fsp_init() to arch_fsp_init()
While x86 is the only user and this could in principle be moved to
arch_cpu_init() there is some justification for this being a separate
call. It provides a way to handle init which is not CPU-specific, but
must happen before the CPU can be set up.

Rename the function to be more generic.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 13:52:36 -04:00
Stefan Roese
706865afe5 dm: core: Add flags parameter to device_remove()
This patch adds the flags parameter to device_remove() and changes all
calls to this function to provide the default value of DM_REMOVE_NORMAL
for "normal" device removal.

This is in preparation for the driver specific pre-OS (e.g. DMA
cancelling) remove support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-04 20:15:10 -06:00
Andy Shevchenko
308c75e08d x86: Intel MID platforms has no microcode update
There is no microcode update available for SoCs used on Intel MID
platforms.

Use conditional to bypass it.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-21 15:10:56 +08:00
Vincent Tinelli
20bfac0599 x86: zImage: add Intel MID platforms support
Intel MID platform boards have special treatment, such as boot parameter
setting.

Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-21 15:10:50 +08:00
Andy Shevchenko
7a96fd8ef0 x86: Introduce INTEL_MID quirk option
Intel Mobile Internet Device (MID) platforms have special treatment in
some cases, such as CPU enumeration or boot parameters configuration.

Besides that several drivers are specifically developed for the IP
blocks found on Intel MID platforms. Those drivers will be dependent to
this option.

Here we introduce specific quirk option for such cases.

It is supposed to be selected by Intel MID platform boards, for example,
Intel Edison.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-02-21 15:10:46 +08:00
J. Tang
3c03f4928e x86: Force 32-bit jumps in interrupt handlers
Depending upon the compiler used, IRQ entries could vary in sizes. With
GCC 5.x, the code generator will use short jumps for some IRQ entries
but near jumps for others. For example, GCC 5.4.0 generates the
following:

$ objdump -d interrupt.o
<snip>
00000207 <irq_18>:
207:   6a 12                   push   $0x12
209:   eb 85                   jmp    190 <irq_common_entry>

0000020b <irq_19>:
20b:   6a 13                   push   $0x13
20d:   eb 81                   jmp    190 <irq_common_entry>

0000020f <irq_20>:
20f:   6a 14                   push   $0x14
211:   e9 7a ff ff ff          jmp    190 <irq_common_entry>

00000216 <irq_21>:
216:   6a 15                   push   $0x15
218:   e9 73 ff ff ff          jmp    190 <irq_common_entry>

This causes a problem in cpu_init_interrupts(), because the IDT setup
assumed same sizes for all IRQ entries. GCC 4.x always generated 32-bit
jumps, so this previously was not a problem.

The fix is to force 32-bit near jumps for all entries within the
inline assembly. This works for GCC 5.x, and 4.x was already using
that form of jumping.

Signed-off-by: Jason Tang <tang@jtang.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-21 14:53:29 +08:00
Simon Glass
e160f7d430 dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:14 -07:00
Andy Shevchenko
446d4e048e x86: make LOAD_FROM_32_BIT visible for platforms
This option is useful not only for development, but for the platforms
where U-Boot is run from custom ROM bootloader. For example, Intel
Edison is that board.

Make this option visible that platforms can select it if needed.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:36:50 +08:00