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x86: Switch all boards to use DM SCSI

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After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2017-07-30 19:24:02 -07:00
parent b7c6baef28
commit 24357dfd2a
20 changed files with 8 additions and 53 deletions
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2
arch/Kconfig
View file

@ -95,12 +95,14 @@ config X86
select PCI
select TIMER
select X86_TSC_TIMER
imply BLK
imply DM_ETH
imply DM_GPIO
imply DM_KEYBOARD
imply DM_MMC
imply DM_RTC
imply DM_SERIAL
imply DM_SCSI
imply DM_SPI
imply DM_SPI_FLASH
imply DM_USB

1
arch/x86/cpu/baytrail/Kconfig
View file

@ -11,6 +11,7 @@ config INTEL_BAYTRAIL
imply HAVE_INTEL_ME if !EFI
imply ENABLE_MRC_CACHE
imply ENV_IS_IN_SPI_FLASH
imply AHCI_PCI
imply ICH_SPI
imply INTEL_ICH6_GPIO
imply MMC

1
arch/x86/cpu/broadwell/Kconfig
View file

@ -10,6 +10,7 @@ config INTEL_BROADWELL
imply HAVE_INTEL_ME
imply ENABLE_MRC_CACHE
imply ENV_IS_IN_SPI_FLASH
imply AHCI_PCI
imply ICH_SPI
imply INTEL_BROADWELL_GPIO
imply SCSI

1
arch/x86/cpu/coreboot/Kconfig
View file

@ -4,6 +4,7 @@ config SYS_COREBOOT
bool
default y
imply ENV_IS_NOWHERE
imply AHCI_PCI
imply E1000
imply ICH_SPI
imply MMC

1
arch/x86/cpu/ivybridge/Kconfig
View file

@ -11,6 +11,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
imply HAVE_INTEL_ME
imply ENABLE_MRC_CACHE
imply ENV_IS_IN_SPI_FLASH
imply AHCI_PCI
imply ICH_SPI
imply INTEL_ICH6_GPIO
imply SCSI

1
arch/x86/cpu/qemu/Kconfig
View file

@ -8,6 +8,7 @@ config QEMU
bool
select ARCH_EARLY_INIT_R
imply ENV_IS_NOWHERE
imply AHCI_PCI
imply E1000
imply SYS_NS16550
imply USB

1
arch/x86/cpu/queensbay/Kconfig
View file

@ -10,6 +10,7 @@ config INTEL_QUEENSBAY
select HAVE_CMC
select ARCH_EARLY_INIT_R
imply ENV_IS_IN_SPI_FLASH
imply AHCI_PCI
imply ICH_SPI
imply INTEL_ICH6_GPIO
imply MMC

2
configs/chromebook_link64_defconfig
View file

@ -56,8 +56,6 @@ CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_DM_SCSI=y
CONFIG_BLK=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y

2
configs/chromebook_link_defconfig
View file

@ -38,8 +38,6 @@ CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_DM_SCSI=y
CONFIG_BLK=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y

2
configs/chromebox_panther_defconfig
View file

@ -34,8 +34,6 @@ CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_DM_SCSI=y
CONFIG_BLK=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
CONFIG_RTL8169=y

4
include/configs/bayleybay.h
View file

@ -19,10 +19,6 @@
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x006ff000

4
include/configs/conga-qeval20-qa3-e3845.h
View file

@ -19,10 +19,6 @@
"stdout=serial\0" \
"stderr=serial\0"
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO

3
include/configs/cougarcanyon2.h
View file

@ -17,9 +17,6 @@
"stdout=serial,vga\0" \
"stderr=serial,vga\0"
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x5ff000

3
include/configs/crownbay.h
View file

@ -21,9 +21,6 @@
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0

4
include/configs/dfi-bt700.h
View file

@ -24,10 +24,6 @@
"stdout=serial\0" \
"stderr=serial\0"
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX

4
include/configs/minnowmax.h
View file

@ -22,10 +22,6 @@
"stderr=vidconsole,serial\0" \
"usb_pgood_delay=40\0"
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO

10
include/configs/qemu-x86.h
View file

@ -23,11 +23,7 @@
* ATA/SATA support for QEMU x86 targets
* - Only legacy IDE controller is supported for QEMU '-M pc' target
* - AHCI controller is supported for QEMU '-M q35' target
*
* Default configuraion is to support the QEMU default x86 target
* Undefine CONFIG_IDE to support q35 target
*/
#ifdef CONFIG_IDE
#define CONFIG_SYS_IDE_MAXBUS 2
#define CONFIG_SYS_IDE_MAXDEVICE 4
#define CONFIG_SYS_ATA_BASE_ADDR 0
@ -38,12 +34,6 @@
#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
#define CONFIG_ATAPI
#undef CONFIG_SCSI_AHCI
#else
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI}
#endif
/* SPI is not supported */
#define CONFIG_SPL_FRAMEWORK

3
include/configs/som-6896.h
View file

@ -16,9 +16,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO

4
include/configs/som-db5800-som-6867.h
View file

@ -19,10 +19,6 @@
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define VIDEO_IO_OFFSET 0
#define CONFIG_X86EMU_RAW_IO

8
include/configs/x86-chromebook.h
View file

@ -15,14 +15,6 @@
#define CONFIG_X86_REFCODE_ADDR 0xffea0000
#define CONFIG_X86_REFCODE_RUN_ADDR 0
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
#define CONFIG_PCI_MEM_BUS 0xe0000000
#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
#define CONFIG_PCI_MEM_SIZE 0x10000000