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51860 commits

Author SHA1 Message Date
Marek Vasut
f4c3e0dcf5 ARM: socfpga: clk: Drop unused variables on Arria10
The variables removed in this patch are never used, they are only ever
assigned and then waste precious memory. Drop both the assignment and
the variables.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
49e508e962 ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only
The L4SP and MMC clock precalculation is specific to Gen5, it is not
needed on Arria10/Stratix10. Isolate it to Gen5 until there is a proper
clock driver for Gen5, at which point this will go away completely.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
934aec71d6 ARM: socfpga: clk: Obtain handoff base clock via DM
Bind fixed clock driver to the base clock instantiated in the handoff
DT and use DM clock framework to get their clock rate. This replaces
the ad-hoc DT parsing present thus far.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
2af5d51cc2 ARM: socfpga: Enable DM ethernet on A10
Enable DM ethernet framework on Arria10, so that the designware GMAC
can be probed from DT as it should be.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
d6a61da462 ARM: socfpga: Remove adhoc ethernet reset and configuration
Remove ad-hoc ethernet syscon registers configuration and reset support.
Reset is now handled by the reset framework and the syscon registers are
set in the dwmac_socfpga.c driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
6385a8a964 ARM: socfpga: Zap unused reset code
Remove code from the reset manager that is never called.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
215a06565a net: designware: socfpga: Add Arria10 extras
Add wrapper around the designware MAC driver to handle the SoCFPGA
specific configuration bits. On Arria10, this is configuration of
syscon phy_intf.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-08-13 22:35:42 +02:00
Marek Vasut
f9edeb32a9 ARM: socfpga: Zap all the UART handling complexity
The UART reset handling is now done via reset framework using the
SoCFPGA reset driver. The UART console assignment is done using the
DM and console framework. Nuke all this comlexity, since it is just
duplicating the same functionality, badly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-08-13 22:35:40 +02:00
Marek Vasut
fe88c2fea7 ARM: socfpga: Enable DM I2C framework on A10
Enable the DM I2C framework on Arria10, so that the DM capable
Designware I2C driver can handle the reset via DM reset framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:17 +02:00
Marek Vasut
8145c1c299 ARM: socfpga: Enable DM reset framework on A10
Enable the DM reset framework and DM reset driver on Arria10 both
in U-Boot and in SPL. This lets U-Boot parse reset control from DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:17 +02:00
Marek Vasut
c29508045f ARM: dts: socfpga: Add i2c alias to A10 SoCDK
The A10 SoCDK is missing the I2C bus alias, so DM I2C cannot assign
the I2C bus a bus number. Add the missing alias.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
3d8685f155 ARM: dts: socfpga: Add missing I2C resets
The I2Cx resets are missing from DT, so the reset manager
cannot control them. Add the missing DT reset entries.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
da61e50fc4 ARM: dts: socfpga: Fix Arria10 GMAC resets
Add the GMAC0,1 OCP resets, which must also be ungated for those GMACs
to work and add GMAC2 reset and OCP resets which were missing altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
f5775e69cc ARM: dts: socfpga: Add missing UART resets
The UART0 and UART1 resets are missing from DT, so the reset manager
cannot control them. Add the missing DT reset entries.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
6f96ed7e20 ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc
The Altera reset manager block must be available very early on, since
it controls ie. UART resets. Flag it as pre-reloc.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:16 +02:00
Marek Vasut
af74658e04 ARM: socfpga: Register the FPGA on A10 in SPL again
The restructuring of the SPL dropped registration of the FPGA in SPL,
readd it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Fixes: c859f2a77d ("arm: socfpga: Restructure the SPL file")
2018-08-13 22:35:16 +02:00
Simon Goldschmidt
e4ff8420c5 arm: socfpga: gen5: combine some init code for SPL and U-Boot
Some of the code for low level system initialization in SPL's
board_init_f() and U-Boot's arch_early_init_r() is the same,
so let's combine it into a single function called from both.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 22:35:06 +02:00
Simon Goldschmidt
79a436d568 arm: socfpga: fix device trees to work with DM serial
Device trees need to have the serial console device available
before relocation and require a stdout-path in chosen at least
for SPL to have a console.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 22:35:06 +02:00
Simon Goldschmidt
c0b4fc1a1b arm: socfpga: cyclone5: handle debug uart
If CONFIG_DEBUG_UART is enabled, correctly initialize
the debug uart before console is initialized to debug
early boot problems in SPL.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 15:29:54 +02:00
Simon Goldschmidt
20905f5fa6 arm: socfpga: spl_gen5: clean up malloc_base assignment
In spl_gen5's board_init_f(), gd->malloc_base is manually assigned
at the end of the function to point to sdram.  This code is outdated
as by now, the heap is switched to sdram by the common function
spl_relocate_stack_gd() if the appropriate defines are set.

As it was, the value assigned manually was directly overwritten by
this common code, so remove the manual assignment.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 15:29:54 +02:00
Simon Goldschmidt
40c36f8d49 arm: socfpga: fix SPL on gen5 after moving to DM serial
There were NULL pointers dereferenced because DM was used
too early without correct initialization:
- malloc_simple returned NULL when called from preloader_console_init()
  because gd->malloc_limit was 0
- uclass_add dereferenced gd->uclass_root members which were NULL because
  dm_init (or one of its relatives) has not been called.

All this is fixed by calling spl_early_init before calling
preloader_console_init.

This fixes commit 73172753f4 ("ARM: socfpga: Convert to DM serial")

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13 15:29:54 +02:00
Stephen Warren
a032e0a6ae travis: give every job a name
Travis CI now supports giving jobs an explicit name. Do this for all jobs.
This allows more direct control over jobs names than the previous
automatic or implicit naming based on the environment variables or script
text.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
[trini: Update names for jobs added/changed since posting]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-10 13:50:30 -04:00
Rob Bracero
2846ea81a0 elf: Add support for PPC64 ELF V1 ABI in bootelf
This update adds PPC64 ELF V1 ABI support to bootelf for both the
program header and section header options. Elf64 support was already
present for the program header option, but it was not handling the
PPC64 ELF V1 ABI case. For the PPC64 ELF V1 ABI, the e_entry field of
the elf header must be treated as function descriptor pointer instead
of a function address. The first doubleword of the function descriptor
is the function's entry address.

Signed-off-by: Rob Bracero <robbracero@gmail.com>
[trini: Fix whitespace issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-10 13:50:15 -04:00
Ramon Fried
9beb490610 db410c: Fixup DRAM
Call the MSM DRAM detection and fixup function to support
dynamic detection of onboard memory.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-10 13:45:35 -04:00
Ramon Fried
36adb7c9e8 snapdragon: Add DRAM detection & FDT fixup
Fixup the Linux FDT with the detection of onboard DRAM as
provided by SBL (Secondary boot loader) by reading
the shared-memory region.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-10 13:45:35 -04:00
Sam Protsenko
8f690848b8 disk: part: Don't show redundant error message
Underlying API should already print some meaningful error message, so
this one is just brings more noise. E.g. we can see log like this:

    MMC: no card present
    ** Bad device mmc 0 **

Obviously, second error message is unwanted. Let's only print it in case
when DEBUG is defined to keep log short and clear.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-10 13:45:34 -04:00
Sam Protsenko
13bbfb4a39 env: Don't show "Failed" error message
"Failed" error message from env_load() only clutters the log with
unnecessary details, as we already have all needed warnings by that
time. Example:

    Loading Environment from FAT... MMC: no card present
    ** Bad device mmc 0 **
    Failed (-5)

Let's only print it in case when DEBUG is defined to keep log clear.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-10 13:45:34 -04:00
Christian Gmeiner
60a4df3262 smbios: fix checkstyle warning
Fixes the following checkstyle warning:

WARNING: Missing a blank line after declarations
+               int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++);
+               max_struct_size = max(max_struct_size, tmp);

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-10 13:45:34 -04:00
Christian Gmeiner
5113ff8a91 smbios: fix checkstyle error
Fixes the following chechpatch -f error:

ERROR: "(foo*)" should be "(foo *)"
+               strncpy((char*)t->uuid, serial_str, sizeof(t->uuid));

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-10 13:45:34 -04:00
Simon Goldschmidt
fd15a9e256 doc: FIT image: clarify usage of "compression" property
Compressed images should have their compression property
set to "none" if U-Boot should leave them compressed.

This is especially the case for compressed ramdisks that
should be uncompressed by the kernel only.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-08-10 13:45:33 -04:00
Adam Ford
ea975fe16b configs: omap3_logic: Disable NAND ID during SPL
For these boards, the GPMC timings are more determined by
processor speed/type than the NAND/PoP memory.  This code
is never invoked, so disable the config option, so it doesn't
take the time to compile it in.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-10 13:45:33 -04:00
Adam Ford
ab5814f992 configs: omap: Remove dead config CONFIG_SYS_NAND_ADDR
CONFIG_SYS_NAND_ADDR is defined and never referenced. This patch
removes the dead code.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-10 13:45:33 -04:00
Heinrich Schuchardt
76a472dc44 doc: README.iscsi: make compatible with restructured text
The Sphinx documentation system uses restructured text.
Make the README.iscsi file compatible.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10 13:45:32 -04:00
Heinrich Schuchardt
0445978806 doc: add structure to Sphinx generated docs
Create separate html pages for linker lists, the serial subsystem,
and the EFI subsystem.

Add a table of content.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10 13:45:32 -04:00
Heinrich Schuchardt
1b04047a87 README: U_BOOT_ENV_CALLBACK functions
Describe the interface of environment variable callback functions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10 13:45:32 -04:00
Heinrich Schuchardt
938b05a5d7 drivers: serial: document on_baudrate()
Add parameter description.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-10 13:45:32 -04:00
Adam Ford
f43674cf82 omap3_logic: Fix CONS_INDEX
The console index for SPL should be 1 not 3 in order to see text during
SPL.

Fixes: 6f6b7cfa89 ("Convert all of CONFIG_CONS_INDEX to Kconfig")
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-08-10 13:45:10 -04:00
Troy Kisky
7e83f1d5e8 sata: fix sata_Probe return value check
sata_probe returns 1 for failure, so don't checkout for < 0

fixes: f19f1ecb60 dm: sata: Support driver model with the 'sata' command

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
17585e2dc3 sandbox: led: use new function to configure default state
Initialize the led with the default state defined in device tree
in board_init and solve issue with test for led default state.

Reviewed-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
1f5118b4d3 stm32mp1: use new function led default state
Initialize the led with the default state defined in device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
d7a435a2ce dm: led: move default state support in led uclass
This patch save common LED property "default-state" value
in post bind of LED uclass.
The configuration for this default state is only performed when
led_default_state() is called;
It can be called in your board_init()
or it could added in init_sequence_r[] in future.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
1f6d81fe33 Revert "dm: led: auto probe() LEDs with "default-state""
This reverts commit bc882f5d5c.
because this patch adds the probe of LED driver during the
binding phasis. It is not allowed in driver model because
the drivers (clock, pincontrol) needed by the LED driver can
be also probed before the binding of all the device and
it is a source of problems.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Patrick Delaunay
8e1665102f stm32mp1: add gpio led support
This patch add the 4 LED available on the ED1 board and activated
gpio led driver.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-08-10 10:27:32 -04:00
Tom Rini
cdec3ea7e4 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-08-10 07:21:02 -04:00
Tom Rini
f05ebbf47a bcm968380gerg: Add MAINTAINERS file
Add an initial MAINTAINERS file based on author of the code.

Cc: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-09 11:48:39 -04:00
Tom Rini
b243f41f12 Merge git://git.denx.de/u-boot-dm 2018-08-09 11:10:41 -04:00
Tom Rini
9d17682a57 Merge branch 'master' of git://git.denx.de/u-boot-mips 2018-08-08 20:02:39 -04:00
Sam Protsenko
28a5c88043 dfu: Provide more verbose error message
It might be useful for user to see some human-readable root cause
message in addition to "configuration failed" message, so that the issue
can be fixed quickly.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-08 22:22:08 +02:00
Sam Protsenko
87a8ca985b dfu: Fix memory leak in dfu_init_env_entities()
In case of error in dfu_init_env_entities(), env_bkp will leak. Fix it
by providing single return path.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-08 22:22:08 +02:00
Sam Protsenko
feaa7856f5 dfu: Fix data abort in dfu_free_entities()
Commit 5d8fae7916 ("dfu: avoid memory leak") brings a regression which
described below. This patch is effectively reverting that commit, adding
corresponding comment to avoid such regressions in future.

In case of error in dfu_config_entities(), it frees "dfu" array, which
leads to "data abort" in dfu_free_entities(), which tries to free the
same array (and even tries to access it from linked list first). The
issue occurs e.g. when partition table on device does not match
$dfu_alt_info layout:

    => dfu 0 mmc 1
    Couldn't find part #2 on mmc device #1
    DFU entities configuration failed!
    data abort

To fix this issue, do not free "dfu" array in dfu_config_entities(). It
will be freed later in dfu_free_entities().

Tested on BeagleBone Black (where this regression was originally found).

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-08 22:22:08 +02:00