This patch corrected the nr_blocks used for W25Q32DW SPI flash.
nr_blcoks are incorrectly assigned on below patch
"sf: winbond: add W25Q32DW"
(sha1: 772ba15474)
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Add support for Winbond W25Q80BW SPI flash.
This patch corrected the flash name, nr_blocks and
also commit message header from below patch.
"sf: winbond: add W25Q32"
(sha1: c969abc470)
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
As the per the ID tabl the flash is under Uniform 64-kB sector
architecture, hence updated with proper name.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
This patch adds a print messages while using 'sf read' and
'sf write' commands to make sure that how many bytes read/written
from/into flash device.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Tom Rini <trini@ti.com>
This patch adds a print messages while using 'sf erase' command
to make sure that how many bytes erased in flash device.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Tom Rini <trini@ti.com>
Missing return after memcpy is done for memory-mapped SPI flashes,
hence added retun 0 after memcpy done.
The return is missing in below patch
"sf: Enable FDT-based configuration and memory mapping"
(sha1: bb8215f437)
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:
- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.
- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).
To produce this update I used tag v3.7.1 of linux-stable repository.
The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
[scottwood@freescale.com: some eccstrength and build fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Add support for Winbond's W25PXX SPI flash.
These devices is used on Faraday A369 evaluation board.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
CC: Tom Rini <trini@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Add support for Winbond W25Q256 SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
This is a S25FL064A successor. It supports up to 104MHz bus
speed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
SPANSION recommend S25FL128S supersedes S25FL129P, and the two flash
memory have the same device ID and Memory architecture. So they can
use the same config parameters.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
When base address given was out of valid flash address ranges,
flash_get_info() function returned the pointer to the last
element of flash_info[i] array.
This patch changes this function to return NULL pointer
in such a case, which is more correct behaviour.
The function flash_protect_default() calls flash_protect()
immediately after flash_get_info() invocation.
With this correction, flash_protect() function would be
able to return soon, for NULL flash_info.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Linux Kernel Documentation/CodingStyle says:
Do not add a space after unary operators such as &, *, ...
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-munaligned-access option: flash initialization hangs, probably
due to data error.
Since the structure is supposed to replicate the actual data layout
in CFI Flash chips, the alignment issue can't be fixed in the structure.
So, unaligned fields need using of explicit unaligned access macros.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Stefan Roese <sr@denx.de>
When a all 0xFF buffer is passed to drop_ffs, the no-0xFF check loop
will loop forever.
After the fix, If ssize_t i = -1 and size_t l = i + 1, the value of l
will still be 0 as expected.
Signed-off-by: Tao Hou <hotforest@gmail.com>
Cc: Ben Gardiner <bengardiner@nanometrics.ca>
Cc: Scott Wood <scottwood@freescale.com>
When writelen is mtd->writesize - 1, it is still a partial page write
Signed-off-by: Tao Hou <hotforest@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
This avoids needing a separate U-Boot config when some revisions
of a board have small-page NAND and other revisions have large-page
NAND (except for NAND SPL targets).
CONFIG_FSL_ELBC_FMR is removed -- it was never used nor documented, and
it gets in the way of this change.
Signed-off-by: Scott Wood <scottwood@freescale.com>
The manual resolution in commit ec7023db wrongly removed functions
nand_init and nand_deselect from file drivers/mtd/nand/mxc_nand_spl.c.
Revert this removal.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Stefano Babic <sbabic@denx.de>
This patch adds a driver for the diskonchip G4 nand flash device. It is based
on the driver from the linux kernel.
This also includes a separate SPL driver. A separate SPL driver is used because
the device operates in a different mode (reliable mode) when loading a boot
image, and also because the storage format of the boot image is different from
normal data (pages are stored redundantly). The SPL driver basically mimics how
a typical IPL reads data from the device. The special operating mode and
storage format are used to compensate for the fact that the IPL does not contain
the BCH ecc decoding algorithm (due to size constraints). Although the u-boot
SPL *could* use ecc, it operates like an IPL for the sake of simplicity and
uniformity, since the IPL and SPL share the task of loading the u-boot image.
As a side benefit, the SPL driver is very small.
[port from linux kernel 3.4 commit 570469f3bde7f71cc1ece07a18d54a05b6a8775d]
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Add support for generic NAND SPL via the SPL framework into the
mxc_nand_spl driver. This is basically just a simple rename and
publication of the already implemented functions. To avoid the
bare-bones functions getting in the way of the NAND_SPL, build
them only if CONFIG_SPL_FRAMEWORK is not defined.
Also make sure the requested payload is aligned to full pages,
otherwise this simple driver fails to load the last page.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Delete all occurrences of hang() and provide a generic function.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
[trini: Modify check around puts() in hang.c slightly]
Signed-off-by: Tom Rini <trini@ti.com>
The following headers are moved to a i.MX common location:
- regs-common.h
- regs-apbh.h
- regs-bch.h
- regs-gpmi.h
- dma.h
This way this header can be re-used also by other i.MX platforms.
For example the i.MX6 which will need it for the upcoming NAND
support.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
If CONFIG_NAND_ECC_BCH is set use 4-bit error correction code instead of
the 1-bit error correction code on the NAND device.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so
remove associated code. It will still be possible to restore it later from the
Git history if necessary.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
This also fixes support for mx31pdk and tx25, which had been broken by commit
e05e5de7fa.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
The syndrome functions should use the page number passed as argument instead of
the page number saved upon NAND_CMD_READ0.
This does not make any difference if the NAND_NO_AUTOINCR option is set, but
otherwise this fixes accesses to the wrong pages.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
The page number indicated in the debug trace of mxc_nand_read_oob_syndrome() did
not match the page being worked on.
By the way, replace the GCC-specific __FUNCTION__ with __func__.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Add some abstraction to NFC definitions so that some parts of the current code
can also be used for future i.MX5 code.
Clean up a few things by the way.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Currently is_16bit_nand() is a per SoC function and it decides the bus nand
width by reading some boot related registers.
This method works when NAND is the boot medium, but does not work if another
boot medium is used. For example: booting from a SD card and then using NAND
to store the environment variables, would lead to the following error:
NAND bus width 16 instead 8 bit
No NAND device found!!!
0 MiB
Use CONFIG_SYS_NAND_BUSWIDTH_16BIT symbol to decide the bus width.
If it is defined in the board file, then consider 16-bit NAND bus-width,
otherwise assume 8-bit NAND is used.
This also aligns with Documentation/devicetree/bindings/mtd/nand.txt, which
states:
nand-bus-width : 8 or 16 bus width if not present 8
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller
drivers could use it when a 16-bit NAND is deployed.
drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
other NAND drivers could reuse the same symbol.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
The unwind code was not reversing operations correctly and was causing
a hang on any error condition.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
We make these two functions take a size_t pointer to how much space
was used on NAND to read or write the buffer (when reads/writes happen)
so that bad blocks can be accounted for. We also make them take an
loff_t limit on how much data can be read or written. This means that
we can now catch the case of when writing to a partition would exceed
the partition size due to bad blocks. To do this we also need to make
check_skip_len count not just complete blocks used but partial ones as
well. All callers of nand_(read|write)_skip_bad are adjusted to call
these with the most sensible limits available.
The changes were started by Pantelis and finished by Tom.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Tom Rini <trini@ti.com>
The kernel states:
---8<---
The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not
provide automatic error location and correction: this step is implemented using
the BCH library.
--->8---
And we do so in u-boot.
This implementation uses the same layout for BCH8 but it is fix. The current
provided layout does only work with 64 Byte OOB.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Mansoor Ahamed <mansoor.ahamed@ti.com>
Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
With uppcoming BCH support on OMAP devices we need to decide between differnt
algorithms when switching the ECC engine. Currently we support 1-bit hammign
and 8-bit BCH on HW backend.
In order to switch between differnet ECC algorithms we need to change the
interface of omap_nand_switch_ecc() also.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
arch/arm/include/asm/arch-am33xx/omap_gpmc.h and
arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate
the common parts into a new header.
Introduce a new asm/omap_gpmc.h which defines the command part and pulls in
the architecture specific one.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
This fixes this build warning:
Configuring for qemu_mips64 - Board: qemu-mips64, Options: SYS_BIG_ENDIAN
text data bss dec hex filename
215344 13082 218720 447146 6d2aa qemu_mips64/u-boot
cfi_flash.c: In function 'flash_map':
cfi_flash.c:217:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
