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https://github.com/AsahiLinux/u-boot
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sf: Enable FDT-based configuration and memory mapping
Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org>
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parent
5e6fb69778
commit
bb8215f437
4 changed files with 48 additions and 1 deletions
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@ -8,6 +8,7 @@
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <malloc.h>
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#include <spi.h>
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#include <spi_flash.h>
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@ -15,6 +16,8 @@
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#include "spi_flash_internal.h"
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DECLARE_GLOBAL_DATA_PTR;
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static void spi_flash_addr(u32 addr, u8 *cmd)
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{
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/* cmd[0] is actual command */
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@ -146,6 +149,10 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
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{
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u8 cmd[5];
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/* Handle memory-mapped SPI */
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if (flash->memory_map)
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memcpy(data, flash->memory_map + offset, len);
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cmd[0] = CMD_READ_ARRAY_FAST;
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spi_flash_addr(offset, cmd);
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cmd[4] = 0x00;
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@ -275,6 +282,34 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
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return 0;
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}
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#ifdef CONFIG_OF_CONTROL
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int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
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{
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fdt_addr_t addr;
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fdt_size_t size;
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int node;
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/* If there is no node, do nothing */
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node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
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if (node < 0)
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return 0;
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addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
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if (addr == FDT_ADDR_T_NONE) {
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debug("%s: Cannot decode address\n", __func__);
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return 0;
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}
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if (flash->size != size) {
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debug("%s: Memory map must cover entire device\n", __func__);
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return -1;
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}
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flash->memory_map = (void *)addr;
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return 0;
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}
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#endif /* CONFIG_OF_CONTROL */
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/*
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* The following table holds all device probe functions
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*
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@ -391,9 +426,18 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
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goto err_manufacturer_probe;
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}
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#ifdef CONFIG_OF_CONTROL
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if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
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debug("SF: FDT decode error\n");
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goto err_manufacturer_probe;
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}
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#endif
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printf("SF: Detected %s with page size ", flash->name);
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print_size(flash->sector_size, ", total ");
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print_size(flash->size, "\n");
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print_size(flash->size, "");
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if (flash->memory_map)
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printf(", mapped at %p", flash->memory_map);
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puts("\n");
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spi_release_bus(spi);
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@ -86,6 +86,7 @@ enum fdt_compat_id {
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COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
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COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
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COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
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COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */
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COMPAT_COUNT,
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};
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@ -39,6 +39,7 @@ struct spi_flash {
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/* Erase (sector) size */
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u32 sector_size;
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void *memory_map; /* Address of read-only SPI flash access */
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int (*read)(struct spi_flash *flash, u32 offset,
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size_t len, void *buf);
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int (*write)(struct spi_flash *flash, u32 offset,
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@ -59,6 +59,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
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COMPAT(SAMSUNG_EXYNOS_EHCI, "samsung,exynos-ehci"),
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COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
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COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686_pmic"),
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COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
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};
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const char *fdtdec_get_compatible(enum fdt_compat_id id)
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