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4632 commits

Author SHA1 Message Date
James Yang
e9ea679918 85xx: Show DDR memory data rate in addition to the memory clock frequency.
Show the DDR memory data rate in addition to the memory clock
frequency.  For DDR/DDR2 memories the memory data rate is 2x the
memory clock.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
James Yang
591933ca6e 85xx: get_tbclk() speed up and rounding fix
Speed up get_tbclk() by referencing pre-computed bus clock
frequency value from global data instead of sys_info_t.  Fix
rounding of result to nearest; previously it was rounding
upwards.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
Andy Fleming
1ced121600 Update SVR numbers to expand support
FSL has taken to using SVR[16:23] as an SOC sub-version field.  This
is used to distinguish certain variants within an SOC family.  To
account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
constants to reflect the larger value.  We also add SVR numbers for all
of the current variants.  Finally, to make things neater, rather than
use an enormous switch statement to print out the CPU type, we create
and array of SVR/name pairs (using a macro), and print out the CPU name
that matches the SVR SOC version.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-03-26 11:43:04 -05:00
Andy Fleming
b83eef440c Add the Freescale PCI device IDs
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-03-26 11:43:04 -05:00
Kumar Gala
7aff0c051a 85xx: Added support for multicore boot mechanism
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.

Added support for using the ePAPR defined spin-table mechanism on 85xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-03-26 11:43:03 -05:00
Kumar Gala
ec2b74ffd3 85xx: Added support for multicore boot mechanism
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.

Added support for using the ePAPR defined spin-table mechanism on 85xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:03 -05:00
Kumar Gala
f69766e4b5 85xx: Add the concept of CFG_CCSRBAR_PHYS
When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.

For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:03 -05:00
Wolfgang Denk
5b5eb9ca5b Coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-26 15:38:47 +01:00
Joakim Tjernlund
da8808df7a Add CFG_RTC_DS1337_NOOSC to turn off OSC output
The default settings for RTC DS1337 keeps the OSC
output, 32,768 Hz, on. This add CFG_RTC_DS1337_NOOSC to
turn it off.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2008-03-26 15:17:42 +01:00
Wolfgang Denk
438a4c1126 Cleanup coding style, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-26 11:48:46 +01:00
Wolfgang Denk
b951f8d317 Merge branch 'master_merge_new-image' of /home/tur/git/u-boot 2008-03-26 10:41:48 +01:00
Wolfgang Denk
218ca724c0 README: update documentation (availability, links, etc.)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-26 10:40:12 +01:00
Bartlomiej Sieka
27f33e9f45 Merge branch 'new-image' of git://www.denx.de/git/u-boot-testing
Conflicts:

	common/cmd_bootm.c
	cpu/mpc8xx/cpu.c

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-26 09:38:06 +01:00
Aras Vaichas
f6b44e0e4d USB Storage, add meaningful return value
This patch changes the "usb storage" command to return success if it
finds a USB storage device, otherwise it returns error.

Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-03-26 09:23:23 +01:00
Anton Vorontsov
18e69a35ef 83xx/fdt_support: let user specifiy FSL USB Dual-Role controller role
Linux understands "host" (default), "peripheral" and "otg" (broken).
Though, U-Boot doesn't restrict dr_mode variable to these values (think
of renames in future).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:19:39 -05:00
Anton Vorontsov
c7604783b2 tsec: fix link detection for the RTL8211B PHY
RTL8211B sets link state register after autonegotiation complete,
so with bootdelay=0 RTL8211B will report lack of the link.

To fix this, we should wait for aneg to complete, even if the
link is currently down.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:48 -05:00
Anton Vorontsov
7fa9cbb00d mpc83xx: add "fsl,soc" and "fsl,immr" compatible fixups
device_type = "soc" is being deprecated, newer device trees will use
"fsl,soc" and/or "fsl,immr" for the soc nodes.

This patch also adds clock-frequency property for soc nodes (the same
value as bus-frequency).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:48 -05:00
Joe D'Abbraccio
507e2d79c9 Modified the DDR SDRAM clock control register to delay MCK/MCK_B 3/4 clock
With the original value of 1/2 clock cycle delay, the system ran relatively
stable except when we run benchmarks that are intensive users of memory.
When I run samba connected disk with a HDBENCH test, the system locks-up
or reboots sporadically.

Signed-off by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
2008-03-25 19:16:48 -05:00
Scott Wood
a7ba32d480 mpc83xx: Set PCI I/O bus-address base to zero.
The device trees for these boards describe PCI I/O as starting from
address zero from the device's perspective.

Placing I/O elsewhere may cause problems with certain PCI boards, and may
cause problems with Linux.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-03-25 19:16:48 -05:00
Anton Vorontsov
f700e7df7f mpc83xx: MPC8360E-RDK: use 33.3(3)MHz CLKIN/SYS_CLK
At least on the "33MHz Pilot" board crystal is actually 33.3MHz.
This patch fixes "system time drifting" problem.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
3a0cfdd576 mpc83xx: MPC8360E-RDK: define CONFIG_OF_STDOUT_VIA_ALIAS
This is needed to update /choosen/linux,stdout-path properly.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
3419eb62f0 mpc83xx: MPC8360E-RDK: add dhcp command
Plus modify environment to use it and remove bootfile env variable,
it is internal and CONFIG_BOOTFILE is used for these purposes.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
d892b2dbb4 mpc83xx: MPC8360E-RDK: rework ddr setup, enable ecc
Current DDR setup easily causes memory corruption, this patch fixes it.

Also fix TIMING_CFG0_MRS_CYC definition.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
d47d49cc37 mpc83xx: MPC8360E-RDK: configure pario pins for AD7843 and FHCI
This patch adds qe pario pins configuration for AD7843 ADC/Touchscreen
controller and FHCI (QE USB).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
7ad9594909 mpc83xx: MPC8360E-RDK: add support for NAND
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:46 -05:00
Anton Vorontsov
9a3e832aeb mpc83xx: MPC8360E-RDK: use RGMII_RXID interface mode
This is needed for BCM PHYs to work on this board.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:46 -05:00
Anton Vorontsov
300615dc5d uec: add support for Broadcom BCM5481 Gigabit PHY
This patch adds basic support for Broadcom BCM5481 PHY.

RXD-RXC delay quirk comes from MPC8360E-RDK BSP source, author is
Peter Barada <peterb@logicpd.com>.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:46 -05:00
Anton Vorontsov
6a600c3a18 uec: add support for RGMII_RXID interface mode
PHY drivers will use it to setup software delay between RXD and RXC
signals.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:46 -05:00
Anton Vorontsov
91cdaa3a9d uec: add support for gbit mii status readings
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Anton Vorontsov
aabce7fb50 83xx: define CONFIG_OF_STDOUT_VIA_ALIAS for the MPC837XERDB boards
This is primarily for the early console support.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Anton Vorontsov
2bd7460e92 83xx: initialize serdes for MPC837XRDB boards
On the MPC8377ERDB: 2 SATA and 2 PCI-E.
On the MPC8378ERDB: 2 PCI-E
On the MPC8379ERDB: 4 SATA

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Anton Vorontsov
453316a2a1 83xx: serdes setup routines
This patch adds few routines to configure serdes on 837x targets.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Anton Vorontsov
a796cdf9c3 83xx: split COBJS onto separate lines
..plus get rid of some #ifdefs in the .c files.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:44 -05:00
Anton Vorontsov
46a3aeea73 83xx: nand support for MPC837XRDB boards
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:44 -05:00
Jerry Van Baren
82e45a2041 Enable CONFIG_FLASH_SHOW_PROGRESS on the MPC8360EMDS.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:44 -05:00
Michael Barkowski
0fa7a1b471 mpc8323erdb: remove RTC and add EEPROM
There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:44 -05:00
Michael Barkowski
5bbeea86eb mpc8323erdb: Improve the system performance
The following changes are based on kernel UCC ethernet performance:

1.  Make the CSB bus pipeline depth as 4, and enable the repeat mode
2.  Optimize transactions between QE and CSB.  Added CFG_SPCR_OPT
    switch to enable this setting.

The following changes are based on the App Note AN3369 and
verified to improve memory latency using LMbench:

3.  CS0_CONFIG[AP_n_EN] is changed from 1 to 0
4.  CS0_CONFIG[ODT_WR_CONFIG] set to 1.  Was a reserved setting
    previously.
5.  TIMING_CFG_1[WRREC] is changed from 3clks to 2clks  (based on
    Twr=15ns, and this was already the setting in DDR_MODE)
6.  TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
    Trp=15ns)
7.  TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
    Tras=40ns)
8.  TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
    Trcd=15ns)
9.  TIMING_CFG_1[REFREC] changed from 21 clks to 11clks.  (based on
    Trfc=75ns)
10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks.  (based
    on Tfaw=50ns)
11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
    on CL=3 and WL=2).

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:44 -05:00
Michael Barkowski
fc549c871f mpc8323erdb: use readable DDR config macros
Use available shift/mask macros to define DDR configuration.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:43 -05:00
Timur Tabi
89c7784ed9 83xx: Add Vitesse VSC7385 firmware uploading
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware.  Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:43 -05:00
Timur Tabi
b55d98c6d5 NET: Add Vitesse VSC7385 firmware uploading
The Vitesse VSC7385 is a 5-port switch found on the Freescale MPC8349E-mITX
and other boards.  A small firwmare must be uploaded to its on-board memory
before it can be enabled.  This patch adds the code which uploads firmware
(but not the firmware itself).

Previously, this feature was provided by a U-Boot application that was
made available only on Freescale BSPs.  The VSC7385 firmware must still
be obtained separately, but at least there is no longer a need for a separate
application.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-25 19:16:43 -05:00
Wolfgang Denk
aa6f6d171a Coding Style cleanyp; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-26 00:52:10 +01:00
Wolfgang Denk
6525489323 Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-03-26 00:44:52 +01:00
Wolfgang Denk
08e9443230 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx 2008-03-26 00:44:32 +01:00
Jerry Van Baren
43ddd9c820 Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T
These defines embedded the u-boot env variables and/or the bd_t structure
in the fdt blob.  The conclusion of discussion on the u-boot email list
was that embedding these in the fdt blob is not useful: there are better
ways of passing the data (in fact, the fdt blob itself replaces the
bd_t struct).

The only board that enables these is the stxxtc and they don't appear
to be used by linux.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-26 00:22:39 +01:00
Stefan Roese
22ed228574 rtc: Remove 2nd reference to max6900.o in drivers/rtc/Makefile
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-26 00:06:19 +01:00
Kyungmin Park
1bb707c39a Add Flex-OneNAND booting support
Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array
using a NOR Flash interface. This on-chip integration enables system designers
to reduce external system logic and use high-density NAND Flash
in applications that would otherwise have to use more NOR components.

Flex-OneNAND enables users to configure to partition it into SLC and MLC areas
in more flexible way. While MLC area of Flex-OneNAND can be used to store data
that require low reliability and high density, SLC area of Flex-OneNAND
to store data that need high reliability and high performance. Flex-OneNAND
can let users take advantage of storing these two different types of data
into one chip, which is making Flex-OneNAND more cost- and space-effective.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2008-03-26 00:05:32 +01:00
André Schwarz
c512389cc4 MPC5200: support setup without FEC
Include FEC specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is
defined. Systems without FEC, i.e. no FEC node in DTB, should be possible.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2008-03-25 23:59:43 +01:00
Jon Loeliger
aa3511e422 FSL: Move board/mpc8266ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 23:00:40 +01:00
Jon Loeliger
7f1d846e5c FSL: Move board/mpc7448hpc2 under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 23:00:36 +01:00
Jon Loeliger
b7e24d283e FSL: Move board/mpc8260ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 23:00:00 +01:00