Commit graph

13979 commits

Author SHA1 Message Date
Masahiro Yamada
e885c5a602 ARM: dts: uniphier: sync DT with Linux 4.18-rc1
Now that the clock-frequency information has been moved to the
driver, more DT sync is possible.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-23 01:28:16 +09:00
Tom Rini
dc7df68f21 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-06-21 09:02:35 -04:00
Beniamino Galvani
2e668af553 meson: use the clock driver
Use the clk framework to initialize clocks from drivers that need them
instead of having hardcoded frequencies and initializations from board
code.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-19 07:31:47 -04:00
Beniamino Galvani
c0fc1e215c clk: add Amlogic meson clock driver
Introduce a basic clock driver for Amlogic Meson SoCs which supports
enabling/disabling clock gates and getting their frequency.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-19 07:31:47 -04:00
Ramon Fried
018e8637b8 configs: dragonboard410c: remove env partition offset
BOOT2 is not partitioned, no need for partition offset.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-19 07:31:46 -04:00
Michal Simek
20b016a336 common: Fix cpu nr type which is always unsigned type
cpu_cmd() is reading cpu number via simple_strtoul() which is always
unsigned type.
Platform code implementations are not expecting that nr can be negative
and there is not checking in the code for that too.

This patch is using u32 type for cpu number to make sure that platform
code get proper value range.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-19 07:31:45 -04:00
Marek Vasut
7f13b374fd ARM: image: Add option for ignoring ep bit 3
Add option to the booti_setup() which indicates to it that the caller
requires the image to be relocated to the beginning of the RAM and
that the information whether the image can be located anywhere in RAM
at 2 MiB aligned boundary or not is to be ignored. This is useful ie.
in case the Image is wrapped in another envelope, ie. fitImage and not
relocating it but moving it would corrupt the envelope.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Chen <bin.chen@linaro.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-By: Bin Chen <bin.chen@linaro.org>
2018-06-19 07:31:45 -04:00
Marek Vasut
2c84d5218e ARM: dts: rmobile: Add HS200 support to E3 Ebisu
Add regulator nodes and pinmux settings to the SDHI3 on E3 Ebisu
and enable HS200 mode on it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Marek Vasut
ea273e8d72 ARM: dts: rmobile: Move the PHY reset GPIOs into PHY nodes
Both the RAVB and SH ether driver now support parsing the PHY reset
GPIOs from both the PHY nodes and the MAC nodes, move the reset GPIOs
back into the PHY nodes to minimize DT difference between U-Boot and
Linux.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Marek Vasut
24417edfff ARM: dts: rmobile: Move the PHY reset GPIO back
The current state of RAVB driver expects the PHY reset GPIO in the
RAVB mode, move it back from the PHY node to avoid breakage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-19 06:15:55 +02:00
Adam Ford
bd8a9c14c9 arm: mach-omap2/omap3/clock.c: Enable all GPIO with CMD_GPIO
When CMD_GPIO is enabled the command 'gpio status -a' can cause
a hang or reboot if GPIO banks are not enabled, because it scans
all banks.  This patch enables all GPIO banks so 'gpio status -a'
can fully execute.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-18 14:43:13 -04:00
Andrew F. Davis
a1b73c1872 arm: Do not clear LR on exception in SPL
When an exception or interrupt occurs the link register (LR) may
contain the source of the exception, although we do not print the
value it may still be extracted with a debugger. When in SPL we
loop on getting and exception, but use a linking branch, which
over-writes the LR value, use a regular branch instruction here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-06-18 14:43:13 -04:00
Masahiro Yamada
28b538b69d .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore
Follow Linux commit 10b62a2f785a (".gitignore: move *.dtb and *.dtb.S
patterns to the top-level .gitignore").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-06-18 14:43:12 -04:00
Adam Ford
8e51c0f254 dm: gpio: Add DM compatibility to GPIO driver for Davinci
This adds DM_GPIO support for the davinici GPIO driver with
DT support.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-18 14:43:12 -04:00
Ramon Fried
95a773005c db410c: fix alignment of dts file
Alignment was wrong, missing one tab. fix it.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-06-18 14:02:04 -04:00
Chris Packham
9508ecfbcb ARM: sunxi: remove empty #ifdef/endif block
Whatever code this was guarding has been removed so remove the guards
too.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-06-18 14:02:03 -04:00
Chris Packham
1b65c86e87 m68k: Remove empty #ifdef/#ifndef block
Whatever code this was guarding has been removed so remove the guards
too.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-06-18 14:02:03 -04:00
Tom Rini
378b29cbc6 Merge git://git.denx.de/u-boot-x86 2018-06-18 12:59:46 -04:00
Bin Meng
0102023966 x86: efi: app: Display correct CPU info during boot
Currently when EFI application boots, it says:

  CPU: x86_64, vendor <invalid cpu vendor>, device 0h

Fix this by calling x86_cpu_init_f() in arch_cpu_init().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
3ebd892fda x86: Rename efi-x86 target to efi-x86_app
To avoid confusion, let's rename the efi-x86 target to efi-x86_app.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
d441ec8298 x86: efi: payload: Add EFI framebuffer driver support
This turns on the EFI framebuffer driver support so that a graphics
console can be of additional help.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
252d41f1ae x86: baytrail: Drop EFI-specific test logics
Now that we have generic EFI payload support, drop EFI-specific test
logics in BayTrail Kconfig and codes, and all BayTrail boards too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
93c7b879c7 x86: Drop QEMU-specific EFI payload support
Now that we have generic EFI payload support for all x86 boards,
drop the QEMU-specific one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
32151d4017 x86: Add generic EFI payload support
It is possible to create a generic EFI payload for all x86 boards.
The payload is configured to include as many generic drivers as
possible. All stuff that touches low-level initialization are not
allowed as such is the EFI BIOS's responsibility. Platform specific
drivers (like gpio, spi, etc) are not included.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
3773c6a20a x86: efi: payload: Add arch_cpu_init()
This adds arch_cpu_init() to the payload codes, in preparation for
supporting a generic efi payload.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
4f1dacd43f x86: efi: Refactor the directory of EFI app and payload support
At present the EFI application and payload support codes in the x86
directory is distributed in a hybrid way. For example, the Kconfig
options for both app and payload are in arch/x86/lib/efi/Kconfig,
but the source codes in the same directory get built only for
CONFIG_EFI_STUB.

This refactors the codes by consolidating all the EFI support codes
into arch/x86/cpu/efi, just like other x86 targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Ivan Gorinov
9f0b0113c9 x86: use EFI calling convention for efi_main on x86_64
UEFI specifies the calling convention used in Microsoft compilers;
first arguments of a function are passed in (%rcx, %rdx, %r8, %r9).

All other compilers use System V ABI by default, passing first integer
arguments of a function in (%rdi, %rsi, %rdx, %rcx, %r8, %r9).

These ABI also specify different sets of registers that must be preserved
across function calls (callee-saved).

GCC allows using the Microsoft calling convention by adding the ms_abi
attribute to a function declaration.

Current EFI implementation in U-Boot specifies EFIAPI for efi_main()
in the test apps but uses default calling convention in lib/efi.

Save efi_main() arguments in the startup code on x86_64;
use EFI calling convention for _relocate() on x86_64;
consistently use EFI calling convention for efi_main() everywhere.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-17 21:16:04 +08:00
Bin Meng
e3ec0d03bb x86: cherryhill: Fix DTC warning
Fix warning when compiling cherryhill.dts with latest DTC:

  "Warning (avoid_unnecessary_addr_size): /pci/pch@1f,0: unnecessary
   #address-cells/#size-cells without "ranges" or child "reg" property"

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Tom Rini
103c45fb0d Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-06-17 09:09:40 -04:00
Tom Rini
a715415bb5 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-06-16 00:07:37 -04:00
Marek Vasut
6d82ed8d37 ARM: dts: rmobile: Add AVB PHY reset on V3M Eagle
Add EtherAVB PHY reset on V3M Eagle to let the AVB driver unreset the PHY.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
29904b923e ARM: dts: rmobile: Add AVB pinmux on V3M Eagle
Add EtherAVB pinmux node on V3M Eagle to set the pinmux configuration.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
bc19d28e6d ARM: dts: rmobile: Enable SDHI on E3 Ebisu
Enable SDHI on R8A77990 E3 Ebisu in DT.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
ef6765ca62 ARM: dts: rmobile: Add initial SDHI nodes to R8A77990 E3
Add SDHI nodes to R8A77990 E3 SoC to allow SDHI operation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
65dcc809cd ARM: dts: rmobile: Add SCIF2 pinmux to E3 Ebisu
Add SCIF2 pinmux nodes to R8A77990 E3 Ebisu.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
e183a6c7f2 ARM: dts: rmobile: Add Renesas RPC HF/QSPI DT node to R8A77990
Add device tree nodes for the Renesas RPC HF/QSPI controller
to R8A77990 E3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Tom Rini
d94e89c765 Xilinx fixes for v2018.07-rc2
Zynq:
 - Fix missing watchdog header
 - DT fixes
 
 ZynqMP:
 - emmc configuration split
 - Enable SPD
 - Fix PMUFW_INIT_FILE logic
 - Coverity fixes in SoC code
 
 timer
 - Add timer_get_boot_us
 
 mmc:
 - Fix MMC HS200 tuning command
 
 serial:
 - Fix scrabled chars with OF_LIVE
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlsjtcIACgkQykllyylKDCGNTQCfWd8tBRB0MiQqJpv9VP9A4VJO
 7dQAmwQaId0+hPArxYMODQvL8rOi33L9
 =Ee+O
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2018.07-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx fixes for v2018.07-rc2

Zynq:
- Fix missing watchdog header
- DT fixes

ZynqMP:
- emmc configuration split
- Enable SPD
- Fix PMUFW_INIT_FILE logic
- Coverity fixes in SoC code

timer
- Add timer_get_boot_us

mmc:
- Fix MMC HS200 tuning command

serial:
- Fix scrabled chars with OF_LIVE
2018-06-15 09:38:06 -04:00
Michal Simek
e3c26b8d95 arm64: zynqmp: Check return value in zynqmp_mmio_rawwrite()
There should be return value check from zynqmp_mmio_read() in
zynqmp_mmio_rawwrite() to make sure that errors are propagated properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:05 +02:00
Michal Simek
3c1eaec012 arm: zynq: Drop #address-cells and #size-cells from gpio-keys
dtc is showing some warnings and this change was also done in
the Linux kernel as "Input: gpio-keys - clean up device tree binding
example"
with this fragment in commit message
"Drop #address-cells and #size-cells, which are not required by the
gpio-keys binding documentation, as button sub-nodes are not devices."

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:06:31 +02:00
Siva Durga Prasad Paladugu
bc0f4ed133 arm64: zynqmp: Split emmc configuration into emmc0 and emmc1
This patch splits the current mini emmc configuration into emmc0
and emmc1 configurations because emmc is probed at boot time and on
systems which have only one interface mini configuration is failing on
unused interface. This patch also adds required clock node in dts and
enables CONFIG_MMC_SDHCI_ZYNQ through defconfig.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:06:31 +02:00
Marek Vasut
2519a293d5 ARM: rmobile: Sync Gen3 DTS with Linux v4.17
Sync the DTs with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Marek Vasut
252c8b45c9 ARM: rmobile: Sync Gen2 DTS with Linux v4.17
Sync the DTs with Linux v4.17.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-14 22:35:21 +02:00
Tom Rini
9d0dc69235 Patch queue for efi - 2018-06-14
A few minor fixes for the release:
 
   - Compile fixes
   - HI20 relocations for RISC-V
   - Fix bootefi without load path
   - Fix Runtime Services with certain compilers
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJbIp83AAoJECszeR4D/txg98QQAKjmnamRAJDWg5L2ZW9O8F6X
 wtpVu5O9A6C8mVnt1RICPX2zgeeZ/Hx+2NIkvzj9rOon6CNt9ofNgefKJs9i7lI2
 JOCZM9In66lGJUtNvMhbmFfWboa4DZN3bhbzU0h+clErMlcXaaatEOewUHfYTSzj
 MxwQGktESvGOvZVcKPUXnFqd4dNFnBUF7yC9R903L3LXfAtSZZwmyhoEpNeUY6PK
 1KMsycOmb5alZ90QzxAsWNTMDysnwmMXZmFTyFms3uy/NlMion+p2Wx6PQJK8woT
 ImMhAF7B4c/C+Qa2n2oGrFIjSJi/8oDupKT2tLMcFEZWkyXoHbDLm2vAADBLVWIB
 9IoxOt+N+ZVI+RSUbG0MI3aNzOcbIhXb3XwSbBnvsSabT9Uv1GMCRZfAKyROJCVR
 jZx2xvOEsJZrgbPe3fM7UUlwYvOOvc+dKGYj+PjnoS8egq676GguMgGgI9PLsJOx
 S0350+lhyVkKaSJOsTaeIFoExMrvSOmFSRl2KI1eDASwYIBI/afMIK3pgIcI4W4B
 rRYGpF7jIcQzw11mEpu4DnC/yqJFmF60EywTY+pbvPKsW0GUSJ2Lt7h7f4eL1cgo
 /za3FK1mzONKQqT6imvy3E/qWam7E58jG+W0TuQsOBH7L/1YerFmtHNnwysPUOCm
 qGHYKbPExzeLtPsVsWol
 =/PaA
 -----END PGP SIGNATURE-----

Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-06-14

A few minor fixes for the release:

  - Compile fixes
  - HI20 relocations for RISC-V
  - Fix bootefi without load path
  - Fix Runtime Services with certain compilers
2018-06-14 13:28:03 -04:00
Alexander Graf
e4679489c3 efi_loader: Convert runtime reset from switch to if statements
We currently handle the UEFI runtime reset / power off case handling via
a switch statement. Compilers (gcc in my case) may opt to handle these via
jump tables which they may conveniently put into .rodata which is not part
of the runtime section, so it will be unreachable when executed.

Fix this by just converting the switch statement into an if/else statement.
It produces smaller code that is faster and also correct because we no
longer refer .rodata from efi runtime code.

Reported-by: Andreas Färber <aferber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14 10:52:14 +02:00
Tom Rini
66398944f5 Merge git://git.denx.de/u-boot-x86 2018-06-13 11:43:59 -04:00
Adam Ford
acaee30608 ARM: DTS: resync a3517.dtsi with Linux 4.17
Linux 4.17 was just released with some minor changes to the
am3517.dtsi.  This patch re-syncs the file.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-13 07:49:14 -04:00
Neil Armstrong
5b3da7fa12 ARM64: meson: Sync DT with Linux 4.17
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.17.0

This will enable USB on Amlogic Meson GXL Boards like Khadas VIM, P212 or
LibreTech-CC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-13 07:49:11 -04:00
Vasily Khoruzhick
b62cdbdded sunxi: clock: Fix EHCI and OHCI clocks on A64
EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29

Fixes commit fef73766d9 ("sunxi: clock: Fix OHCI clock gating for H3/H5")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00
Bin Meng
bee053e248 x86: cougarcanyon2: Add missing chipset interrupt information
Add Panther Point chipset interrupt pin/PIRQ information, and
enable the generation of PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
51050ff0a2 x86: irq: Support discrete PIRQ routing registers via device tree
Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume
consecutive PIRQ routing control registers. But this is not always
the case on some platforms. Introduce a new device tree property
intel,pirq-regmap to describe how the PIRQ routing register offset
is mapped to the link number and adjust the irq router driver to
utilize the mapping.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00