Commit graph

28540 commits

Author SHA1 Message Date
Michal Simek
5e2fc801ff microblaze: Fix coding style in exception.c
Just coding style cleanup - no functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:56 +01:00
Michal Simek
1c424d2697 microblaze: Show return address from exception
Show also return address from exception which should
suggest where the problem is.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:56 +01:00
Michal Simek
cd8574c0a7 microblaze: Fix stack usage in interrupt handler
Do not save registers below r1 stack pointer because
it is not checked by stack undeflow is not able to detect
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:56 +01:00
Andreas Bießmann
61d7b1bb5f common/board_r: manual relocation for cmd table
This is required for architectures still need manual relocation like avr32, mk68
and others.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:42 +01:00
Michal Simek
0267ba5d86 common: Move dram_init() declaration to common location
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-02-09 15:08:48 +01:00
Alexey Brodkin
a67ef280f4 arc: build libgcc in U-Boot
This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
 * we may use little-endian toolchain but build U-Boot for ether
endianess
 * we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
   text	   data	    bss	    dec	    hex	filename
 222217	  24912	 214820	 461949	  70c7d	u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
   text	   data	    bss	    dec	    hex	filename
 222361	  24912	 214820	 462093	  70d0d	u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
51f4999bc5 arc: move CPU flags selection to the main "config.mk"
As a preparation to ARCv2 port submission we're moving CPU slection
flags to a common location.
Also it will allow us to have more flexible CPU specification, not only
ISA version but CPU family as well checking CONFIG_ARC_CPU_xxx.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
836d2cc2ee arc: move SYS_MONITOR_BASE setup in Konfig
Following SPARK ARC now has SYS_MONITOR_BASE setup via Kconfig.
This makes "include/configs/*.h" cleaner and more flexible.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
a1dbe57d2d arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.h
Common arch_early_init_r() is used in "arc/lib/cpu.c" for all ARC boards
so there's no sense in separate per-board definitions.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
bcba9742ce arc: get rid of useless CONFIG_SKIP_LOWLEVEL_INIT
Currently there's nothing related to really low-level init on ARC so
CONFIG_SKIP_LOWLEVEL_INIT definition makes no sense.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
6eb651ad29 arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.h
There're no other options for ARC except "generic board" so ther's no
point to define CONFIG_SYS_GENERIC_BOARD per board.

We now have it set fo all ARC boards.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
1f9ad44546 arc: add selection of endianess in Kconfig
This change allows to keep board description clean and minimalistic.
This is especially helpful if one board may house different CPUs with
different features.

It is applicable to both FPGA-based boards or those that have CPUs
mounted on interchnagable daughter-boards.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
205e7a7b77 arc: select cache settings via menuconfig
This change allows to keep board description clean and minimalistic.
This is especially helpful if one board may house different CPUs with
different features.

It is applicable to both FPGA-based boards or those that have CPUs
mounted on interchnagable daughter-boards.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
5ff40f3d42 arc: define and use PTAG AUX regs for MMUv3 only
DC_PTAG and IC_PTAG registers only exist in MMUv3.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
812980bdd6 arc: add more flavours of ARC700 series CPU
Now we may select a particular version of ARC700:
 * ARC750D or
 * ARC770D

It allows more flexible (or more fine tuned) configuration of U-Boot.
Before that change we relied on minimal configuration but now we may
use specific features of each CPU.

Moreover allows us to escape manual selection of options that
exist in both CPUs but may have say different version like MMUv2 in
ARC750D vs MMUv3 in ARC770D.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
832325c18d arc: remove CPU hard-coded selection from board description in include/configs
With switch to Kconfig we only need very board-specific descriptions in
include/configs.

CPU selection is performed with either defconfig or manually via
menuconfig.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Igor Guryanov
f958a91fa5 arc: memcmp - fix zero-delay loop utilization
It's prohibited to put branch instruction in the very end of zero-delay
loop. On execution this causes "Illegal instruction" exception.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
2015-02-09 16:41:20 +03:00
Heiko Schocher
657006a1c4 arm, at91: taurus remove MACH_TYPE definitions in config file
remove MACH_TYPE definitions in config file, as they come from
the defconfig.

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-02-07 23:43:24 +01:00
Heiko Schocher
f4e1886df5 arm, at91: add reset controller status register
add reset controller status register

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:43:22 +01:00
Heiko Schocher
f624162f95 arm, at91, taurus: enable WDT
enable WDT for the taurus board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-02-07 23:43:21 +01:00
Heiko Schocher
7bae0d6f62 arm, at91, wdt: make timeout configurable
make the HW WDT timeout configurable through the define
CONFIG_AT91_HW_WDT_TIMEOUT.

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-02-07 23:43:20 +01:00
Heiko Schocher
2b8b38eaca common/board_f: add at91 wdt
call hw_watchdog_init() also if CONFIG_AT91SAM9_WATCHDOG
is used.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-02-07 23:43:18 +01:00
Heiko Schocher
49b461f34a arm, at91, wdt: do not disable WDT in SPL
if CONFIG_AT91SAM9_WATCHDOG is set, do not disable WDT in
SPL

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-02-07 23:43:07 +01:00
Wu, Josh
26961772ff ARM: at91: at91sam9x5: save environment to a FAT file in MMC card
This patch will save U-Boot environment as a file: uboot.env, in FAT partition
instead of saving it in raw sector of MMC card.

This make us easier to manage the environment file.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:43:02 +01:00
Wu, Josh
a248558ae2 ARM: at91: sama5d3xek: save enviroment as a FAT file in MMC card
This patch will save U-Boot environment as a file: uboot.env, in FAT partition
instead of in raw sector of MMC card.

This make us easier to manage the environment file.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:43:00 +01:00
Wu, Josh
c3814406b0 ARM: at91: sama5d3_xplained: save environment in a FAT file in MMC card
This patch will save U-Boot environment as a file: uboot.env, in FAT partition
instead of saving it in raw sector of MMC card.

This make us easier to manage the environment file.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:59 +01:00
Wu, Josh
f5702d7d7f ARM: at91: mmc portA support is only for at91sam9g20ek_2mmc board
Current the MMC support will enable MCI port A, Which is only exist
for 2mmc board.
So by default we need to disable MMC (port A) support. And only enable
it for 2mmc board. Otherwise, dataflash won't work in at91sam9260ek board
as MMC has confliction with Dataflash in the CLK pin.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
2015-02-07 23:42:58 +01:00
Wu, Josh
0e48dc5e41 mtd: atmel_nand: according to pmecc version to perform 0xff page correction
As the PMECC hardware has different version. In SAMA5D4 chip, the PMECC ip
can generate 0xff pmecc ECC value for all 0xff sector.

According to this, add PMECC version check, if it's SAMA5D4 then we always
let PMECC hardware to correct it.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07 23:42:57 +01:00
Bo Shen
c6941e1203 ARM: atmel: cleanup: remove at91cap9 related code
As the at91cap9adk board is removed by commit: b5508344
(ARM: remove broken "at91cap9adk" board), so the at91cap9
code is not used anymore, and also the document for
at91cap9 can not be found on www.atmel.com, so remove the
at91cap9 related code.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07 23:42:56 +01:00
Bo Shen
0b2a982420 ARM: atmel: sama5d4_xplained: enable spl support
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:55 +01:00
Bo Shen
5a4c9c2287 ARM: atmel: sama5d4ek: enable SPL support
The sama5d4ek support boot up from NAND flash, SD/MMC card and
also the SPI flash.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:53 +01:00
Bo Shen
01c073c013 ARM: atmel: sama5d4: build related file when enable SPL
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:52 +01:00
Bo Shen
b54dd1b3ad ARM: atmel: sama5d4: can access DDR in interleave mode
The SAMAA5D4 SoC can access DDR in interleave mode.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:51 +01:00
Bo Shen
569bbd3ceb ARM: atmel: sama5d4: add interrupt redirect function
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[fix subject]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07 23:42:50 +01:00
Bo Shen
09f5c9745b ARM: atmel: sama5d4: add bus matrix init function
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:49 +01:00
Bo Shen
5c756bbc9d ARM: atmel: sama5d4: add matrix1 base addr definition
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:48 +01:00
Bo Shen
0246b7c3b7 ARM: atmel: spl: can not disable osc for sama5d4
The SAMA5D4 SoC on chip rc oscillator can not be disabled.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:47 +01:00
Bo Shen
4514b5f46a ARM: atmel: spl: add saic to aic redirect function
Some SoC need to redirect the saic to aic to make the interrupt to
work, here add a weak function to be replaced by real function.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:46 +01:00
Bo Shen
433be902f3 ARM: atmel: spl: add weak bus matrix init function
Some SoC need to configure the bus matrix, add an weak function
to be replace by real function.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:45 +01:00
Bo Shen
abb44081a5 ARM: atmel: sama5: add sfr register header file
The SFR (special function registers) can be shared bwteen
sama5d3 and sama5d4 soc.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[whitespace adoptions for 80 char compliance]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07 23:42:45 +01:00
Bo Shen
406202dffd ARM: atmel: sama5: add bus matrix header file
This matrix header file can be shared between sama5d3 and sama5d4 soc.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[whitespace adaptions for 80 char compliance]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07 23:42:43 +01:00
Bo Shen
05084443f0 ARM: atmel: clock: make it possible to configure HMX32
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07 23:42:40 +01:00
Tom Rini
e35c6c7978 kwbimage: Make the Makefile pass in CONFIG_SYS_SPI_U_BOOT_OFFS
We can't use config.h directly as some platforms include headers that
aren't safe to use in normal Linux userland.

Signed-off-by: Tom Rini <trini@ti.com>
2015-02-07 07:03:00 -05:00
Bin Meng
ba877efb80 x86: Use tab instead of space to indent in PCIE_ECAM_BASE
Space is used before 'default' in PCIE_ECAM_BASE in arch/x86/Kconfig
so it looks misaligned. Replace the space with tab to indent.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06 12:07:46 -07:00
Bin Meng
1b15fac15d bootstage: Fix typos in the comment
There are two typos in the comment block in bootstage.h, fix them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06 12:07:46 -07:00
Bin Meng
67582c00d7 x86: Add Intel Galileo instructions in README.x86
Add some instructions about building U-Boot for Intel Galileo board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06 12:07:46 -07:00
Bin Meng
6df7ffea13 x86: Add SD/MMC support to quark/galileo
Intel Galileo board has a microSD slot which is routed from Quark SoC
SDIO controller. Enable SD/MMC support so that we can use an SD card.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06 12:07:45 -07:00
Bin Meng
728b393f3b x86: Add SPI support to quark/galileo
The Quark SoC contains a legacy SPI controller in the legacy bridge
which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS
control register offset in the ICH SPI driver is wrong for the Quark
SoC too, unprotect_spi_flash() is added to enable the flash write.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06 12:07:45 -07:00
Bin Meng
38fc1cdae0 x86: pci: Add pci ids for Quark SoC
Add pci ids for Intel Quark SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06 12:07:45 -07:00
Bin Meng
d8b1d22512 x86: galileo: Add GPIO support
Quark SoC has a legacy GPIO block in the legacy bridge (D0:F31),
which is just the same one found in other x86 chipset. Since we
programmed the GPIO register block base address, we should be
able to enable the GPIO support on Intel Galileo board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06 12:07:45 -07:00