Commit graph

641 commits

Author SHA1 Message Date
Sughosh Ganu
741ef86728 capsule: board: Add information needed for capsule updates
Add a structure which defines the information that is needed for
executing capsule updates on a platform. Some information in the
structure like the dfu string is used for making the update process
more robust while some information like the per platform image GUIDs
is used for fixing issues. Initialise this structure in the board
file, and use the information for the capsule updates.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2022-04-15 10:43:18 +02:00
Michal Simek
ad8d48e981 arm64: zynqmp: Record ID code for XCZU1EG device
Add ID code for 1eg device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5b6c9f6a25bba076f304bc4699f6f676a929a683.1648619516.git.michal.simek@xilinx.com
2022-04-05 15:11:35 +02:00
Michal Simek
0302a207c3 arm64: zynqmp: Remove low level UART setting cont
There is no reason to do serial initialization. Uart driver does it already
based on DT. Good effect is that it is clear which interface is console.
The same change was done in past by commit 84d2bbf082 ("arm64: zynqmp:
Remove low level UART setting").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/91a73f292bafc4b64ed09954cc23780496da4b65.1648125082.git.michal.simek@xilinx.com
2022-03-29 09:18:31 +02:00
Michal Simek
f66d0b5346 arm64: versal: Do not place u-boot to reserved memory location
Versal can also have reserved space in DT which u-boot has to avoid to
placing self to that location. The same change was done in ZynqMP by commit
ce39ee28ec ("zynqmp: Do not place u-boot to reserved memory location")
and also for microblaze by commit d7b5cc89d3 ("microblaze: Do not place
u-boot to reserved memory location").

The patch was tested by adding reserved-memory node to DT and check via
bdinfo back.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/15426fa6d64835dd23c5c8c12bbfc97306fb6098.1647527129.git.michal.simek@xilinx.com
2022-03-29 09:16:30 +02:00
Neal Frager
9fb9ec5e24 arm64: zynqmp: add support for zcu106 rev1.0
This patch adds psu_init for Xilinx ZCU106 rev1.0. Xilinx ZCU106 rev1.0 has
newer x16 DDR4 memories and it is SW compatible with revA.

Signed-off-by: Neal Frager <neal.frager@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/997b3e23457e4d24ce0e197d742382aaec36c2b2.1646230318.git.michal.simek@xilinx.com
2022-03-09 12:39:33 +01:00
Michal Simek
d7b5cc89d3 microblaze: Do not place u-boot to reserved memory location
Microblaze can also have reserved space in DT which u-boot has to avoid to
placing self to that location. The same change was done in Zynqmp by commit
ce39ee28ec ("zynqmp: Do not place u-boot to reserved memory location").

This feature was tested with this memory description on kc705:

	memory {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		alloc@b00000000 {
			reg = <0xb0000000 0x10000000>;
			no-map;
		};

		alloc@a8000000 {
			reg = <0xa8000000 0x00010000>;
			no-map;
		};
	};

And in U-Boot log you can check u-boot relocation address and reserved
locations.
U-Boot 2022.01-03974-gb1b4c2dea9b9 (Feb 25 2022 - 11:59:48 +0100)

Model: Xilinx MicroBlaze
DRAM:  1 GiB
Flash: 128 MiB
Loading Environment from nowhere... OK
In:    serial
Out:   serial
Err:   serial
Model: Xilinx MicroBlaze
Net:   AXI EMAC: 40c00000, phyaddr 7, interface gmii
eth0: ethernet@40c00000
U-BOOT for microblaze-generic

U-Boot-mONStR> bdi
...
DRAM bank   = 0x00000000
-> start    = 0x80000000
-> size     = 0x40000000
...
relocaddr   = 0xaff69000
...
lmb_dump_all:
 memory.cnt  = 0x1
 memory[0]	[0x80000000-0xbfffffff], 0x40000000 bytes flags: 0
 reserved.cnt  = 0x3
 reserved[0]	[0xa8000000-0xa800ffff], 0x00010000 bytes flags: 4
 reserved[1]	[0xafe87bb0-0xafffffff], 0x00178450 bytes flags: 0
 reserved[2]	[0xb0000000-0xbfffffff], 0x10000000 bytes flags: 4

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/ea0a8ccce723478eb518f6fdceb91d4f129efb68.1646122398.git.michal.simek@xilinx.com
2022-03-07 16:33:47 +01:00
T Karthik Reddy
2569b51e32 Revert "board: zynqmp: Fix for wrong AMS setting by ROM"
This reverts commit dfbe492ede.
Analog bus control register should be programmed in SPL only. This commit
3414712ba8 ("arm64: zynqmp: Writing correct value to ANALOG_BUS") is
programming the same. So revert this commit.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/215bc936e36f88d2e7c4422ec68cad6d40cb8f68.1645624892.git.michal.simek@xilinx.com
2022-03-07 08:49:08 +01:00
Ashok Reddy Soma
7a036b674f fru: ops: Add support to read mac addresses from multirecord
Add support to read MAC addresses from mac address multirecord.
Check if multi record is found, then jump to mac address multirecord by
comparing the record type field. If it matches mac address
multirecord(0xD2), then copy mac addresses.

Copy these read MAC address in xilinx_read_eeprom_fru so that they are
updated to eth*addr in board_late_init_xilinx().

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:22 +01:00
Ashok Reddy Soma
ff8ee707fb xilinx: common: Optimise updating ethaddr from eeprom
In board_late_init_xilinx() eth*addr are updated from the values read from
eeprom. Ideally the MAC addresses are updated sequencially. So if any
MAC address is invalid, it means there are no further valid values.
So optimise this logic by replacing continue with break.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:21 +01:00
Ashok Reddy Soma
90e8f2db60 fru: ops: Return error from checksum if data is all zero's
fru_checksum function is simply adding all the bytes and returning the
sum. If the data passed to this function is all zero's then it will
return 0, and the functions calling this api will assume that checksum
is correct. Ideally this is not good. Fix this by returning error if all
the data is 0's.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/ac0366fe55c60a818a3f9ed33d96826c817d5520.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:21 +01:00
Ashok Reddy Soma
952b2e60de fru: ops: Clear fru table before storing data
Fill fru table with 0's before using it, to avoid junk data.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e5f15caf9c2102316e39f300d7c9c1ecb6be8439.1645624855.git.michal.simek@xilinx.com
2022-03-07 08:48:21 +01:00
Michal Simek
11381fba99 arm64: zynqmp: Fix debug uart initialization
The commit 0dba45864b ("arm: Init the debug UART") calls
debug_uart_init() from crt0.S but it won't work because SOC is not
configured yet. That's why create board_debug_uart_init() which calls
psu_init() via new psu_uboot_init() earlier before the first access to UART
in SPL. In full U-Boot call psu_uboot_init() only when
CONFIG_ZYNQMP_PSU_INIT_ENABLED is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/878dc2daaa8685346f889989fbfb98b2e44da7fb.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:29 +01:00
Michal Simek
05f0f269b7 ARM: zynq: Fix debug uart initialization
The commit 0dba45864b ("arm: Init the debug UART") calls
debug_uart_init() from crt0.S but it won't work because SOC is not
configured yet. That's why create board_debug_uart_init() which calls
ps7_init() earlier before the first access to UART.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/18e67e02a0c7190839a1ef3a11f3fd6babcf34cc.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:24 +01:00
Michal Simek
83d2941fe9 arm64: zynqmp: Fix dependencies around ZYNQMP_PSU_INIT_ENABLED
ZYNQMP_PSU_INIT_ENABLED is called only when BOARD_EARLY_INIT_F is defined
that's why cover this dependency in Kconfig.
 board_early_init_f() is only part related to
CONFIG_ZYNQMP_PSU_INIT_ENABLED which is disabled now that's why disable
BOARD_EARLY_INIT_F and also build board_early_init_f() only when
CONFIG_BOARD_EARLY_INIT_F is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d89253ec1590cd513dcd4bfbedebae618bd6d605.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:20:19 +01:00
Michal Simek
f063100593 xilinx: Enable OF_BOARD for zynq and zynqmp boards
The commit 9855034397 ("fdt: Don't call board_fdt_blob_setup() without
OF_BOARD") forced to enable OF_BOARD for platforms which provide DT
externally. Zynq/ZynqMP boards are using this feature for a long time
that's why there is a need to enable it by default.

Also code expects to return error in case of error that's why also fill it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com
2022-02-21 13:14:02 +01:00
Ovidiu Panait
1669b3d1a0 microblaze: exception: migrate MICROBLAZE_V5 to Kconfig
Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only
covers delay slot exception support.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-15 13:11:43 +01:00
Michal Simek
fac46bc446 arm64: zynqmp: Add command for disabling loading other overlays
Add command "zynqmp pmufw node close" to disable permission to load
additional pmufw config overlays. This command will make sure that any
other sw will ask for changing permission.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/cfa5cc7909eb8deb23eb0f11c26954cbaddeb861.1642163135.git.michal.simek@xilinx.com
2022-02-15 13:04:03 +01:00
Jorge Ramirez-Ortiz
25a91f3005 arm64: zynqmp: Print the secure boot status information
Output the secure boot configuration to the console.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Link: https://lore.kernel.org/r/20211013170447.10414-1-jorge@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-04 13:16:45 +01:00
Ricardo Salveti
e6e3b9d7b5 xilinx: common: change bootm_size to not go beyond ram_top
The available ram can be limited by ram_top as that depends on the
reserved memory nodes provided by the device-tree (via
board_get_usable_ram_top), so make sure to respect ram_top when setting
up bootm_size to avoid overlapping reserved memory regions (e.g. memory
used by OP-TEE).

The same logic is available in env_get_bootm_size when bootm_size is
not defined by the default environment.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-02-01 17:11:33 +01:00
T Karthik Reddy
bf97c460a4 versal: Return ENVL_NOWHERE instead of ENVL_UNKNOWN
The system fails to boot without any environment location, so return
ENVL_NOWHERE when there's nowhere to store the environment instead
of ENVL_UNKNOWN.

The same change was also done by commit 50918d0df5 ("xilinx: Return
ENVL_NOWHERE instead of ENVL_UNKNOWN") for zynq and zynqmp.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e4ed36408f10159677ed8060bfd5289f3e0691fa.1637752614.git.michal.simek@xilinx.com
2022-01-05 11:16:21 +01:00
Ovidiu Panait
bb113ce313 xilinx: Kconfig: add XILINX_OF_BOARD_DTB_ADDR default value for microblaze
The xilinx board_fdt_blob_setup() implementation makes use of
XILINX_OF_BOARD_DTB_ADDR, but no default value is currently defined for
microblaze. Add one so that microblaze could also work with
CONFIG_OF_SEPARATE.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211202195657.246723-1-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
b6aef10979 microblaze: add Kconfig symbol for the vector base address
MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS
configuration parameter). Current code assumes that the reset vector
location is always 0x0.

Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user
can adjust the reset vector address.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Ovidiu Panait
83b175be16 microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig
Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to
XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of
microblaze-generic Kconfig options.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2022-01-05 10:22:03 +01:00
Michal Simek
380bd08370 xilinx: firmware: Move dcache handling directly to pmufw load config
Core function should make sure that data is stored properly that's why move
cache operations directly to zynqmp_pmufw_load_config_object() to be able
to call it from other functions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8c92edd3650ce34a3cfd1c1e4e9103980830b1fa.1637236800.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Michal Simek
67bf888850 arm64: zynqmp: Switch SOM to shared psu configuration
Previous psu init was targeting SOM + KV260 carrier card and also contain
configurations for other devices on carrier card. This config is removing
all expected configurations for CC and let U-Boot to handle all of it self.
This configuration is designed for SOM itself (and I would bet without
eMMC).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5782131058dc372befd3fdb4dceabeea5ba56606.1637236693.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
T Karthik Reddy
5f4e1ff7f9 xilinx: versal: Fix sdhci node name as per DT
Fix the sdhci node name in versal board file as per the name in
device tree and also check for sdhci node as part of backward
compatibility.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9110ecdabcabcef63fffd4719095acf4326a26e4.1637236638.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00
Tom Rini
2ffa0e87df Xilinx changes for v2022.01-rc3
sdhci:
 - Fix emmc mini case with missing firmware interface
 
 zynqmp:
 - Restore JTAG interface if required
 - Allow overriding board name
 - Add support for DLC21
 - Fix one fallthrought statement description
 - Use config macro instead of name duplication
 - Save multiboot to variable
 
 firmware:
 - Handle ipi_req errors better
 - Use local buffer in case user doesn't need it instead of NULL/0 location
 
 spi:
 - gqsi: Fix write issue at low frequencies
 
 net:
 - gem: Disable broadcasts
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYZPDrwAKCRDKSWXLKUoM
 IS9GAJ93T/uprhLcKWMb+284YMb2caWgOACfZ02nTlzvZKNNXVretJgZaHXqj1M=
 =cwTL
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.01-rc3

sdhci:
- Fix emmc mini case with missing firmware interface

zynqmp:
- Restore JTAG interface if required
- Allow overriding board name
- Add support for DLC21
- Fix one fallthrought statement description
- Use config macro instead of name duplication
- Save multiboot to variable

firmware:
- Handle ipi_req errors better
- Use local buffer in case user doesn't need it instead of NULL/0 location

spi:
- gqsi: Fix write issue at low frequencies

net:
- gem: Disable broadcasts
2021-11-16 09:51:04 -05:00
Ricardo Salveti
11c0255cd8 xilinx: zynqmp: fix ZYNQMP_RESTORE_JTAG check
Config check should be done without the SPL_ prefix.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Link: https://lore.kernel.org/r/20211104192802.3093811-1-ricardo@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-11-15 15:59:33 +01:00
Michal Simek
412ab13328 arm64: zynqmp: Replace comma by semicolon
Fix issue reported by checkpatch.pl

WARNING: Possible comma where semicolon could be used
 #499: FILE: board/xilinx/zynqmp/zynqmp.c:499:
 +	size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
 +	reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE);

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/ef264451ef9455ada9784bedbc91f74b94b8a237.1634799528.git.michal.simek@xilinx.com
2021-10-29 13:01:47 +02:00
Michal Simek
e8b43c6409 xilinx: zynqmp: Save multiboot as variable
Save multiboot register as u-boot variable. And use it as primary source
for composing dfu_alt_info for capsule update. If variable is not defined

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Link: https://lore.kernel.org/r/96556221443489c952717bcb340b4707901c9bdd.1635149450.git.michal.simek@xilinx.com
2021-10-29 13:00:52 +02:00
Ilias Apalodimas
e7fb789612 sandbox: Remove OF_HOSTFILE
OF_HOSTFILE is used on sandbox configs only.  Although it's pretty
unique and not causing any confusions,  we are better of having simpler
config options for the DTB.

So let's replace that with the existing OF_BOARD.  U-Boot would then
have only three config options for the DTB origin.
- OF_SEPARATE, build separately from U-Boot
- OF_BOARD, board specific way of providing the DTB
- OF_EMBED embedded in the u-boot binary(should not be used in production

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-27 16:38:26 -04:00
Michal Simek
60705883d2 xilinx: zynqmp: Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
There is no need to use u-boot.itb as name when this is already recorded in
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME macro.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Link: https://lore.kernel.org/r/38a236ed317510c26b37525da0e7bc26b411222c.1634558534.git.michal.simek@xilinx.com
2021-10-21 08:56:41 +02:00
Michal Simek
f510927d55 xilinx: zynqmp: Handle fallthrough statement properly
Now intentional fallthrough in switch-case should be labelled that's why
convert comment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Link: https://lore.kernel.org/r/b3e976bd3b9bbe7061fec5ba0a3b4e78fdd78394.1634556602.git.michal.simek@xilinx.com
2021-10-21 08:55:46 +02:00
Michal Simek
d2d14383ba arm64: zynqmp: Add support for DLC21 (Smartlynq+) board
DLC21 is used as fast jtag cable. The patch adds support for this board
from PS perspective. The most interesting part on the board is seps525 oled
display. Also i2c, gpio, ethernet, uart, SD and eMMC are tested.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3d35cd6a11cffc7456e21a88b214cc965734e852.1634231268.git.michal.simek@xilinx.com
2021-10-21 08:51:33 +02:00
Jorge Ramirez-Ortiz
398a74ae33 zynqmp: restore the jtag interface
When boot.bin is configured for secure boot the CSU will disable the
JTAG interface on all cases.

Some boards might rely on this interface for flashing to QSPI in which
case those systems might end up bricked during development.

This commit will restore the interface under CSU control

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Link: https://lore.kernel.org/r/20211013134800.19452-1-jorge@foundries.io
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-10-21 08:51:00 +02:00
Tom Rini
8bef036836 Xilinx changes for v2022.01-rc1
zynq:
 - Enable capsule update for qspi and mmc
 - Update zed DT qspi compatible string
 
 zynqmp:
 - Add missing modeboot for EMMC
 - Add missing nand DT properties
 - List all eeproms for SC on vck190
 - Add vck190 SC psu_init
 
 clk:
 - Handle only GATE type clock for Versal
 
 watchdog:
 - Update versal driver to handle system reset
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYVWWZgAKCRDKSWXLKUoM
 IY3MAJ43Mlut5tK9gv45bp4HpyVOMuSvJwCfTiVr7ZxrBE8I8QC5+zHzBTmuM6g=
 =aQtT
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2022.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.01-rc1

zynq:
- Enable capsule update for qspi and mmc
- Update zed DT qspi compatible string

zynqmp:
- Add missing modeboot for EMMC
- Add missing nand DT properties
- List all eeproms for SC on vck190
- Add vck190 SC psu_init

clk:
- Handle only GATE type clock for Versal

watchdog:
- Update versal driver to handle system reset
2021-09-30 11:29:41 -04:00
Wolfgang Denk
c72231d272 WS cleanup: remove excessive empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 08:08:56 -04:00
Wolfgang Denk
66356b4c06 WS cleanup: remove trailing empty lines
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30 08:08:56 -04:00
Michal Simek
0285d75a93 arm64: zynqmp: Add psu_init_gpl for vck190/vmk180 SC
Add psu_init_gpl file for getting SPL to work directly from the tree.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/6675723ad52d29982e62c6ca4832ed18688076cb.1632488774.git.michal.simek@xilinx.com
2021-09-30 12:30:14 +02:00
Ashok Reddy Soma
5d498a12b6 xilinx: zynqmp: Set modeboot env variable in eMMC bootmode
Set environment variable modeboot to "emmcboot" in case of eMMC boot
mode.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c61231e4b8c6118862dfc82e923211637bf29991.1631688736.git.michal.simek@xilinx.com
2021-09-30 12:27:54 +02:00
Michal Simek
c67fecd212 ARM: zynq: Enable capsule update for qspi and mmc
Generate dfu_alt_info setup at runtime for capsule update.
Enabling this feature will help with upgrading boards without remembering
what is where.

The similar change was done for ZynqMP by commit b86f43de0b ("xilinx:
zynqmp: Add support for runtime dfu_alt_info setup").
Code needs to be enabled by CONFIG_SET_DFU_ALT_INFO.

And also enable capsule on disk for RAW firmware images with efidebug
command.

Two indexes are supported for SPL flow. Images can be generated like:
./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin
./tools/mkeficapsule --raw u-boot.img --index 2 capsule2.bin

Then place them to SD card and load them:
load mmc 0 10000000 capsule1.bin && efidebug capsule update -v 10000000
load mmc 0 10000000 capsule2.bin && efidebug capsule update -v 10000000

FSBL flow will also work where only index 1 capsule is used. There
should be enough space for using boot.bin with bitstream too.

Zynq also support multiple boot locations in SPI or MMC but it is not wired
by this patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/bea5fc75a87a5971f118b46bab4aa7ca39a629c6.1630061610.git.michal.simek@xilinx.com
2021-09-30 12:26:25 +02:00
Michal Simek
52ff1626cf xilinx: common: Enabling generic function for DT reselection
U-Boot support board detection at run time and based on it change DT.
This feature is implemented for SOM Kria platforms which contain two
eeproms which contain information about SOM module and CC (Carrier card).
Full U-Boot starts with minimal DT file defined by
CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image.
It is using default setup of board_name variable initializaed to
DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option.

When DTB_RESELECT is enabled board_detection() is called. Keep it your mind
that this code is called before relocation. board_detection() is calling
xilinx_read_eeprom() which fills board_info (xilinx_board_description)
structure which are parsed in board_name_decode().
Based on DT configuration and amount of nvmemX aliases name of the board is
composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev"
<board_revision> "-" <cc_name> "-rev" <cc_revision>.

If CC is not present or more are available it keeps going.

When board name is composed and returned from board_name_decode() it is
assigned to board_name variable which is used by
board_fit_config_name_match() which is called via fdtdec_setup() when it
goes over config options in multi dtb FIT image.

From practical point of view multi DTB image is key point here which has to
contain configs for detected combinations. Unfortunately as of now they
have to be full DTBs and DTBOs are not supported.

That's why configuration like:
config_X {
	description = "zynqmp-board-cc";
	fdt = "board", "cc";
};

needs to be squashed together with:
fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \
arch/arm/dts/zynqmp-cc.dtbo

and only one dtb is in fit:
config_X {
	description = "zynqmp-board-cc";
	fdt = "board-cc";
};

For creating multi DTBs fit image use mkimage -E, e.g.:
mkimage -E -f all.its all.dtb

When DTB_RESELECT is enabled xilinx_read_eeprom() is called before
relocation and it uses calloc for getting a buffer. Because this is dynamic
memory it is not relocated that's why xilinx_read_eeprom() is called again
as the part of board_init(). This second read with calloc buffer placed in
proper position board_late_init_xilinx() can setup u-boot variables as
before.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:43 +02:00
Michal Simek
5bd5ee02b2 xilinx: zynqmp: Check that DT is 64bit aligned
DT needs to be 64bit aligned. If it is not fdt64_to_cpu will fail when try
to read information about reserved memory. The system ends in exception
without any clue what's going it. That's why detect not aligned DT and
panic to show where the issue is coming from.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:43 +02:00
Michal Simek
8823253272 xilinx: Add support for generic board detection
Add support for changing DT at run time. It is done via board_detection()
which returns platform_id and platform_version which can be used via
board_name_decode() to compose board_local_name string which corresponds
with DT which is should be used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:43 +02:00
Michal Simek
b262863bf8 xilinx: common: Free allocated structure
There is no need to keep fru_content around. Free this space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:43 +02:00
Michal Simek
d9c93c9e2c xilinx: common: Change board_info[] handling
Origin code was allocating only pointers to struct xilinx_board_description
and there was separate allocation for structure self and freeing in case of
failure.
The code is directly allocating space for all structures by one calloc to
simlify logic.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:43 +02:00
Michal Simek
57f710320f xilinx: Use variable for passing board_name
Use variable which points to DEVICE_TREE by default. The reason for this
change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection
can be used for change DTB at run time. That's why there must be reference
in board_fit_config_name_match() via variable instead of hardcoding it
which is sufficient for that use case.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:43 +02:00
Michal Simek
530560b6f8 xilinx: fru: Replace spaces with \0 in detected name
FRU spec expected \0 for unused symbols but unfortunately a lot of boards
are using spaces instead of \0. That's why after saving it to desc->name
name is checked again and all spaces are converted to \0. This will ensure
that names can be used for string manipulations like concatenation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:42 +02:00
Michal Simek
afb08a8634 xilinx: zynqmp: Add debug messages for boot mode
Add debug messages to see HW boot mode and also alternative boot mode in
logs directly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
T Karthik Reddy
80c0d38a56 xilinx: common: Add function to print SoC info
Add print_cpuinfo() to print SoC info like family & revision.
This function depends on CONFIG_DISPLAY_CPUINFO config.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:08:11 +02:00
Ashok Reddy Soma
655d69faaf mmc: zynq_sdhci: Move setting tapdelay code to driver
Move tapdelay function calls to zynq_sdhci.c and make them static
inline. zynqmp_tap_delay.h has function prototypes for the functions
defined in tap_delays.c, which will not be needed anymore.

Remove tap_delays.c and zynqmp_tap_delay.h files.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-26 08:08:01 +02:00
Ashok Reddy Soma
d044982555 mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelays
Currently xilinx sdhci driver is using zynqmp_mmio_write() to set
tapdelay values and DLL resets. Continue to use this for SPL and mini
U-Boot where U-Boot will be executed at EL3 level.

Use firmware call xilinx_pm_request() using appropriate arguments to
set input/output tapdelays and also for DLL resets in regular flow(EL2).

Host driver should explicitly request DLL reset before ITAP (assert DLL)
and after OTAP (release DLL) to avoid issues in some cases. Also handle
error return where possible.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-26 08:07:46 +02:00
Michal Simek
b86f43de0b xilinx: zynqmp: Add support for runtime dfu_alt_info setup
The main reason for this to be implemented is capsule update.
Two memories are supported and tested which is MMC FAT based and QSPI
based.

For creating capsule these commands are used:
./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin
./tools/mkeficapsule --raw u-boot.itb --index 2 capsule2.bin

Then transfer to SD card where these commands run:
load mmc 0 10000000 capsule1.bin
efidebug capsule update -v 10000000
load mmc 0 10000000 capsule2.bin
efidebug capsule update -v 10000000

Depends on the boot device used are binaries loaded to qspi or mmc fat
partition.
Also multiboot register is handled to make sure that the same location(id)
is used as image which is upgraded.

Two locations are used by purpose for SPL flow. If only boot.bin is used
create only one capsule.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06 09:32:02 +02:00
Michal Simek
3d238435b2 xilinx: zynqmp: use zynqmp_mmio_read() in multi_boot()
When U-Boot runs in EL2 there is no access to csu_base registers that's why
this has to be done via firmware interface to find out multi boot register
value. Till now this function is called only from SPL in EL3.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06 09:32:02 +02:00
Michal Simek
e49f2a7f85 xilinx: zynqmp: Change multi_boot() to return value
Change multi_boot() to return multiboot value and move print out of this
function and let this function to be used by other functions without
duplicating message.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06 09:32:02 +02:00
Michal Simek
f83cfaa7f2 xilinx: zynqmp: Free allocated field for target variable
When env_set() is called there is no need to allocate memory for variable
which is already saved that's why free it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06 09:32:02 +02:00
Simon Glass
7e5f460ec4 global: Convert simple_strtoul() with hex to hextoul()
It is a pain to have to specify the value 16 in each call. Add a new
hextoul() function and update the code to use it.

Add a proper comment to simple_strtoul() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02 13:32:14 -04:00
Michal Simek
f1bc214b00 arm64: zynqmp: Do not define do_reset() if sysreset is enabled
The SPL can also be compiled with sysreset drivers just fine, so
update the condition to cater for that option.
The same change was done by commit efa1a62ad2 ("ARM: imx8m: Do not define
do_reset() if sysreset is enabled").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Mike Looijmans
50918d0df5 xilinx: Return ENVL_NOWHERE instead of ENVL_UNKNOWN
The system refuses to boot without any environment, so return ENVL_NOWHERE when
there's nowhere to store the environment instead of ENVL_UNKNOWN.

This fixes that the board won't boot from eMMC when CONFIG_ENV_IS_IN_FAT is not
defined, for example. Similar for other combinations.

Fixes: 1025bd098a "xilinx: zynqmp: Add support for saving variables"

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
Ashok Reddy Soma
a70bdafd67 mmc: zynq_sdhci: Split set_tapdelay function to in and out
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays
separately. This is required to handle zero values for ITAP and OTAP
values. If we dont split, we will have to remove the if() in the
function, which makes ITAP values to be overwritten when OTAP values are
called to set and vice-versa.

Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6
bits for OTAP for ZynqMP.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26 09:18:45 +02:00
T Karthik Reddy
45576273e9 xilinx: zynqmp: Add support for 67dr silicon
Add zynqmp 67dr silicon to zynqmp device id table.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-01 09:25:06 +02:00
Michal Simek
ce39ee28ec zynqmp: Do not place u-boot to reserved memory location
TF-A and SecureOS can allocate the part of DDR for self but U-Boot is not
handling this configuration that the part of memory is reserved and
shouldn't be used by U-Boot. That's why read all reserved memory locations
and don't use it.
The code was taken from commit 4a1b975dac ("board: stm32mp1: reserve
memory for OP-TEE in device tree") and commit 1419e5b516 ("stm32mp:
update MMU config before the relocation") which is used by stm32 and does
the job properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
476588c9b4 arm64: zynqmp: Handle MMC seq number based on boot device
K26 has EMMC and SD and default 0 is not working when system is booting out
of SD which is controller 1. Add controller autodetection via
mmc_get_env_dev(). The same code is used for distro_boot selection done in
board_late_init(). bootseq variable can't be reused because this is called
so late.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
02ac1553b8 arm64: zynqmp: Add psu_init_gpl for k26 boards
Add psu_init_gpl file for getting SPL to work directly from the tree.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
ddf8deabc3 arm64: zynqmp: Add support for SVD devices
SVDs  are using different name which can't be handled via zynqmp_devices
structure. That's why introduce zynqmp_detect_svd_name() which checks ID
code for these devices and show proper name for them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Adrian Fiergolski
3414712ba8 arm64: zynqmp: Writing correct value to ANALOG_BUS
The default register configuration after powerup for PSSYSMON_ANALOG_BUS
register is incorrect. Hence, fix this in SPL by writing correct fixed
value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit
sw_apps:zynq ("056ca65d44549ce27f716d423e8dfdefeee7440c")
in Xilinx:embeddedsw[1].

[1] https://github.com/Xilinx/embeddedsw

Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-11 09:24:58 +02:00
Marek Behún
236f2ec432 treewide: Convert macro and uses of __section(foo) to __section("foo")
This commit does the same thing as Linux commit 33def8498fdd.

Use a more generic form for __section that requires quotes to avoid
complications with clang and gcc differences.

Remove the quote operator # from compiler_attributes.h __section macro.

Convert all unquoted __section(foo) uses to quoted __section("foo").
Also convert __attribute__((section("foo"))) uses to __section("foo")
even if the __attribute__ has multiple list entry forms.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
T Karthik Reddy
25484d9070 xilinx: common: Fix boot script address
Currently u-boot supports addresses upto 39-bits only. If anybody
wants to use addresses of more than 39-bits in Linux they will have
a separate memory node in DT. In such cases they will have multiple
memory nodes.
Currently u-boot selects and runs on lower memory bank region.
But bootscript is being loaded on dram bank 0, where dram bank 0 will
point to 1st memory node in DT. If first memory node is mentioned as
higher ddr(>39-bits address) then u-boot cannot load the bootscript.
So fix this issue by setting bootscript address within the lower memory
bank region.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23 08:45:55 +02:00
T Karthik Reddy
82cb49dc00 xilinx: versal: Add usb dfu/thor distro boot support
Change "dfu_usb" to "usb_dfu" for better representation and change
required macros. Add 60s timeout of dfu-utils to start transaction.
Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM
as we use bootcmd_usb_dfu instead of dfu_ram.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23 08:45:55 +02:00
T Karthik Reddy
ef1be3e364 xilinx: zynqmp: Add usb dfu/thor distro boot support
In usb boot mode distro boot should select usb device as primary boot
device instead of usb host. So make usb dfu as primary boot device. But do
not list it in boot_targets as fallback option because it is not classic
mode for booting. Using 60s timeout by default should be enough time for
dfu-utils to start transaction. In case none needs this please change
timeout value in the command or disable CONFIG_DFU_TIMEOUT.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23 08:45:55 +02:00
Ashok Reddy Soma
4fb83c9c2b xilinx: versal: Add support for saving env based on bootmode
Enable saving variables to MMC(FAT) and SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).

Enable ENV_FAT_DEVICE_AND_PART="0:auto" for Versal platforms as well.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23 08:43:25 +02:00
Ashok Reddy Soma
cd08513b05 xilinx: zynq: Add support for saving env based on bootmode
Enable saving variables to MMC(FAT), NAND, SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).

Since most of the flashes on zynq evaluation boards are 16MB in size,
set default ENV_OFFSET to 15MB(0xE00000).

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23 08:43:18 +02:00
Tom Rini
db8b46120a Xilinx changes for v2021.07
net:
 - Fix gem PCS support
 
 spi:
 - Small trivial fixes
 
 zynq:
 - Enable time/timer commands
 - Update bitmain platform
 - Several DT changes
 
 zynqmp:
 - Update clock driver
 - mini config alignments
 - Add/update psu_init for zcu208/zcu216/zc1275
 - Several DT changes
 - Enable efi debug command (also for Versal)
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYGRy+AAKCRDKSWXLKUoM
 IUN9AKCQHHdbKIciyhucUj5ThwT3CDaUswCeLQkRB1SrM6E8k6KkErWEA+xOxsU=
 =fIEs
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2021.07' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.07

net:
- Fix gem PCS support

spi:
- Small trivial fixes

zynq:
- Enable time/timer commands
- Update bitmain platform
- Several DT changes

zynqmp:
- Update clock driver
- mini config alignments
- Add/update psu_init for zcu208/zcu216/zc1275
- Several DT changes
- Enable efi debug command (also for Versal)
2021-03-31 09:47:30 -04:00
Michal Simek
cde1aaeae2 arm64: zynqmp: Update psu_init for zcu1275
Update clock/pll setup, ddr, MIOs based on 2020.2 hw design.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00
Michal Simek
7a50093a44 arm64: zynqmp: Add missing psu inits for zcu208/216
Add missing configurations file for zcu208 and zcu216.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00
Harald Seiler
35b65dd8ef reset: Remove addr parameter from reset_cpu()
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to.  This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value.  Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.

Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g.  COLD vs WARM resets).  As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).

To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely.  Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.

This transformation was done with the following coccinelle patch:

    @@
    expression argvalue;
    @@
    - reset_cpu(argvalue)
    + reset_cpu()

    @@
    identifier argname;
    type argtype;
    @@
    - reset_cpu(argtype argname)
    + reset_cpu(void)
    { ... }

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-02 14:03:02 -05:00
Heinrich Schuchardt
a3bbd0b912 Correct U-Boot upstream repository
The U-Boot source moves to https://source.denx.de/u-boot/u-boot.git
effective 2021-02-28.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-28 13:57:30 -05:00
Tom Rini
cbe607b920 Xilinx changes for v2021.04-rc3
qspi:
 - Support for dual/quad mode
 - Fix speed handling
 
 clk:
 - Add clock enable function for zynq/zynqmp/versal
 
 gem:
 - Enable clock for Versal
 - Fix error path
 - Fix mdio deregistration path
 
 fpga:
 - Fix buffer alignment for ZynqMP
 
 xilinx:
 - Fix reset reason clearing in ZynqMP
 - Show silicon version in SPL for Zynq/ZynqMP
 - Fix DTB selection for ZynqMP
 - Rename zc1275 to zcu1275 to match DT name
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYDUezQAKCRDKSWXLKUoM
 IbtgAJ9jZ+BOtwFaHR19TENC2DsHTINnnwCfSDn3fU0OFJRI0HD7pRxXr4xrb3M=
 =Kr8x
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.04-rc3

qspi:
- Support for dual/quad mode
- Fix speed handling

clk:
- Add clock enable function for zynq/zynqmp/versal

gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path

fpga:
- Fix buffer alignment for ZynqMP

xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
2021-02-23 10:45:55 -05:00
Michal Simek
3600d47b73 arm64: zynqmp: Rename zc1275/zcu1275 to be aligned with DT name
Folder names corresponds to DT name. These boards have been renamed from
zc1275 to zcu1275 by commit shown below and this should be the part of that
commit.

Fixes: 420d446781 ("arm64: zynqmp: Rename zc1275 to zcu1275")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Michal Simek
3aba25bc38 arm64: zynqmp: Do not clear reset reason
There is no need to clear reset reason register because it is protected by
PMUFW already which is reported when verbose log is enabled as:
pm_core.c@733 APU> No write permission to 0xFF5E0220

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23 14:56:59 +01:00
Michal Simek
98757d87ee xilinx: Show silicon version in SPL
Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is
useful to be aware.
The patch is also fixing possition of these bits on ZynqMP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-10 13:21:12 +01:00
Michal Simek
fc3c6fd752 xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP
Fix bug introduced by commit listed below. It is for cases where Versal or
ZynqMP don't have DDR mapped. Later SPL was also excluded by
commit a672b9871b ("xilinx: common: Do not touch
CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL").

Fixes: 506009fc10 ("xilinx: common: Change macro handling in board_fdt_blob_setup()")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-10 13:20:27 +01:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Michal Simek
a672b9871b xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL
This hook is used in full U-Boot that's why there is no reason to touch
this location from SPL. The hook was introduced for QEMU usage but none is
really running SPL on QEMU that's why it shouldn't break any usecase.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
506009fc10 xilinx: common: Change macro handling in board_fdt_blob_setup()
Remove ifdef logic which is handled by preprocessor and move it link time
optimization to get full compile code coverage.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
2784befbd7 xilinx: zynqmp: Save bootseq number for SD/EMMC boot modes
For systems which has both sdhci controllers enable it is worth to export
bootseq number for variables. Then the variable can be used in custom
scripts to tune logic for OS.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Tom Rini
bc0b99bd8b Xilinx changes for v2021.04
arm64:
 - DT updates
 
 microblaze:
 - Add support for NOR device support
 
 spi:
 - Fix unaligned data write issue
 
 nand:
 - Minor code change
 
 xilinx:
 - Fru fix in limit calculation
 - Fill git repo link for all Xilinx boards
 
 video:
 - Add support for seps525 spi display
 
 tools:
 - Minor Vitis file support
 
 cmd/common
 - Minor code indentation fixes
 
 serial:
 - Uartlite debug uart initialization fix
 -----BEGIN PGP SIGNATURE-----
 
 iFsEABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCX/ROlgAKCRDKSWXLKUoM
 IRC5AIkBzg4Sz8fQgdCiOK89k7tdFKMAnA9SYhgm4TSCzffZCJwnm78QoGAC
 =4FnY
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.04

arm64:
- DT updates

microblaze:
- Add support for NOR device support

spi:
- Fix unaligned data write issue

nand:
- Minor code change

xilinx:
- Fru fix in limit calculation
- Fill git repo link for all Xilinx boards

video:
- Add support for seps525 spi display

tools:
- Minor Vitis file support

cmd/common
- Minor code indentation fixes

serial:
- Uartlite debug uart initialization fix
2021-01-06 07:57:33 -05:00
Michal Simek
0109db1cd1 xilinx: Fill git repository for Xilinx boards
All Xilinx SoCs have repository location filled already but boards are
covered by different fragment which is missing this link.
The patch is extending description with adding proper link to the same
repository.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Heinrich Schuchardt
b6d14c52f9 fru: ops: avoid out of bounds access
Building xilinx_zynq_virt_defconfig fails on origin/next as reported by
GCC 10.2 (as provided by Debian Bullseye):

  CC      board/xilinx/common/fru_ops.o
board/xilinx/common/fru_ops.c: In function ‘fru_capture’:
board/xilinx/common/fru_ops.c:173:8:
error: array subscript 284 is outside array bounds of
‘struct fru_table[1]’ [-Werror=array-bounds]
  173 |  limit = data + sizeof(struct fru_board_data);
      |  ~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
board/xilinx/common/fru_ops.c:17:18: note: while referencing ‘fru_data’
   17 | struct fru_table fru_data __section(.data);
      |                  ^~~~~~~~

When using sizeof(struct fru_board_data) to find the end of the structure
you should add it to the start of the structure.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
T Karthik Reddy
5766429b7c microblaze: Set script_offset_nor env variable
Set script_offset_nor env variable using CONFIG_BOOT_SCRIPT_OFFSET
and nor flash start address to keep bootscript offset configurable.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:27 +01:00
Simon Glass
8b85dfc675 dm: Avoid accessing seq directly
At present various drivers etc. access the device's 'seq' member directly.
This makes it harder to change the meaning of that member. Change access
to go through a function instead.

The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Michal Simek
cd40b82655 fru: common: Record pcie/uuid fields in custom board area
Add additional fields. They will be just recorded and filled but not shown.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Michal Simek
b8771d0b1d fru: ops: Do not let parser to write data to not allocated space
If customs fields in board area are used it will likely go over allocated
space in struct fru_board_data. That's why calculate limit of this
structure to make sure that different data is not rewritten by accident.
When limit is reached stop to record fields.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Michal Simek
5fb093f471 fru: common: Switch capture variable with the rest
capture variable is bool which is just one byte and it is just causing
unaligned accesses. Better to have it as last entry in the structure.

It also simplify offset calculation for initial header copy.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:54 +01:00
Michal Simek
6c5828dc4b microblaze: Get rid of xparameters.h
There is no need to use this file anymore. Include it in main config file
and simplify logic based on it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20 10:42:53 +01:00
Michal Simek
05af4834ad xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms
Move board_fit_config_name_match() from Zynq/ZynqMP to common location.
This change will open a way to use it also by Microblaze and Versal.
Through this function there is a way to handle images with multiple DTBs.
For now match it with DEVICE_TREE as is done for Zynq.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-29 08:55:43 +01:00
Ashok Reddy Soma
728d21b8c7 mmc: zynq_sdhci: Add common function to set input/output tapdelays
Remove setting tapdelays for different speeds separately. Instead use
the ITAP and OTAP delay values which are read from the device tree.
If the DT does not contain tap delay values, the predefined values
will be used for the same.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-29 08:55:43 +01:00
Ashok Reddy Soma
17a42abb40 mmc: Define timing macro's
Define timing macro's for all the available speeds of mmc. This is
done similar to linux. Replace speed macro's used with these new timing
macro's wherever applicable.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-27 08:13:33 +01:00
Michal Simek
1230582150 microblaze: Wire generic xilinx board_late_init_xilinx()
Call generic board_late_init_xilinx() to be aligned with the rest of xilinx
platforms. Also getting rid of initrd_high/fdt_high and use
bootm_low/boot_size instead.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
92dc921063 xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM
There is no reason not to use commong Kconfig by Microblaze too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00