Commit graph

2804 commits

Author SHA1 Message Date
Sean Anderson
7026c1ee70 board: ls1046afrwy: Remove Manish Tomar's email
Manish Tomar's email bounces. Remove it, and reassign the config he was
maintaining to the primary maintainer for the board.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
71dcf8128c board: freescale: p1_p2_rdb_pc: Move ifdef for USB/eLBC check to correct place
Whole section about USB/eLBC configuration seems to be P1020 specific. So
add ifdefs to not compile it on other platforms (e.g. P2020).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
0b30cb3de7 board: freescale: p1_p2_rdb_pc: Fix page attributes for second 1G SDRAM map
Like for first 1G SDRAM map, do not enable Caching-inhibited nor Guarded
attribute for second 1G SDRAM mapping. Whole 2G SDRAM should use caches and
also allow speculative loading (by not setting Guarded attribute).

Also enable Memory Coherency attribute for second 1G SDRAM map. In commit
316f0d0f8f ("powerpc: mpc85xx: Fix static TLB table for SDRAM") it was
enabled for all SDRAM maps on all other boards, just missed this one case.

As a last thing, first 1G SDRAM map has wrong comment, so adjust it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
0992c2be77 board: freescale: p1_p2_rdb_pc: Do not set MPC85xx_PMUXCR_SDHC_WP bit when SDHC_WP is used as GPIO
When MPC85xx_PMUXCR_SDHC_WP is set then SDHC controller automatically makes
inserted SD card readonly if GPIO[9] is active.

In some design GPIO[9] pin does not have to be connected to SD card
write-protect pin and can be used as GPIO.

So do not set MPC85xx_PMUXCR_SDHC_WP bit when GPIO[9] is not used for
SDHC_WP functionality.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
4aceaec585 board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch configurations
As written in comment, P2020 has two possible SD switch configurations.
Extend code to detect both of them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
ccad59dc5c board: freescale: p1_p2_rdb_pc: Do not hang in checkboard()
Like in all other checks in checkboard() function, do not hang on error.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Pali Rohár
03edf23376 board: freescale: p1_p2_rdb_pc: Allow to compile it without env support
When env support is disabled then usage of env_init() or env_relocate()
generates linker errors. So do not compile env_init() or env_relocate()
in SPL code when env support is disabled in SPL.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30
Michael Walle
49bb245f1d armv8: psci: add ARMV8_PSCI_RELOCATE Kconfig option
There is an user-selectable SYS_HAS_ARMV8_SECURE_BASE, which has the
same meaning but is just for the ls1043ardb board. As no in-tree config
uses this, drop it and replace it with something more sophiticated:
ARMV8_PSCI_RELOCATE. This option will then enable the ARMV8_SECURE_BASE
option which is used as the base to relocate the PSCI code (or any code
in the secure region, but that is only PSCI). A SoC (or board) can now
opt-in into having such a secure region by enabling
SYS_HAS_ARMV8_SECURE_BASE. Enable it for the LS1043A SoC, where it was
possible to relocate the PSCI code before as well as on the LS1028A SoC
where there will be PSCI support soon.

Additionally, make ARMV8_PSCI and SEC_FIRMWARE_ARMV8_PSCI exclusive.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:13:57 +05:30
Peng Fan
a497740f4e imx: imx8mn_evk: enable CONFIG_DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

move the preloader_console_init() call after spl_init() to
avoid board hang

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:25 +02:00
Peng Fan
bf6e0b9fd2 imx: imx8mm_evk: enable CONFIG_DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

move the preloader_console_init() call after spl_early_init() to
avoid board hang

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:25 +02:00
Peng Fan
ae188eb61c imx: imx8mp_evk: enable CONFIG_DM_SERIAL
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-21 15:18:25 +02:00
Tom Rini
7f418ea598 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-net
- DM9000 DM support
- tftp server bug fix
- mdio ofnode support functions
- Various phy fixes and improvements.

[trini: Fixup merge conflicts in drivers/net/phy/ethernet_id.c
drivers/net/phy/phy.c include/phy.h]
2022-04-15 08:10:32 -04:00
Jesse Taube
558331e0f3 board: freescale: imxrt10..-evk: Fix missing include of serial.h
If FALCON mode is enabled we have a missing include in spl_start_uboot.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-04-12 21:08:23 +02:00
Peng Fan
1f7f0dd934 imx: imx8ulp_evk: Enable SD/MMC port auto detect
Enable the SD/MMC port auto detect.
The mmc relevant env can be reset when auto detect is enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Peng Fan
f342c9e381 imx: dynamic setting mmcdev and mmcroot
Dynamic setting mmcdev and mmcroot.
Then when boot linux, we can have correct "root=/dev/mmcblk[x]p2"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 19:10:43 +02:00
Ye Li
7b68357130 imx: imx8ulp_evk: call the handshake with M33
If M33 handshake is successful, TPM and DSI panel MUX setting is
done by M33, no need to set them.
If handshake is failed or M33 is not booted, continue the TPM
and DSI panel MUX setting

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:57 +02:00
Ye Li
34385a20f3 imx: imx8ulp_evk: Update LPDDR4 PHY settings
Update DDR PHY settings to support LPDDR4 mode only by adjusting
DQ VREF ctrl, ODT and pads drive strength.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:57 +02:00
Clement Faure
c72f1f2f0c imx: imx8ulp: release CAAM for the Cortex-A35
Release the CAAM for the A35 from the SPL.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:57 +02:00
Ye Li
3524540e70 imx: imx8ulp: Load the lposc fuse for dual boot
Found the lposc fuse loading having impact to cpu idle in kernel.
Without the loading in dual boot mode, kernel will hang after idle
for a while.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
4ab38f6822 imx: imx8ulp_evk: Skip init DDR for reboot in dual boot mode
When M33 is LPAV owner in dual boot, DDR, PCC5, CGC2 won't be reset
during APD reset. So no need to init DDR again after reboot, but need to
reconfigure the PLL4 PFD/PFDDIV/LPAV NIC etc, because kernel may
change or disable some of them.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Peng Fan
a092f33305 imx: imx8ulp: add ND/LD clock
Add a new ddr script, defconfig for ND
Configure the clock for ND mode
changing A35 to 960MHz for OD mode
Update NIC CLK for the various modes
Introduce clock_init_early/late, late is used after pmic voltage
setting, early is used in the very early stage for upower mu, lpuart and
etc.

Note: NIC runs at 324MHz, 442MHz has some random kernel hang issue with
cpuidle enabled now.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Ye Li
4ddb33dac5 imx: imx8ulp_evk: Remove PMIC Bucks PWM mode settings
This workaround is not needed on i.MX8ULP proto-1B EVK as board has
fixed the problem. Because we don't support proto-1A any longer,
remove the PMIC settings.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Heiko Thiery
775011980b ARM: imx: imx8mn-*-evk: use DM settings for PHY configuration
With the correct settings described in the device-tree the PHY settings
in the board init are no longer required. The values are taken from the
linux device tree.

The PHY latency settings are derived from the phy-mode property and the
voltage seetings are done via the regulator.

Suggested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-04-12 15:36:17 +02:00
Gaurav Jain
8976556a8a Layerscape: Enable Job ring driver model.
LS(1021/1012/1028/1043/1046/1088/2088), LX2160, LX2162
platforms are enabled with JR driver model.

removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2022-04-12 11:20:01 +02:00
Gaurav Jain
cb5d0419f5 crypto/fsl: i.MX8: Enable Job ring driver model.
i.MX8(QM/QXP) - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:19:21 +02:00
Gaurav Jain
2cddfcbc75 crypto/fsl: i.MX8M: Enable Job ring driver model.
i.MX8MM/MN/MP/MQ - added support for JR driver model.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2022-04-12 11:18:34 +02:00
Marek Behún
ffb0f6f488 treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA
Rename constant PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA to make
it compatible with Linux' naming.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2022-04-10 08:44:13 +03:00
Tom Rini
d43cd486ee Convert CONFIG_FSL_QIXIS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_QIXIS
   CONFIG_QIXIS_I2C_ACCESS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Tom Rini
89e9625fc7 ls1021atwr: Use DEBUG and not CONFIG_DEBUG
We use 'DEBUG' and not 'CONFIG_DEBUG' tree-wide for debug code that is
left in, and not wrapped by some other regular debugging type print
macro.

Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-08 10:46:22 -04:00
Sean Anderson
53b953f2eb arm64: ls1046a: Support semihosting fallback
Use the semihosting_enabled function to determine whether or not to
enable semihosting devices. This allows for graceful fallback in the
event a debugger is not attached.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:54 -04:00
Sean Anderson
93c3d32970 ls1046ardb: Add support for JTAG boot
This adds support for booting entirely from JTAG while using a
hard-coded RCW. With these steps, it is not necessary to program a
"good" RCW using CodeWarrior. The method here can be performed with any
JTAG adapter supported by OpenOCD, including the on-board CMSIS-DAP
(albeit very slowly).

These steps require LS1046A support in OpenOCD, which was added in [1].

[1] 5b70c1f679/

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add reference to doc/board/nxp/ls1046ardb.rst]
2022-04-01 16:56:44 -04:00
Sean Anderson
71230cdaa9 nxp: ls1046ardb: Convert README to rST
This converts the readme for this board to rST. I have tried not to
change any semantics from the original (though I did convert MB to M).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Tom Rini
d4a2c400d1 Convert CONFIG_NORFLASH_PS32BIT to Kconfig
This converts the following to Kconfig:
   CONFIG_NORFLASH_PS32BIT

Note that we also attempt to correct the behavior of the code here,
which had been testing for "NORFLASH_PS32BIT" which would never be set,
instead check for the now set "CONFIG_NORFLASH_PS32BIT", which results
in some behavior change.

Cc: TsiChung Liew <Tsi-Chung.Liew@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
7505588342 Convert CONFIG_SRIO_PCIE_BOOT_SLAVE to Kconfig
This converts the following to Kconfig:
   CONFIG_SRIO_PCIE_BOOT_SLAVE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
f13d7e21fc mx53loco: Convert CONFIG_DIALOG_POWER to Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
28f9c3125d Convert CONFIG_DEEP_SLEEP to Kconfig
This converts the following to Kconfig:
   CONFIG_DEEP_SLEEP

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:47 -04:00
Tom Rini
ef26b53a11 MPC837XERDB: Move CONFIG_PCIE to Kconfig
Move this symbol to the board Kconfig file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
11f077bb20 mpc8548cds: Rework CONFIG_LEGACY usage
This CONFIG option is used in one place, so pick a more direct name and
migrate to Kconfig.  Rework the code slightly.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Tom Rini
47267f8261 Remove CONFIG_BOARDNAME and CONFIG_BOARD_NAME
Both of these variables are used in a few hard-coded ways to set some
string values or print something to the user.  In almost all cases, it's
just as useful to hard-code the value used.  The exception here is
printing something closer to correct board name for p1_p2_rdb machines.
This can be done using something from the device tree, but for now
hard-code a non-CONFIG based value instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-01 10:28:46 -04:00
Simon Glass
92e3fb8b5e video: Drop FSL DIU driver
This does not use driver model and is more than two years past the
migration date. Drop it.

It can be added back later if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:18:16 +02:00
Simon Glass
77f46f0607 video: fsl: colibri_vf: Drop FSL DCU driver
This does not use driver model and is more than two years past the
migration date. Drop it.

It can be added back later if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:18:07 +02:00
Simon Glass
1fa43cad86 video: Drop references to CONFIG_VIDEO et al
Drop the Kconfigs which are not used and all references to them. In
particular, this drops CONFIG_VIDEO to avoid confusion and allow us to
eventually rename CONFIG_DM_VIDEO to CONFIG_VIDEO.

Also drop the prototype for video_get_info_str() which is no-longer used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
2022-03-28 20:17:07 +02:00
Simon Glass
fff49e01d8 video: Drop video_fb header
This is not used now. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28 20:16:46 +02:00
Marek Vasut
fea6607317 ARM: imx: imx8mn-ddr4-evk: Add ethernet support
Add support for ethernet on the imx8mn-ddr4-evk.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-02-19 23:32:23 +01:00
Tommaso Merciai
22636ca23b freescale: imx8mm_evk: Use IS_ENABLED instead of #ifdef
Use IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) to make the code
more readable and fix checkpatch.pl warning

Signed-off-by: Tommaso Merciai <tomm.merciai@gmail.com>
2022-02-18 18:12:23 +01:00
Simon Glass
5c86a8f7a1 imx: Don't define __ASSEMBLY__ in source files
This is supposed to be a build-system flag. Move it there so we can
define it before linux/kconfig.h is included.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-08 23:07:58 -05:00
Andrey Zhizhikin
94588ff395 imx8mn-ddr4-evk: generate single bootable image
As suggested in commit 028abfd9b1 ("imx8mm-evk: Generate a single
bootable flash.bin again") for imx8mm_evk, it is possible to produce
single bootable image via binman. This restores the original behavior in
distros, where only one boot container is used to create target image.

Perform similar adaptions in order to provide single bootable image for
imx8mn-ddr4-evk derivate.

Update documentation to drop additional step of copying u-boot.itb

Fixes: 353dfe4b43 ("imx8mn-ddr4-evk: switch to use binman")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:01 +01:00
Ye Li
9c7fbebe5d imx8ulp: Workaround LPOSC_TRIM fuse load issue
8ULP ROM should read the LPOSC trim BIAS fuse to fill the CGC0
LPOSCCTRL[7:0], but it writes a fixed value on A0.1 revision.

A0.2 will fix the issue in ROM. But A0.1 we have to workaround
it in SPL by setting LPOSCCTRL BIASCURRENT again.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05 13:38:39 +01:00
Ye Li
bd8b673003 imx8ulp: Fix DCNANO QoS setting
The setting does not have effect because we should set it after
power on the PS16 for NIC AV.

So move it after upower_init which has powered on all PS

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05 13:38:38 +01:00
Ye Li
9dde390be6 imx8ulp_evk: Control LPI2C0 PCA6416 and TPM0 for display
The board use IO9 of PCA6416 on LPI2C0 and TPM0 for MIPI DSI MUX and
backlight. However the LPI2C0 and TPM0 are M33 resources, in this
patch we simply access them, but this is a temporary solution.
We will modify it when M33 FW changes to set MIPI DSI panel as default
path and enable backlight after reset.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05 13:38:38 +01:00