- DM9000 DM support
- tftp server bug fix
- mdio ofnode support functions
- Various phy fixes and improvements.

[trini: Fixup merge conflicts in drivers/net/phy/ethernet_id.c
drivers/net/phy/phy.c include/phy.h]
This commit is contained in:
Tom Rini 2022-04-15 08:09:52 -04:00
commit 7f418ea598
109 changed files with 1338 additions and 1113 deletions

View file

@ -530,6 +530,14 @@
fake-host-hwaddr = [00 00 66 44 22 22];
};
phy_eth0: phy-test-eth {
compatible = "sandbox,eth";
reg = <0x10007000 0x1000>;
fake-host-hwaddr = [00 00 66 44 22 77];
phy-handle = <&ethphy1>;
phy-mode = "2500base-x";
};
dsa_eth0: dsa-test-eth {
compatible = "sandbox,eth";
reg = <0x10006000 0x1000>;
@ -1555,6 +1563,12 @@
mdio: mdio-test {
compatible = "sandbox,mdio";
#address-cells = <1>;
#size-cells = <0>;
ethphy1: ethernet-phy@1 {
reg = <1>;
};
};
pm-bus-test {

View file

@ -396,7 +396,7 @@ static void mox_phy_leds_start_blinking(void)
return;
}
phydev = phy_find_by_mask(bus, BIT(1), PHY_INTERFACE_MODE_RGMII);
phydev = phy_find_by_mask(bus, BIT(1));
if (!phydev) {
printf("Cannot get ethernet PHY!\n");
return;

View file

@ -345,7 +345,7 @@ int board_eth_init(struct bd_info *bis)
if (!bus)
return -EINVAL;
/* scan phy 4,5,6,7 */
phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
phydev = phy_find_by_mask(bus, (0xf << 4));
if (!phydev) {
ret = -EINVAL;
goto free_bus;

View file

@ -471,7 +471,7 @@ int board_eth_init(struct bd_info *bis)
fm_info_set_mdio(i,
miiphy_get_dev_by_name("HYDRA_RGMII_MDIO"));
break;
case PHY_INTERFACE_MODE_NONE:
case PHY_INTERFACE_MODE_NA:
fm_info_set_phy_address(i, 0);
break;
default:

View file

@ -583,7 +583,7 @@ int board_eth_init(struct bd_info *bis)
fm_info_set_mdio(i,
miiphy_get_dev_by_name("SUPER_HYDRA_RGMII_MDIO"));
break;
case PHY_INTERFACE_MODE_NONE:
case PHY_INTERFACE_MODE_NA:
fm_info_set_phy_address(i, 0);
break;
default:
@ -733,7 +733,7 @@ int board_eth_init(struct bd_info *bis)
fm_info_set_mdio(i,
miiphy_get_dev_by_name("SUPER_HYDRA_RGMII_MDIO"));
break;
case PHY_INTERFACE_MODE_NONE:
case PHY_INTERFACE_MODE_NA:
fm_info_set_phy_address(i, 0);
break;
default:

View file

@ -89,7 +89,7 @@ int board_eth_init(struct bd_info *bis)
case PHY_INTERFACE_MODE_QSGMII:
fm_info_set_phy_address(i, 0);
break;
case PHY_INTERFACE_MODE_NONE:
case PHY_INTERFACE_MODE_NA:
fm_info_set_phy_address(i, 0);
break;
default:
@ -99,7 +99,7 @@ int board_eth_init(struct bd_info *bis)
break;
}
if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_QSGMII ||
fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_NONE)
fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_NA)
fm_info_set_mdio(i, NULL);
else
fm_info_set_mdio(i,

View file

@ -194,11 +194,12 @@ void init_host_phys(struct mii_dev *bus)
for (k = 0; k < 2; ++k) {
struct phy_device *phydev;
phydev = phy_find_by_mask(bus, 1 << k,
PHY_INTERFACE_MODE_SGMII);
phydev = phy_find_by_mask(bus, 1 << k);
if (phydev)
if (phydev) {
phydev->interface = PHY_INTERFACE_MODE_SGMII;
phy_config(phydev);
}
}
}

View file

@ -28,6 +28,7 @@ static void ihs_phy_config(struct phy_device *phydev, bool qinpn, bool qoutpn)
{
u16 reg;
phydev->interface = PHY_INTERFACE_MODE_MII;
phy_config(phydev);
/* enable QSGMII autonegotiation with flow control */
@ -142,10 +143,9 @@ struct porttype *get_porttype(uint octo_phy_mask, uint k)
int init_single_phy(struct porttype *porttype, struct mii_dev *bus,
uint bus_idx, uint m, uint phy_idx)
{
struct phy_device *phydev = phy_find_by_mask(
bus, 1 << (m * 8 + phy_idx),
PHY_INTERFACE_MODE_MII);
struct phy_device *phydev;
phydev = phy_find_by_mask(bus, BIT(m * 8 + phy_idx));
printf(" %u", bus_idx * 32 + m * 8 + phy_idx);
if (!phydev)

View file

@ -117,16 +117,13 @@ int board_late_init(void)
int board_init(void)
{
#ifdef CONFIG_ETH_DESIGNWARE
const char *phy_mode;
int node;
ofnode node;
node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,stm32-dwmac");
if (node < 0)
node = ofnode_by_compatible(ofnode_null(), "st,stm32-dwmac");
if (!ofnode_valid(node))
return -1;
phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
switch (phy_get_interface_by_name(phy_mode)) {
switch (ofnode_read_phy_mode(node)) {
case PHY_INTERFACE_MODE_RMII:
STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
break;
@ -134,7 +131,7 @@ int board_init(void)
STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
break;
default:
printf("PHY interface %s not supported !\n", phy_mode);
printf("Unsupported PHY interface!\n");
}
#endif

View file

@ -37,4 +37,5 @@ CONFIG_SYS_I2C_SLAVE=0x7F
CONFIG_SYS_I2C_SPEED=80000
CONFIG_MTD_NOR_FLASH=y
CONFIG_USE_SYS_MAX_FLASH_BANKS=y
CONFIG_DRIVER_DM9000=y
CONFIG_MCFUART=y

View file

@ -53,6 +53,7 @@ CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DRIVER_DM9000=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y

View file

@ -53,6 +53,7 @@ CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DRIVER_DM9000=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y

View file

@ -51,6 +51,7 @@ CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_DATAFLASH=y
CONFIG_DRIVER_DM9000=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y

View file

@ -49,6 +49,7 @@ CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
# CONFIG_MMC_VERBOSE is not set
CONFIG_JZ47XX_MMC=y
CONFIG_DRIVER_DM9000=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPL_TINY_MEMSET=y

View file

@ -50,6 +50,7 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_DRIVER_DM9000=y
CONFIG_DM_SERIAL=y
CONFIG_PXA_SERIAL=y
CONFIG_USB=y

View file

@ -57,6 +57,7 @@ CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
CONFIG_DRIVER_DM9000=y
CONFIG_CONS_INDEX=3
CONFIG_JFFS2_NAND=y
CONFIG_OF_LIBFDT=y

View file

@ -0,0 +1,26 @@
* Analog Devices ADIN PHY Device Tree binding
Required properties:
- reg: PHY address
Optional properties:
- adi,rx-internal-delay-ps: RGMII RX Clock Delay used only when PHY operates
in RGMII mode with internal delay (phy-mode is 'rgmii-id' or
'rgmii-rxid') in pico-seconds.
- adi,tx-internal-delay-ps: RGMII TX Clock Delay used only when PHY operates
in RGMII mode with internal delay (phy-mode is 'rgmii-id' or
'rgmii-txid') in pico-seconds.
- adi,phy-mode-override: Override phy-mode property for adin. This is useful
when a single device tree supports an adin PHY (e.g. ADIN1300)
or another PHY (e.g. AR8033) at the same address, but they require
different phy-modes.
Example:
ethernet-phy@0 {
reg = <0>;
adi,rx-internal-delay-ps = <1800>;
adi,tx-internal-delay-ps = <2200>;
adi,phy-mode-override = "rgmii-id";
};

View file

@ -1198,3 +1198,47 @@ const char *ofnode_conf_read_str(const char *prop_name)
return ofnode_read_string(node, prop_name);
}
ofnode ofnode_get_phy_node(ofnode node)
{
/* DT node properties that reference a PHY node */
static const char * const phy_handle_str[] = {
"phy-handle", "phy", "phy-device",
};
struct ofnode_phandle_args args = {
.node = ofnode_null()
};
int i;
assert(ofnode_valid(node));
for (i = 0; i < ARRAY_SIZE(phy_handle_str); i++)
if (!ofnode_parse_phandle_with_args(node, phy_handle_str[i],
NULL, 0, 0, &args))
break;
return args.node;
}
phy_interface_t ofnode_read_phy_mode(ofnode node)
{
const char *mode;
int i;
assert(ofnode_valid(node));
mode = ofnode_read_string(node, "phy-mode");
if (!mode)
mode = ofnode_read_string(node, "phy-connection-type");
if (!mode)
return PHY_INTERFACE_MODE_NA;
for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++)
if (!strcmp(mode, phy_interface_strings[i]))
return i;
debug("%s: Invalid PHY interface '%s'\n", __func__, mode);
return PHY_INTERFACE_MODE_NA;
}

View file

@ -398,3 +398,13 @@ int dev_decode_display_timing(const struct udevice *dev, int index,
{
return ofnode_decode_display_timing(dev_ofnode(dev), index, config);
}
ofnode dev_get_phy_node(const struct udevice *dev)
{
return ofnode_get_phy_node(dev_ofnode(dev));
}
phy_interface_t dev_read_phy_mode(const struct udevice *dev)
{
return ofnode_read_phy_mode(dev_ofnode(dev));
}

View file

@ -191,6 +191,11 @@ config CALXEDA_XGMAC
This driver supports the XGMAC in Calxeda Highbank and Midway
machines.
config DRIVER_DM9000
bool "Davicom DM9000 controller driver"
help
The Davicom DM9000 parallel bus external ethernet interface chip.
config DWC_ETH_QOS
bool "Synopsys DWC Ethernet QOS device support"
depends on DM_ETH

View file

@ -1254,7 +1254,6 @@ static const struct eth_ops ag7xxx_eth_ops = {
static int ag7xxx_eth_of_to_plat(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
int ret;
pdata->iobase = dev_read_addr(dev);
@ -1265,13 +1264,9 @@ static int ag7xxx_eth_of_to_plat(struct udevice *dev)
if (ret <= 0)
return ret;
phy_mode = fdt_getprop(gd->fdt_blob, ret, "phy-mode", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
return 0;
}

View file

@ -435,11 +435,11 @@ static int tse_phy_init(struct altera_tse_priv *priv, void *dev)
if (priv->phyaddr)
mask = 1 << priv->phyaddr;
phydev = phy_find_by_mask(priv->bus, mask, priv->interface);
phydev = phy_find_by_mask(priv->bus, mask);
if (!phydev)
return -ENODEV;
phy_connect_dev(phydev, dev);
phy_connect_dev(phydev, dev, priv->interface);
phydev->supported &= PHY_GBIT_FEATURES;
phydev->advertising = phydev->supported;
@ -676,17 +676,10 @@ static int altera_tse_probe(struct udevice *dev)
static int altera_tse_of_to_plat(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
return 0;
}

View file

@ -415,7 +415,6 @@ static int bcm6348_eth_probe(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
struct bcm6348_eth_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args phy;
const char *phy_mode;
int ret, i;
/* get base address */
@ -425,11 +424,8 @@ static int bcm6348_eth_probe(struct udevice *dev)
pdata->iobase = (phys_addr_t) priv->base;
/* get phy mode */
pdata->phy_interface = PHY_INTERFACE_MODE_NONE;
phy_mode = dev_read_string(dev, "phy-mode");
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NONE)
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -ENODEV;
/* get phy */

View file

@ -526,8 +526,6 @@ static int bcmgenet_phy_init(struct bcmgenet_eth_priv *priv, void *dev)
}
phydev->advertising = phydev->supported;
phy_connect_dev(phydev, dev);
priv->phydev = phydev;
phy_config(priv->phydev);
@ -690,20 +688,14 @@ static int bcmgenet_eth_of_to_plat(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
struct bcmgenet_eth_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args phy_node;
const char *phy_mode;
int ret;
pdata->iobase = dev_read_addr(dev);
/* Get phy mode from DT */
pdata->phy_interface = -1;
phy_mode = dev_read_string(dev, "phy-mode");
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
&phy_node);

View file

@ -914,21 +914,15 @@ int designware_eth_of_to_plat(struct udevice *dev)
struct dw_eth_dev *priv = dev_get_priv(dev);
#endif
struct eth_pdata *pdata = &dw_pdata->eth_pdata;
const char *phy_mode;
#if CONFIG_IS_ENABLED(DM_GPIO)
int reset_flags = GPIOD_IS_OUT;
#endif
int ret = 0;
pdata->iobase = dev_read_addr(dev);
pdata->phy_interface = -1;
phy_mode = dev_read_string(dev, "phy-mode");
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
pdata->max_speed = dev_read_u32_default(dev, "max-speed", 0);

File diff suppressed because it is too large Load diff

View file

@ -270,7 +270,7 @@ struct eqos_config {
int config_mac;
int config_mac_mdio;
unsigned int axi_bus_width;
phy_interface_t (*interface)(struct udevice *dev);
phy_interface_t (*interface)(const struct udevice *dev);
struct eqos_ops *ops;
};
@ -1682,7 +1682,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
interface = eqos->config->interface(dev);
if (interface == PHY_INTERFACE_MODE_NONE) {
if (interface == PHY_INTERFACE_MODE_NA) {
pr_err("Invalid PHY interface\n");
return -EINVAL;
}
@ -1729,21 +1729,7 @@ err_probe:
return ret;
}
static phy_interface_t eqos_get_interface_stm32(struct udevice *dev)
{
const char *phy_mode;
phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
debug("%s(dev=%p):\n", __func__, dev);
phy_mode = dev_read_prop(dev, "phy-mode", NULL);
if (phy_mode)
interface = phy_get_interface_by_name(phy_mode);
return interface;
}
static phy_interface_t eqos_get_interface_tegra186(struct udevice *dev)
static phy_interface_t eqos_get_interface_tegra186(const struct udevice *dev)
{
return PHY_INTERFACE_MODE_MII;
}
@ -1757,7 +1743,7 @@ static int eqos_probe_resources_imx(struct udevice *dev)
interface = eqos->config->interface(dev);
if (interface == PHY_INTERFACE_MODE_NONE) {
if (interface == PHY_INTERFACE_MODE_NA) {
pr_err("Invalid PHY interface\n");
return -EINVAL;
}
@ -1766,20 +1752,6 @@ static int eqos_probe_resources_imx(struct udevice *dev)
return 0;
}
static phy_interface_t eqos_get_interface_imx(struct udevice *dev)
{
const char *phy_mode;
phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
debug("%s(dev=%p):\n", __func__, dev);
phy_mode = dev_read_prop(dev, "phy-mode", NULL);
if (phy_mode)
interface = phy_get_interface_by_name(phy_mode);
return interface;
}
static int eqos_remove_resources_tegra186(struct udevice *dev)
{
struct eqos_priv *eqos = dev_get_priv(dev);
@ -1985,7 +1957,7 @@ static const struct eqos_config __maybe_unused eqos_stm32_config = {
.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV,
.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
.axi_bus_width = EQOS_AXI_WIDTH_64,
.interface = eqos_get_interface_stm32,
.interface = dev_read_phy_mode,
.ops = &eqos_stm32_ops
};
@ -2013,7 +1985,7 @@ struct eqos_config __maybe_unused eqos_imx_config = {
.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
.axi_bus_width = EQOS_AXI_WIDTH_64,
.interface = eqos_get_interface_imx,
.interface = dev_read_phy_mode,
.ops = &eqos_imx_ops
};

View file

@ -137,7 +137,7 @@ static int eth_phy_of_to_plat(struct udevice *dev)
/* search "reset-gpios" in phy node */
ret = gpio_request_by_name(dev, "reset-gpios", 0,
&uc_priv->reset_gpio,
GPIOD_IS_OUT);
GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
if (ret && ret != -ENOENT)
return ret;

View file

@ -614,11 +614,11 @@ static int ethoc_phy_init(struct ethoc *priv, void *dev)
mask = 1 << CONFIG_PHY_ADDR;
#endif
phydev = phy_find_by_mask(priv->bus, mask, PHY_INTERFACE_MODE_MII);
phydev = phy_find_by_mask(priv->bus, mask);
if (!phydev)
return -ENODEV;
phy_connect_dev(phydev, dev);
phy_connect_dev(phydev, dev, PHY_INTERFACE_MODE_MII);
phydev->supported &= PHY_BASIC_FEATURES;
phydev->advertising = phydev->supported;

View file

@ -1310,20 +1310,13 @@ static int fecmxc_of_to_plat(struct udevice *dev)
int ret = 0;
struct eth_pdata *pdata = dev_get_plat(dev);
struct fec_priv *priv = dev_get_priv(dev);
const char *phy_mode;
pdata->iobase = dev_read_addr(dev);
priv->eth = (struct ethernet_regs *)pdata->iobase;
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
#ifdef CONFIG_DM_REGULATOR
device_get_supply_regulator(dev, "phy-supply", &priv->phy_supply);
@ -1331,7 +1324,7 @@ static int fecmxc_of_to_plat(struct udevice *dev)
#if CONFIG_IS_ENABLED(DM_GPIO)
ret = gpio_request_by_name(dev, "phy-reset-gpios", 0,
&priv->phy_reset_gpio, GPIOD_IS_OUT);
&priv->phy_reset_gpio, GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
if (ret < 0)
return 0; /* property is optional, don't return error! */

View file

@ -55,7 +55,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
#endif
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
/*B4860 has two 10Gig Mac*/
if ((port == FM1_10GEC1 || port == FM1_10GEC2) &&
@ -112,7 +112,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
(port == FM1_DTSEC2) ||
(port == FM1_DTSEC3) ||
(port == FM1_DTSEC4))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
}
}
@ -131,8 +131,8 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
return PHY_INTERFACE_MODE_SGMII;
break;
default:
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -954,17 +954,6 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info)
return 0;
}
#else /* CONFIG_DM_ETH */
#ifdef CONFIG_PHYLIB
phy_interface_t fman_read_sys_if(struct udevice *dev)
{
const char *if_str;
if_str = ofnode_read_string(dev_ofnode(dev), "phy-connection-type");
debug("MAC system interface mode %s\n", if_str);
return phy_get_interface_by_name(if_str);
}
#endif
static int fm_eth_bind(struct udevice *dev)
{
@ -1038,7 +1027,7 @@ static int fm_eth_probe(struct udevice *dev)
reg = (void *)(uintptr_t)dev_read_addr(dev);
fm_eth->mac_type = dev_get_driver_data(dev);
#ifdef CONFIG_PHYLIB
fm_eth->enet_if = fman_read_sys_if(dev);
fm_eth->enet_if = dev_read_phy_mode(dev);
#else
fm_eth->enet_if = PHY_INTERFACE_MODE_SGMII;
printf("%s: warning - unable to determine interface type\n", __func__);

View file

@ -130,7 +130,7 @@ static int fm_port_to_index(enum fm_port port)
/*
* Determine if an interface is actually active based on HW config
* we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if
* we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NA if
* the interface is not active based on HW cfg of the SoC
*/
void fman_enet_init(void)
@ -141,7 +141,7 @@ void fman_enet_init(void)
phy_interface_t enet_if;
enet_if = fman_port_enet_if(fm_info[i].port);
if (enet_if != PHY_INTERFACE_MODE_NONE) {
if (enet_if != PHY_INTERFACE_MODE_NA) {
fm_info[i].enabled = 1;
fm_info[i].enet_if = enet_if;
} else {
@ -221,12 +221,12 @@ phy_interface_t fm_info_get_enet_if(enum fm_port port)
int i = fm_port_to_index(port);
if (i == -1)
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if (fm_info[i].enabled)
return fm_info[i].enet_if;
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
static void

View file

@ -54,13 +54,13 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM1_10GEC1) && (is_serdes_configured(XFI_FM1_MAC9)))
return PHY_INTERFACE_MODE_XGMII;
if ((port == FM1_DTSEC9) && (is_serdes_configured(XFI_FM1_MAC9)))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if (port == FM1_DTSEC3)
if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
@ -107,5 +107,5 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
break;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -54,19 +54,19 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM1_10GEC1) && (is_serdes_configured(XFI_FM1_MAC9)))
return PHY_INTERFACE_MODE_XGMII;
if ((port == FM1_DTSEC9) && (is_serdes_configured(XFI_FM1_MAC9)))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM1_10GEC2) && (is_serdes_configured(XFI_FM1_MAC10)))
return PHY_INTERFACE_MODE_XGMII;
if ((port == FM1_DTSEC10) && (is_serdes_configured(XFI_FM1_MAC10)))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if (port == FM1_DTSEC3)
if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
@ -118,5 +118,5 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
break;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -46,7 +46,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
u32 pordevsr = in_be32(&gur->pordevsr);
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
/* DTSEC1 can be SGMII, RGMII or RMII */
if (port == FM1_DTSEC1) {
@ -68,5 +68,5 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
return PHY_INTERFACE_MODE_RGMII;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -54,7 +54,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM1_10GEC1) && (is_serdes_configured(XAUI_FM1)))
return PHY_INTERFACE_MODE_XGMII;
@ -91,8 +91,8 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
return PHY_INTERFACE_MODE_SGMII;
break;
default:
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -50,7 +50,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM1_10GEC1) && (is_serdes_configured(XAUI_FM1)))
return PHY_INTERFACE_MODE_XGMII;
@ -82,8 +82,8 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
return PHY_INTERFACE_MODE_SGMII;
break;
default:
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -56,7 +56,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM1_10GEC1) && (is_serdes_configured(XAUI_FM1)))
return PHY_INTERFACE_MODE_XGMII;
@ -99,8 +99,8 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
return PHY_INTERFACE_MODE_SGMII;
break;
default:
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -39,7 +39,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM1_10GEC1) && (is_serdes_configured(XFI_FM1_MAC1)))
return PHY_INTERFACE_MODE_XGMII;
@ -83,5 +83,5 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
break;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -56,8 +56,8 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
return PHY_INTERFACE_MODE_SGMII;
break;
default:
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -47,7 +47,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM1_10GEC1 || port == FM1_10GEC2) &&
((is_serdes_configured(XAUI_FM1_MAC9)) ||
@ -85,8 +85,8 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
return PHY_INTERFACE_MODE_SGMII;
break;
default:
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -61,7 +61,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
if (is_device_disabled(port))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM1_10GEC1 || port == FM1_10GEC2) &&
((is_serdes_configured(XAUI_FM1_MAC9)) ||
@ -73,7 +73,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
if ((port == FM1_DTSEC9 || port == FM1_DTSEC10) &&
((is_serdes_configured(XFI_FM1_MAC9)) ||
(is_serdes_configured(XFI_FM1_MAC10))))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if ((port == FM2_10GEC1 || port == FM2_10GEC2) &&
((is_serdes_configured(XAUI_FM2_MAC9)) ||
@ -166,5 +166,5 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
break;
}
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -260,9 +260,6 @@ static int enetc_init_sxgmii(struct udevice *dev)
static void enetc_start_pcs(struct udevice *dev)
{
struct enetc_priv *priv = dev_get_priv(dev);
const char *if_str;
priv->if_type = PHY_INTERFACE_MODE_NONE;
/* register internal MDIO for debug purposes */
if (enetc_read_port(priv, ENETC_PCAPR0) & ENETC_PCAPRO_MDIO) {
@ -279,14 +276,12 @@ static void enetc_start_pcs(struct udevice *dev)
return;
}
if_str = ofnode_read_string(dev_ofnode(dev), "phy-mode");
if (if_str)
priv->if_type = phy_get_interface_by_name(if_str);
else
priv->if_type = dev_read_phy_mode(dev);
if (priv->if_type == PHY_INTERFACE_MODE_NA) {
enetc_dbg(dev,
"phy-mode property not found, defaulting to SGMII\n");
if (priv->if_type < 0)
priv->if_type = PHY_INTERFACE_MODE_NONE;
priv->if_type = PHY_INTERFACE_MODE_SGMII;
}
switch (priv->if_type) {
case PHY_INTERFACE_MODE_SGMII:

View file

@ -549,17 +549,12 @@ static int ftgmac100_of_to_plat(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
struct ftgmac100_data *priv = dev_get_priv(dev);
const char *phy_mode;
pdata->iobase = dev_read_addr(dev);
pdata->phy_interface = -1;
phy_mode = dev_read_string(dev, "phy-mode");
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
dev_err(dev, "Invalid PHY interface '%s'\n", phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
pdata->max_speed = dev_read_u32_default(dev, "max-speed", 0);

View file

@ -561,19 +561,14 @@ static int higmac_remove(struct udevice *dev)
static int higmac_of_to_plat(struct udevice *dev)
{
struct higmac_priv *priv = dev_get_priv(dev);
int phyintf = PHY_INTERFACE_MODE_NONE;
const char *phy_mode;
ofnode phy_node;
priv->base = dev_remap_addr_index(dev, 0);
priv->macif_ctrl = dev_remap_addr_index(dev, 1);
phy_mode = dev_read_string(dev, "phy-mode");
if (phy_mode)
phyintf = phy_get_interface_by_name(phy_mode);
if (phyintf == PHY_INTERFACE_MODE_NONE)
priv->phyintf = dev_read_phy_mode(dev);
if (priv->phyintf == PHY_INTERFACE_MODE_NA)
return -ENODEV;
priv->phyintf = phyintf;
phy_node = dev_read_subnode(dev, "phy");
if (!ofnode_valid(phy_node)) {

View file

@ -1120,31 +1120,14 @@ static uint32_t ldpaa_eth_get_dpmac_id(struct udevice *dev)
return fdtdec_get_uint(gd->fdt_blob, port_node, "reg", -1);
}
static const char *ldpaa_eth_get_phy_mode_str(struct udevice *dev)
{
int port_node = dev_of_offset(dev);
const char *phy_mode_str;
phy_mode_str = fdt_getprop(gd->fdt_blob, port_node,
"phy-connection-type", NULL);
if (phy_mode_str)
return phy_mode_str;
phy_mode_str = fdt_getprop(gd->fdt_blob, port_node, "phy-mode", NULL);
return phy_mode_str;
}
static int ldpaa_eth_bind(struct udevice *dev)
{
const char *phy_mode_str = NULL;
uint32_t dpmac_id;
char eth_name[16];
int phy_mode = -1;
phy_mode_str = ldpaa_eth_get_phy_mode_str(dev);
if (phy_mode_str)
phy_mode = phy_get_interface_by_name(phy_mode_str);
if (phy_mode == -1) {
phy_mode = dev_read_phy_mode(dev);
if (phy_mode == PHY_INTERFACE_MODE_NA) {
dev_err(dev, "incorrect phy mode\n");
return -EINVAL;
}
@ -1155,7 +1138,8 @@ static int ldpaa_eth_bind(struct udevice *dev)
return -EINVAL;
}
sprintf(eth_name, "DPMAC%d@%s", dpmac_id, phy_mode_str);
sprintf(eth_name, "DPMAC%d@%s", dpmac_id,
phy_string_for_interface(phy_mode));
device_set_name(dev, eth_name);
return 0;
@ -1164,11 +1148,9 @@ static int ldpaa_eth_bind(struct udevice *dev)
static int ldpaa_eth_of_to_plat(struct udevice *dev)
{
struct ldpaa_eth_priv *priv = dev_get_priv(dev);
const char *phy_mode_str;
priv->dpmac_id = ldpaa_eth_get_dpmac_id(dev);
phy_mode_str = ldpaa_eth_get_phy_mode_str(dev);
priv->phy_mode = phy_get_interface_by_name(phy_mode_str);
priv->phy_mode = dev_read_phy_mode(dev);
return 0;
}

View file

@ -16,7 +16,7 @@ struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS];
__weak phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtc)
{
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)
@ -26,10 +26,10 @@ void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)
dpmac_info[dpmac_id].enabled = 0;
dpmac_info[dpmac_id].id = 0;
dpmac_info[dpmac_id].enet_if = PHY_INTERFACE_MODE_NONE;
dpmac_info[dpmac_id].enet_if = PHY_INTERFACE_MODE_NA;
enet_if = wriop_dpmac_enet_if(dpmac_id, lane_prtcl);
if (enet_if != PHY_INTERFACE_MODE_NONE) {
if (enet_if != PHY_INTERFACE_MODE_NA) {
dpmac_info[dpmac_id].enabled = 1;
dpmac_info[dpmac_id].id = dpmac_id;
dpmac_info[dpmac_id].enet_if = enet_if;
@ -183,10 +183,10 @@ phy_interface_t wriop_get_enet_if(int dpmac_id)
int i = wriop_dpmac_to_index(dpmac_id);
if (i == -1)
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if (dpmac_info[i].enabled)
return dpmac_info[i].enet_if;
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}

View file

@ -50,7 +50,7 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
enum srds_prtcl;
if (is_device_disabled(dpmac_id + 1))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
switch (lane_prtcl) {
case SGMII1:
@ -66,7 +66,7 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
if (lane_prtcl >= QSGMII_A && lane_prtcl <= QSGMII_B)
return PHY_INTERFACE_MODE_QSGMII;
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)

View file

@ -62,7 +62,7 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
enum srds_prtcl;
if (is_device_disabled(dpmac_id + 1))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if (lane_prtcl >= SGMII1 && lane_prtcl <= SGMII16)
return PHY_INTERFACE_MODE_SGMII;
@ -76,7 +76,7 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
if (lane_prtcl >= QSGMII_A && lane_prtcl <= QSGMII_D)
return PHY_INTERFACE_MODE_QSGMII;
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)

View file

@ -58,7 +58,7 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
enum srds_prtcl;
if (is_device_disabled(dpmac_id))
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
if (lane_prtcl >= SGMII1 && lane_prtcl <= SGMII18)
return PHY_INTERFACE_MODE_SGMII;
@ -78,7 +78,7 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
if (lane_prtcl >= _100GE1 && lane_prtcl <= _100GE2)
return PHY_INTERFACE_MODE_CAUI4;
return PHY_INTERFACE_MODE_NONE;
return PHY_INTERFACE_MODE_NA;
}
#ifdef CONFIG_SYS_FSL_HAS_RGMII

View file

@ -1360,17 +1360,11 @@ static int macb_eth_probe(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
struct macb_device *macb = dev_get_priv(dev);
struct ofnode_phandle_args phandle_args;
const char *phy_mode;
int ret;
phy_mode = dev_read_prop(dev, "phy-mode", NULL);
if (phy_mode)
macb->phy_interface = phy_get_interface_by_name(phy_mode);
if (macb->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
macb->phy_interface = dev_read_phy_mode(dev);
if (macb->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
/* Read phyaddr from DT */
if (!dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,

View file

@ -20,7 +20,6 @@ struct mdio_mux_sandbox_priv {
static int mdio_mux_sandbox_mark_selection(struct udevice *dev, int sel)
{
struct udevice *mdio;
struct mdio_ops *ops;
int err;
/*
@ -30,9 +29,8 @@ static int mdio_mux_sandbox_mark_selection(struct udevice *dev, int sel)
err = uclass_get_device_by_name(UCLASS_MDIO, "mdio-test", &mdio);
if (err)
return err;
ops = mdio_get_ops(mdio);
return ops->write(mdio, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
SANDBOX_PHY_REG_CNT - 1, (u16)sel);
return dm_mdio_write(mdio, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE,
SANDBOX_PHY_REG_CNT - 1, (u16)sel);
}
static int mdio_mux_sandbox_select(struct udevice *dev, int cur, int sel)

View file

@ -954,7 +954,7 @@ static int jr2_probe(struct udevice *dev)
phy = phy_connect(priv->ports[i].bus,
priv->ports[i].phy_addr, dev,
PHY_INTERFACE_MODE_NONE);
PHY_INTERFACE_MODE_NA);
if (phy)
board_phy_config(phy);
}

View file

@ -685,7 +685,7 @@ static int luton_probe(struct udevice *dev)
phy = phy_connect(priv->ports[i].bus,
priv->ports[i].phy_addr, dev,
PHY_INTERFACE_MODE_NONE);
PHY_INTERFACE_MODE_NA);
if (phy && i >= MAX_INT_PORT)
board_phy_config(phy);
}

View file

@ -608,7 +608,7 @@ static int ocelot_probe(struct udevice *dev)
phy = phy_connect(priv->ports[i].bus,
priv->ports[i].phy_addr, dev,
PHY_INTERFACE_MODE_NONE);
PHY_INTERFACE_MODE_NA);
if (phy && external_bus(priv, i))
board_phy_config(phy);
}

View file

@ -561,7 +561,7 @@ static int serval_probe(struct udevice *dev)
phy = phy_connect(priv->ports[i].bus,
priv->ports[i].phy_addr, dev,
PHY_INTERFACE_MODE_NONE);
PHY_INTERFACE_MODE_NA);
if (phy)
board_phy_config(phy);
}

View file

@ -482,7 +482,7 @@ static int servalt_probe(struct udevice *dev)
continue;
phy_connect(priv->ports[i].bus, priv->ports[i].phy_addr, dev,
PHY_INTERFACE_MODE_NONE);
PHY_INTERFACE_MODE_NA);
}
return 0;

View file

@ -596,7 +596,7 @@ static int mt7620_setup_gmac_mode(struct mt7620_eth_priv *priv, u32 gmac,
case PHY_INTERFACE_MODE_RGMII:
ge_mode = MT7620_SYSC_GE_RGMII;
break;
case PHY_INTERFACE_MODE_NONE:
case PHY_INTERFACE_MODE_NA:
if (gmac == 2)
ge_mode = MT7620_SYSC_GE_ESW_PHY;
else
@ -620,7 +620,7 @@ static void mt7620_gsw_setup_port(struct mt7620_eth_priv *priv, u32 port,
{
u32 pmcr;
if (port_cfg->mode == PHY_INTERFACE_MODE_NONE) {
if (port_cfg->mode == PHY_INTERFACE_MODE_NA) {
if (port == 5) {
gsw_write(priv, GSW_PMCR(port), FORCE_MODE);
return;
@ -666,7 +666,7 @@ static void mt7620_gsw_setup_phy_polling(struct mt7620_eth_priv *priv)
{
int phy_addr_st, phy_addr_end;
if (priv->port_cfg[0].mode == PHY_INTERFACE_MODE_NONE)
if (priv->port_cfg[0].mode == PHY_INTERFACE_MODE_NA)
priv->ephy_num = NUM_FE_PHYS;
else
priv->ephy_num = NUM_FE_PHYS - 1;
@ -1048,33 +1048,20 @@ static int mt7620_eth_parse_gsw_port(struct mt7620_eth_priv *priv, u32 idx,
ofnode node)
{
ofnode subnode;
const char *str;
int mode, speed, ret;
int speed, ret;
u32 phy_addr;
str = ofnode_read_string(node, "phy-mode");
if (str) {
mode = phy_get_interface_by_name(str);
if (mode < 0) {
dev_err(priv->dev, "mt7620_eth: invalid phy-mode\n");
return -EINVAL;
}
priv->port_cfg[idx].mode = ofnode_read_phy_mode(node);
switch (mode) {
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_RMII:
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_NONE:
break;
default:
dev_err(priv->dev,
"mt7620_eth: unsupported phy-mode\n");
return -ENOTSUPP;
}
priv->port_cfg[idx].mode = mode;
} else {
priv->port_cfg[idx].mode = PHY_INTERFACE_MODE_NONE;
switch (priv->port_cfg[idx].mode) {
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_RMII:
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_NA:
break;
default:
dev_err(priv->dev, "mt7620_eth: unsupported phy-mode\n");
return -ENOTSUPP;
}
subnode = ofnode_find_subnode(node, "fixed-link");
@ -1141,14 +1128,14 @@ static int mt7620_eth_parse_gsw_cfg(struct udevice *dev)
if (ret)
return ret;
} else {
priv->port_cfg[0].mode = PHY_INTERFACE_MODE_NONE;
priv->port_cfg[0].mode = PHY_INTERFACE_MODE_NA;
}
subnode = ofnode_find_subnode(dev_ofnode(dev), "port5");
if (ofnode_valid(subnode))
return mt7620_eth_parse_gsw_port(priv, 1, subnode);
priv->port_cfg[1].mode = PHY_INTERFACE_MODE_NONE;
priv->port_cfg[1].mode = PHY_INTERFACE_MODE_NA;
return 0;
}

View file

@ -1447,11 +1447,9 @@ static int mtk_eth_of_to_plat(struct udevice *dev)
priv->gmac_id = dev_read_u32_default(dev, "mediatek,gmac-id", 0);
/* Interface mode is required */
str = dev_read_string(dev, "phy-mode");
if (str) {
pdata->phy_interface = phy_get_interface_by_name(str);
priv->phy_interface = pdata->phy_interface;
} else {
pdata->phy_interface = dev_read_phy_mode(dev);
priv->phy_interface = pdata->phy_interface;
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA) {
printf("error: phy-mode is not set\n");
return -EINVAL;
}

View file

@ -993,7 +993,6 @@ static int mvgbe_of_to_plat(struct udevice *dev)
struct mvgbe_device *dmvgbe = dev_get_priv(dev);
void *blob = (void *)gd->fdt_blob;
int node = dev_of_offset(dev);
const char *phy_mode;
int fl_node;
int pnode;
unsigned long addr;
@ -1005,10 +1004,8 @@ static int mvgbe_of_to_plat(struct udevice *dev)
"marvell,kirkwood-eth-port");
/* Get phy-mode / phy_interface from DT */
phy_mode = fdt_getprop(gd->fdt_blob, pnode, "phy-mode", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
else
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
pdata->phy_interface = PHY_INTERFACE_MODE_GMII;
dmvgbe->phy_interface = pdata->phy_interface;

View file

@ -1799,20 +1799,13 @@ static const struct eth_ops mvneta_ops = {
static int mvneta_of_to_plat(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
pdata->iobase = dev_read_addr(dev);
/* Get phy-mode / phy_interface from DT */
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
return 0;
}

View file

@ -4786,11 +4786,9 @@ static int mvpp2_port_init(struct udevice *dev, struct mvpp2_port *port)
static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port)
{
int port_node = dev_of_offset(dev);
const char *phy_mode_str;
int phy_node;
u32 id;
u32 phyaddr = 0;
int phy_mode = -1;
int fixed_link = 0;
int ret;
@ -4821,10 +4819,8 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port)
phyaddr = PHY_MAX_ADDR;
}
phy_mode_str = fdt_getprop(gd->fdt_blob, port_node, "phy-mode", NULL);
if (phy_mode_str)
phy_mode = phy_get_interface_by_name(phy_mode_str);
if (phy_mode == -1) {
port->phy_interface = dev_read_phy_mode(dev);
if (port->phy_interface == PHY_INTERFACE_MODE_NA) {
dev_err(dev, "incorrect phy mode\n");
return -EINVAL;
}
@ -4847,7 +4843,6 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port)
port->first_rxq = port->id * rxq_number;
else
port->first_rxq = port->id * port->priv->max_port_rxqs;
port->phy_interface = phy_mode;
port->phyaddr = phyaddr;
return 0;

View file

@ -416,13 +416,13 @@ static int pch_gbe_phy_init(struct udevice *dev)
struct phy_device *phydev;
int mask = 0xffffffff;
phydev = phy_find_by_mask(priv->bus, mask, plat->phy_interface);
phydev = phy_find_by_mask(priv->bus, mask);
if (!phydev) {
printf("pch_gbe: cannot find the phy\n");
return -1;
}
phy_connect_dev(phydev, dev);
phy_connect_dev(phydev, dev, plat->phy_interface);
phydev->supported &= PHY_GBIT_FEATURES;
phydev->advertising = phydev->supported;

View file

@ -68,6 +68,11 @@ endif # MV88E61XX_SWITCH
config PHYLIB_10G
bool "Generic 10G PHY support"
config PHY_ADIN
bool "Analog Devices Industrial Ethernet PHYs"
help
Add support for configuring RGMII on Analog Devices ADIN PHYs.
menuconfig PHY_AQUANTIA
bool "Aquantia Ethernet PHYs support"
select PHY_GIGE

View file

@ -10,6 +10,7 @@ obj-$(CONFIG_MV88E6352_SWITCH) += mv88e6352.o
obj-$(CONFIG_PHYLIB) += phy.o
obj-$(CONFIG_PHYLIB_10G) += generic_10g.o
obj-$(CONFIG_PHY_ADIN) += adin.o
obj-$(CONFIG_PHY_AQUANTIA) += aquantia.o
obj-$(CONFIG_PHY_ATHEROS) += atheros.o
obj-$(CONFIG_PHY_BROADCOM) += broadcom.o

228
drivers/net/phy/adin.c Normal file
View file

@ -0,0 +1,228 @@
// SPDX-License-Identifier: GPL-2.0+
/**
* Driver for Analog Devices Industrial Ethernet PHYs
*
* Copyright 2019 Analog Devices Inc.
* Copyright 2022 Variscite Ltd.
*/
#include <common.h>
#include <phy.h>
#include <linux/bitops.h>
#include <linux/bitfield.h>
#define PHY_ID_ADIN1300 0x0283bc30
#define ADIN1300_EXT_REG_PTR 0x10
#define ADIN1300_EXT_REG_DATA 0x11
#define ADIN1300_GE_RGMII_CFG 0xff23
#define ADIN1300_GE_RGMII_RX_MSK GENMASK(8, 6)
#define ADIN1300_GE_RGMII_RX_SEL(x) \
FIELD_PREP(ADIN1300_GE_RGMII_RX_MSK, x)
#define ADIN1300_GE_RGMII_GTX_MSK GENMASK(5, 3)
#define ADIN1300_GE_RGMII_GTX_SEL(x) \
FIELD_PREP(ADIN1300_GE_RGMII_GTX_MSK, x)
#define ADIN1300_GE_RGMII_RXID_EN BIT(2)
#define ADIN1300_GE_RGMII_TXID_EN BIT(1)
#define ADIN1300_GE_RGMII_EN BIT(0)
/* RGMII internal delay settings for rx and tx for ADIN1300 */
#define ADIN1300_RGMII_1_60_NS 0x0001
#define ADIN1300_RGMII_1_80_NS 0x0002
#define ADIN1300_RGMII_2_00_NS 0x0000
#define ADIN1300_RGMII_2_20_NS 0x0006
#define ADIN1300_RGMII_2_40_NS 0x0007
/**
* struct adin_cfg_reg_map - map a config value to aregister value
* @cfg value in device configuration
* @reg value in the register
*/
struct adin_cfg_reg_map {
int cfg;
int reg;
};
static const struct adin_cfg_reg_map adin_rgmii_delays[] = {
{ 1600, ADIN1300_RGMII_1_60_NS },
{ 1800, ADIN1300_RGMII_1_80_NS },
{ 2000, ADIN1300_RGMII_2_00_NS },
{ 2200, ADIN1300_RGMII_2_20_NS },
{ 2400, ADIN1300_RGMII_2_40_NS },
{ },
};
static int adin_lookup_reg_value(const struct adin_cfg_reg_map *tbl, int cfg)
{
size_t i;
for (i = 0; tbl[i].cfg; i++) {
if (tbl[i].cfg == cfg)
return tbl[i].reg;
}
return -EINVAL;
}
static u32 adin_get_reg_value(struct phy_device *phydev,
const char *prop_name,
const struct adin_cfg_reg_map *tbl,
u32 dflt)
{
u32 val;
int rc;
ofnode node = phy_get_ofnode(phydev);
if (!ofnode_valid(node)) {
printf("%s: failed to get node\n", __func__);
return -EINVAL;
}
if (ofnode_read_u32(node, prop_name, &val)) {
printf("%s: failed to find %s, using default %d\n",
__func__, prop_name, dflt);
return dflt;
}
debug("%s: %s = '%d'\n", __func__, prop_name, val);
rc = adin_lookup_reg_value(tbl, val);
if (rc < 0) {
printf("%s: Unsupported value %u for %s using default (%u)\n",
__func__, val, prop_name, dflt);
return dflt;
}
return rc;
}
/**
* adin_get_phy_mode_override - Get phy-mode override for adin PHY
*
* The function gets phy-mode string from property 'adi,phy-mode-override'
* and return its index in phy_interface_strings table, or -1 in error case.
*/
int adin_get_phy_mode_override(struct phy_device *phydev)
{
ofnode node = phy_get_ofnode(phydev);
const char *phy_mode_override;
const char *prop_phy_mode_override = "adi,phy-mode-override";
int override_interface;
phy_mode_override = ofnode_read_string(node, prop_phy_mode_override);
if (!phy_mode_override)
return -ENODEV;
debug("%s: %s = '%s'\n",
__func__, prop_phy_mode_override, phy_mode_override);
override_interface = phy_get_interface_by_name(phy_mode_override);
if (override_interface < 0)
printf("%s: %s = '%s' is not valid\n",
__func__, prop_phy_mode_override, phy_mode_override);
return override_interface;
}
static u16 adin_ext_read(struct phy_device *phydev, const u32 regnum)
{
u16 val;
phy_write(phydev, MDIO_DEVAD_NONE, ADIN1300_EXT_REG_PTR, regnum);
val = phy_read(phydev, MDIO_DEVAD_NONE, ADIN1300_EXT_REG_DATA);
debug("%s: adin@0x%x 0x%x=0x%x\n", __func__, phydev->addr, regnum, val);
return val;
}
static int adin_ext_write(struct phy_device *phydev, const u32 regnum, const u16 val)
{
debug("%s: adin@0x%x 0x%x=0x%x\n", __func__, phydev->addr, regnum, val);
phy_write(phydev, MDIO_DEVAD_NONE, ADIN1300_EXT_REG_PTR, regnum);
return phy_write(phydev, MDIO_DEVAD_NONE, ADIN1300_EXT_REG_DATA, val);
}
static int adin_config_rgmii_mode(struct phy_device *phydev)
{
u16 reg_val;
u32 val;
int phy_mode_override = adin_get_phy_mode_override(phydev);
if (phy_mode_override >= 0) {
phydev->interface = (phy_interface_t) phy_mode_override;
}
reg_val = adin_ext_read(phydev, ADIN1300_GE_RGMII_CFG);
if (!phy_interface_is_rgmii(phydev)) {
/* Disable RGMII */
reg_val &= ~ADIN1300_GE_RGMII_EN;
return adin_ext_write(phydev, ADIN1300_GE_RGMII_CFG, reg_val);
}
/* Enable RGMII */
reg_val |= ADIN1300_GE_RGMII_EN;
/* Enable / Disable RGMII RX Delay */
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
reg_val |= ADIN1300_GE_RGMII_RXID_EN;
val = adin_get_reg_value(phydev, "adi,rx-internal-delay-ps",
adin_rgmii_delays,
ADIN1300_RGMII_2_00_NS);
reg_val &= ~ADIN1300_GE_RGMII_RX_MSK;
reg_val |= ADIN1300_GE_RGMII_RX_SEL(val);
} else {
reg_val &= ~ADIN1300_GE_RGMII_RXID_EN;
}
/* Enable / Disable RGMII RX Delay */
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
reg_val |= ADIN1300_GE_RGMII_TXID_EN;
val = adin_get_reg_value(phydev, "adi,tx-internal-delay-ps",
adin_rgmii_delays,
ADIN1300_RGMII_2_00_NS);
reg_val &= ~ADIN1300_GE_RGMII_GTX_MSK;
reg_val |= ADIN1300_GE_RGMII_GTX_SEL(val);
} else {
reg_val &= ~ADIN1300_GE_RGMII_TXID_EN;
}
return adin_ext_write(phydev, ADIN1300_GE_RGMII_CFG, reg_val);
}
static int adin1300_config(struct phy_device *phydev)
{
int ret;
printf("ADIN1300 PHY detected at addr %d\n", phydev->addr);
ret = adin_config_rgmii_mode(phydev);
if (ret < 0)
return ret;
return genphy_config(phydev);
}
static struct phy_driver ADIN1300_driver = {
.name = "ADIN1300",
.uid = PHY_ID_ADIN1300,
.mask = 0xffffffff,
.features = PHY_GBIT_FEATURES,
.config = adin1300_config,
.startup = genphy_startup,
.shutdown = genphy_shutdown,
};
int phy_adin_init(void)
{
phy_register(&ADIN1300_driver);
return 0;
}

View file

@ -305,7 +305,7 @@ struct {
u16 syscfg;
int cnt;
u16 start_rate;
} aquantia_syscfg[PHY_INTERFACE_MODE_COUNT] = {
} aquantia_syscfg[PHY_INTERFACE_MODE_MAX] = {
[PHY_INTERFACE_MODE_SGMII] = {0x04b, AQUANTIA_VND1_GSYSCFG_1G,
AQUANTIA_VND1_GSTART_RATE_1G},
[PHY_INTERFACE_MODE_2500BASEX] = {0x144, AQUANTIA_VND1_GSYSCFG_2_5G,

View file

@ -199,7 +199,7 @@ static int ar803x_of_init(struct phy_device *phydev)
node = phy_get_ofnode(phydev);
if (!ofnode_valid(node))
return -EINVAL;
return 0;
priv = malloc(sizeof(*priv));
if (!priv)

View file

@ -158,7 +158,7 @@ static int dp83867_of_init(struct phy_device *phydev)
node = phy_get_ofnode(phydev);
if (!ofnode_valid(node))
return -EINVAL;
return 0;
/* Optional configuration */
ret = ofnode_read_u32(node, "ti,clk-output-sel",
@ -266,7 +266,7 @@ static int dp83867_of_init(struct phy_device *phydev)
static int dp83867_config(struct phy_device *phydev)
{
struct dp83867_private *dp83867;
unsigned int val, delay, cfg2;
int val, delay, cfg2;
int ret, bs;
dp83867 = (struct dp83867_private *)phydev->priv;
@ -291,8 +291,11 @@ static int dp83867_config(struct phy_device *phydev)
if (phy_interface_is_rgmii(phydev)) {
val = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL);
if (val < 0)
if (val < 0) {
ret = val;
goto err_out;
}
val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK;
val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT);

View file

@ -12,7 +12,7 @@
#include <asm/gpio.h>
struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
int phyaddr, phy_interface_t interface)
int phyaddr)
{
struct phy_device *phydev;
struct ofnode_phandle_args phandle_args;
@ -68,7 +68,7 @@ struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
}
id = vendor << 16 | device;
phydev = phy_device_create(bus, phyaddr, id, false, interface);
phydev = phy_device_create(bus, phyaddr, id, false);
if (phydev)
phydev->node = node;

View file

@ -490,6 +490,9 @@ int phy_init(void)
#ifdef CONFIG_MV88E61XX_SWITCH
phy_mv88e61xx_init();
#endif
#ifdef CONFIG_PHY_ADIN
phy_adin_init();
#endif
#ifdef CONFIG_PHY_AQUANTIA
phy_aquantia_init();
#endif
@ -635,18 +638,17 @@ static int phy_probe(struct phy_device *phydev)
return err;
}
static struct phy_driver *generic_for_interface(phy_interface_t interface)
static struct phy_driver *generic_for_phy(struct phy_device *phydev)
{
#ifdef CONFIG_PHYLIB_10G
if (is_10g_interface(interface))
if (phydev->is_c45)
return &gen10g_driver;
#endif
return &genphy_driver;
}
static struct phy_driver *get_phy_driver(struct phy_device *phydev,
phy_interface_t interface)
static struct phy_driver *get_phy_driver(struct phy_device *phydev)
{
struct list_head *entry;
int phy_id = phydev->phy_id;
@ -659,12 +661,11 @@ static struct phy_driver *get_phy_driver(struct phy_device *phydev,
}
/* If we made it here, there's no driver for this PHY */
return generic_for_interface(interface);
return generic_for_phy(phydev);
}
struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
u32 phy_id, bool is_c45,
phy_interface_t interface)
u32 phy_id, bool is_c45)
{
struct phy_device *dev;
@ -683,7 +684,7 @@ struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
dev->duplex = -1;
dev->link = 0;
dev->interface = interface;
dev->interface = PHY_INTERFACE_MODE_NA;
#ifdef CONFIG_DM_ETH
dev->node = ofnode_null();
@ -696,7 +697,7 @@ struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
dev->is_c45 = is_c45;
dev->bus = bus;
dev->drv = get_phy_driver(dev, interface);
dev->drv = get_phy_driver(dev);
if (phy_probe(dev)) {
printf("%s, PHY probe failed\n", __func__);
@ -745,8 +746,7 @@ int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
}
static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
uint phy_mask, int devad,
phy_interface_t interface)
uint phy_mask, int devad)
{
u32 phy_id = 0xffffffff;
bool is_c45;
@ -767,8 +767,7 @@ static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
/* If the PHY ID is mostly f's, we didn't find anything */
if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
return phy_device_create(bus, addr, phy_id, is_c45,
interface);
return phy_device_create(bus, addr, phy_id, is_c45);
}
next:
phy_mask &= ~(1 << addr);
@ -777,25 +776,22 @@ next:
}
static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
uint phy_mask,
phy_interface_t interface)
uint phy_mask)
{
/* If we have one, return the existing device, with new interface */
while (phy_mask) {
int addr = ffs(phy_mask) - 1;
if (bus->phymap[addr]) {
bus->phymap[addr]->interface = interface;
if (bus->phymap[addr])
return bus->phymap[addr];
}
phy_mask &= ~(1 << addr);
}
return NULL;
}
static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
uint phy_mask,
phy_interface_t interface)
uint phy_mask)
{
struct phy_device *phydev;
int devad[] = {
@ -811,13 +807,12 @@ static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
int i, devad_cnt;
devad_cnt = sizeof(devad)/sizeof(int);
phydev = search_for_existing_phy(bus, phy_mask, interface);
phydev = search_for_existing_phy(bus, phy_mask);
if (phydev)
return phydev;
/* try different access clauses */
for (i = 0; i < devad_cnt; i++) {
phydev = create_phy_by_mask(bus, phy_mask,
devad[i], interface);
phydev = create_phy_by_mask(bus, phy_mask, devad[i]);
if (IS_ERR(phydev))
return NULL;
if (phydev)
@ -845,10 +840,9 @@ static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
* Description: Reads the ID registers of the PHY at @addr on the
* @bus, then allocates and returns the phy_device to represent it.
*/
static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
phy_interface_t interface)
static struct phy_device *get_phy_device(struct mii_dev *bus, int addr)
{
return get_phy_device_by_mask(bus, 1 << addr, interface);
return get_phy_device_by_mask(bus, 1 << addr);
}
int phy_reset(struct phy_device *phydev)
@ -862,7 +856,7 @@ int phy_reset(struct phy_device *phydev)
#ifdef CONFIG_PHYLIB_10G
/* If it's 10G, we need to issue reset through one of the MMDs */
if (is_10g_interface(phydev->interface)) {
if (phydev->is_c45) {
if (!phydev->mmds)
gen10g_discover_mmds(phydev);
@ -907,18 +901,12 @@ int miiphy_reset(const char *devname, unsigned char addr)
struct mii_dev *bus = miiphy_get_dev_by_name(devname);
struct phy_device *phydev;
/*
* miiphy_reset was only used on standard PHYs, so we'll fake it here.
* If later code tries to connect with the right interface, this will
* be corrected by get_phy_device in phy_connect()
*/
phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
phydev = get_phy_device(bus, addr);
return phy_reset(phydev);
}
struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
phy_interface_t interface)
struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask)
{
/* Reset the bus */
if (bus->reset) {
@ -928,13 +916,15 @@ struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
mdelay(15);
}
return get_phy_device_by_mask(bus, phy_mask, interface);
return get_phy_device_by_mask(bus, phy_mask);
}
#ifdef CONFIG_DM_ETH
void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
void phy_connect_dev(struct phy_device *phydev, struct udevice *dev,
phy_interface_t interface)
#else
void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev,
phy_interface_t interface)
#endif
{
/* Soft Reset the PHY */
@ -945,13 +935,14 @@ void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
phydev->dev->name, dev->name);
}
phydev->dev = dev;
debug("%s connected to %s\n", dev->name, phydev->drv->name);
phydev->interface = interface;
debug("%s connected to %s mode %s\n", dev->name, phydev->drv->name,
phy_string_for_interface(interface));
}
#ifdef CONFIG_PHY_XILINX_GMII2RGMII
static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
struct udevice *dev,
phy_interface_t interface)
struct udevice *dev)
{
struct phy_device *phydev = NULL;
ofnode node;
@ -960,8 +951,7 @@ static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0");
if (ofnode_valid(node)) {
phydev = phy_device_create(bus, 0,
PHY_GMII2RGMII_ID, false,
interface);
PHY_GMII2RGMII_ID, false);
if (phydev)
phydev->node = node;
break;
@ -985,41 +975,31 @@ static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
*/
struct phy_device *fixed_phy_create(ofnode node)
{
phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
struct phy_device *phydev;
const char *if_str;
ofnode subnode;
if_str = ofnode_read_string(node, "phy-mode");
if (!if_str) {
if_str = ofnode_read_string(node, "phy-interface-type");
}
if (if_str) {
interface = phy_get_interface_by_name(if_str);
}
subnode = ofnode_find_subnode(node, "fixed-link");
if (!ofnode_valid(subnode)) {
return NULL;
}
phydev = phy_device_create(NULL, 0, PHY_FIXED_ID, false, interface);
phydev = phy_device_create(NULL, 0, PHY_FIXED_ID, false);
if (phydev)
phydev->node = subnode;
phydev->interface = ofnode_read_phy_mode(node);
return phydev;
}
static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
struct udevice *dev,
phy_interface_t interface)
struct udevice *dev)
{
ofnode node = dev_ofnode(dev), subnode;
struct phy_device *phydev = NULL;
if (ofnode_phy_is_fixed_link(node, &subnode)) {
phydev = phy_device_create(bus, 0, PHY_FIXED_ID,
false, interface);
phydev = phy_device_create(bus, 0, PHY_FIXED_ID, false);
if (phydev)
phydev->node = subnode;
}
@ -1042,29 +1022,29 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr,
uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
#ifdef CONFIG_PHY_FIXED
phydev = phy_connect_fixed(bus, dev, interface);
phydev = phy_connect_fixed(bus, dev);
#endif
#ifdef CONFIG_PHY_NCSI
if (!phydev)
phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface);
phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false);
#endif
#ifdef CONFIG_PHY_ETHERNET_ID
if (!phydev)
phydev = phy_connect_phy_id(bus, dev, addr, interface);
phydev = phy_connect_phy_id(bus, dev, addr);
#endif
#ifdef CONFIG_PHY_XILINX_GMII2RGMII
if (!phydev)
phydev = phy_connect_gmii2rgmii(bus, dev, interface);
phydev = phy_connect_gmii2rgmii(bus, dev);
#endif
if (!phydev)
phydev = phy_find_by_mask(bus, mask, interface);
phydev = phy_find_by_mask(bus, mask);
if (phydev)
phy_connect_dev(phydev, dev);
phy_connect_dev(phydev, dev, interface);
else
printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
return phydev;
@ -1102,18 +1082,6 @@ int phy_shutdown(struct phy_device *phydev)
return 0;
}
int phy_get_interface_by_name(const char *str)
{
int i;
for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
if (!strcmp(str, phy_interface_strings[i]))
return i;
}
return -1;
}
/**
* phy_modify - Convenience function for modifying a given PHY register
* @phydev: the phy_device struct

View file

@ -26,6 +26,11 @@ static int xilinxgmiitorgmii_config(struct phy_device *phydev)
debug("%s\n", __func__);
if (phydev->interface != PHY_INTERFACE_MODE_GMII) {
printf("Incorrect interface type\n");
return -EINVAL;
}
if (!ofnode_valid(node))
return -EINVAL;
@ -37,13 +42,13 @@ static int xilinxgmiitorgmii_config(struct phy_device *phydev)
ext_phyaddr = ofnode_read_u32_default(phandle.node, "reg", -1);
ext_phydev = phy_find_by_mask(phydev->bus,
1 << ext_phyaddr,
PHY_INTERFACE_MODE_RGMII);
1 << ext_phyaddr);
if (!ext_phydev) {
printf("%s, No external phy device found\n", __func__);
return -EINVAL;
}
ext_phydev->interface = PHY_INTERFACE_MODE_RGMII;
ext_phydev->node = phandle.node;
phydev->priv = ext_phydev;
@ -114,11 +119,6 @@ static int xilinxgmiitorgmii_probe(struct phy_device *phydev)
{
debug("%s\n", __func__);
if (phydev->interface != PHY_INTERFACE_MODE_GMII) {
printf("Incorrect interface type\n");
return -EINVAL;
}
phydev->flags |= PHY_FLAG_BROKEN_RESET;
return 0;

View file

@ -534,7 +534,6 @@ static int pic32_eth_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
struct pic32eth_dev *priv = dev_get_priv(dev);
const char *phy_mode;
void __iomem *iobase;
fdt_addr_t addr;
fdt_size_t size;
@ -550,15 +549,9 @@ static int pic32_eth_probe(struct udevice *dev)
pdata->iobase = (phys_addr_t)addr;
/* get phy mode */
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
/* get phy addr */
offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),

View file

@ -1133,19 +1133,12 @@ static int qe_uec_remove(struct udevice *dev)
static int qe_uec_of_to_plat(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
pdata->iobase = (phys_addr_t)devfdt_get_addr(dev);
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
"phy-connection-type", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
return 0;
}

View file

@ -319,11 +319,11 @@ static int ravb_phy_config(struct udevice *dev)
mdelay(1);
}
phydev = phy_find_by_mask(eth->bus, mask, pdata->phy_interface);
phydev = phy_find_by_mask(eth->bus, mask);
if (!phydev)
return -ENODEV;
phy_connect_dev(phydev, dev);
phy_connect_dev(phydev, dev, pdata->phy_interface);
eth->phydev = phydev;
@ -674,20 +674,13 @@ static const struct eth_ops ravb_ops = {
int ravb_of_to_plat(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
const fdt32_t *cell;
int ret = 0;
pdata->iobase = dev_read_addr(dev);
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
pdata->max_speed = 1000;
cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL);
@ -696,7 +689,7 @@ int ravb_of_to_plat(struct udevice *dev)
sprintf(bb_miiphy_buses[0].name, dev->name);
return ret;
return 0;
}
static const struct udevice_id ravb_ids[] = {

View file

@ -762,11 +762,11 @@ static int sh_eth_phy_config(struct udevice *dev)
struct phy_device *phydev;
int mask = 0xffffffff;
phydev = phy_find_by_mask(priv->bus, mask, pdata->phy_interface);
phydev = phy_find_by_mask(priv->bus, mask);
if (!phydev)
return -ENODEV;
phy_connect_dev(phydev, dev);
phy_connect_dev(phydev, dev, pdata->phy_interface);
port_info->phydev = phydev;
phy_config(phydev);
@ -915,20 +915,13 @@ static const struct eth_ops sh_ether_ops = {
int sh_ether_of_to_plat(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
const char *phy_mode;
const fdt32_t *cell;
int ret = 0;
pdata->iobase = dev_read_addr(dev);
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
pdata->max_speed = 1000;
cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL);
@ -937,7 +930,7 @@ int sh_ether_of_to_plat(struct udevice *dev)
sprintf(bb_miiphy_buses[0].name, dev->name);
return ret;
return 0;
}
static const struct udevice_id sh_ether_ids[] = {

View file

@ -393,11 +393,11 @@ static int ave_phy_init(struct ave_private *priv, void *dev)
struct phy_device *phydev;
int mask = GENMASK(31, 0), ret;
phydev = phy_find_by_mask(priv->bus, mask, priv->phy_mode);
phydev = phy_find_by_mask(priv->bus, mask);
if (!phydev)
return -ENODEV;
phy_connect_dev(phydev, dev);
phy_connect_dev(phydev, dev, priv->phy_mode);
phydev->supported &= PHY_GBIT_FEATURES;
if (priv->max_speed) {
@ -738,7 +738,6 @@ static int ave_of_to_plat(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
struct ave_private *priv = dev_get_priv(dev);
struct ofnode_phandle_args args;
const char *phy_mode;
const u32 *valp;
int ret, nc, nr;
const char *name;
@ -748,15 +747,10 @@ static int ave_of_to_plat(struct udevice *dev)
return -EINVAL;
pdata->iobase = dev_read_addr(dev);
pdata->phy_interface = -1;
phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
dev_err(dev, "Invalid PHY interface '%s'\n", phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
pdata->max_speed = 0;
valp = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed",

View file

@ -1029,19 +1029,13 @@ static int netsec_of_to_plat(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
struct netsec_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args phandle_args;
const char *phy_mode;
pdata->iobase = dev_read_addr_index(dev, 0);
priv->eeprom_base = dev_read_addr_index(dev, 1) - EERPROM_MAP_OFFSET;
pdata->phy_interface = -1;
phy_mode = dev_read_prop(dev, "phy-mode", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
pr_err("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
if (!dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
&phandle_args))

View file

@ -383,8 +383,6 @@ static int sun8i_phy_init(struct emac_eth_dev *priv, void *dev)
if (!phydev)
return -ENODEV;
phy_connect_dev(phydev, dev);
priv->phydev = phydev;
phy_config(priv->phydev);
@ -795,7 +793,6 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev)
struct sun8i_eth_pdata *sun8i_pdata = dev_get_plat(dev);
struct eth_pdata *pdata = &sun8i_pdata->eth_pdata;
struct emac_eth_dev *priv = dev_get_priv(dev);
const char *phy_mode;
const fdt32_t *reg;
int node = dev_of_offset(dev);
int offset = 0;
@ -859,16 +856,10 @@ static int sun8i_emac_eth_of_to_plat(struct udevice *dev)
}
priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1);
phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
printf("phy interface%d\n", pdata->phy_interface);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
if (priv->variant == H3_EMAC) {
ret = sun8i_handle_internal_phy(dev, priv);

View file

@ -271,12 +271,11 @@ static int sunxi_emac_init_phy(struct emac_eth_dev *priv, void *dev)
if (ret)
return ret;
priv->phydev = phy_find_by_mask(priv->bus, mask,
PHY_INTERFACE_MODE_MII);
priv->phydev = phy_find_by_mask(priv->bus, mask);
if (!priv->phydev)
return -ENODEV;
phy_connect_dev(priv->phydev, dev);
phy_connect_dev(priv->phydev, dev, PHY_INTERFACE_MODE_MII);
phy_config(priv->phydev);
return 0;

View file

@ -602,21 +602,14 @@ static int am65_cpsw_ofdata_parse_phy(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args out_args;
const char *phy_mode;
int ret = 0;
dev_read_u32(dev, "reg", &priv->port_id);
phy_mode = dev_read_string(dev, "phy-mode");
if (phy_mode) {
pdata->phy_interface =
phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
dev_err(dev, "Invalid PHY mode '%s', port %u\n",
phy_mode, priv->port_id);
ret = -EINVAL;
goto out;
}
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA) {
dev_err(dev, "Invalid PHY mode, port %u\n", priv->port_id);
return -EINVAL;
}
dev_read_u32(dev, "max-speed", (u32 *)&pdata->max_speed);

View file

@ -1194,15 +1194,12 @@ static void cpsw_eth_of_parse_slave(struct cpsw_platform_data *data,
{
struct ofnode_phandle_args out_args;
struct cpsw_slave_data *slave_data;
const char *phy_mode;
u32 phy_id[2];
int ret;
slave_data = &data->slave_data[slave_index];
phy_mode = ofnode_read_string(subnode, "phy-mode");
if (phy_mode)
slave_data->phy_if = phy_get_interface_by_name(phy_mode);
slave_data->phy_if = ofnode_read_phy_mode(subnode);
ret = ofnode_parse_phandle_with_args(subnode, "phy-handle",
NULL, 0, 0, &out_args);
@ -1348,11 +1345,8 @@ static int cpsw_eth_of_to_plat(struct udevice *dev)
}
pdata->phy_interface = data->slave_data[data->active_slave].phy_if;
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__,
phy_string_for_interface(pdata->phy_interface));
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
return 0;
}

View file

@ -23,7 +23,6 @@
#include <asm/ti-common/keystone_net.h>
#include <asm/ti-common/keystone_serdes.h>
#include <asm/arch/psc_defs.h>
#include <linux/libfdt.h>
#include "cpsw_mdio.h"
@ -91,9 +90,9 @@ struct ks2_eth_priv {
struct mii_dev *mdio_bus;
int phy_addr;
phy_interface_t phy_if;
int phy_of_handle;
ofnode phy_ofnode;
int sgmii_link_type;
void *mdio_base;
phys_addr_t mdio_base;
struct rx_buff_desc net_rx_buffs;
struct pktdma_cfg *netcp_pktdma;
void *hd;
@ -570,7 +569,7 @@ static int ks2_eth_probe(struct udevice *dev)
* to re-use the same
*/
mdio_bus = cpsw_mdio_init("ethernet-mdio",
(u32)priv->mdio_base,
priv->mdio_base,
EMAC_MDIO_CLOCK_FREQ,
EMAC_MDIO_BUS_FREQ);
if (!mdio_bus) {
@ -593,8 +592,8 @@ static int ks2_eth_probe(struct udevice *dev)
priv->phydev = phy_connect(priv->mdio_bus, priv->phy_addr,
dev, priv->phy_if);
#ifdef CONFIG_DM_ETH
if (priv->phy_of_handle)
priv->phydev->node = offset_to_ofnode(priv->phy_of_handle);
if (ofnode_valid(priv->phy_ofnode))
priv->phydev->node = priv->phy_ofnode;
#endif
phy_config(priv->phydev);
}
@ -621,105 +620,88 @@ static const struct eth_ops ks2_eth_ops = {
.write_hwaddr = ks2_eth_write_hwaddr,
};
static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0)
static int ks2_bind_one_slave(struct udevice *dev, ofnode slave, ofnode *gbe_0)
{
const void *fdt = gd->fdt_blob;
struct udevice *sl_dev;
int interfaces;
int sec_slave;
int slave;
int ret;
char *slave_name;
u32 slave_no;
int ret;
interfaces = fdt_subnode_offset(fdt, gbe, "interfaces");
fdt_for_each_subnode(slave, fdt, interfaces) {
int slave_no;
if (ofnode_read_u32(slave, "slave-port", &slave_no))
return 0;
slave_no = fdtdec_get_int(fdt, slave, "slave-port", -ENOENT);
if (slave_no == -ENOENT)
continue;
if (slave_no == 0) {
/* This is the current eth device */
*gbe_0 = slave;
} else {
/* Slave devices to be registered */
slave_name = malloc(20);
snprintf(slave_name, 20, "netcp@slave-%d", slave_no);
ret = device_bind_driver_to_node(dev, "eth_ks2_sl",
slave_name, offset_to_ofnode(slave),
&sl_dev);
if (ret) {
pr_err("ks2_net - not able to bind slave interfaces\n");
return ret;
}
}
if (gbe_0 && slave_no == 0) {
/* This is the current eth device */
*gbe_0 = slave;
return 0;
}
sec_slave = fdt_subnode_offset(fdt, gbe, "secondary-slave-ports");
fdt_for_each_subnode(slave, fdt, sec_slave) {
int slave_no;
/* Slave devices to be registered */
slave_name = malloc(20);
snprintf(slave_name, 20, "netcp@slave-%d", slave_no);
ret = device_bind_driver_to_node(dev, "eth_ks2_sl", slave_name, slave,
NULL);
if (ret)
pr_err("ks2_net - not able to bind slave interfaces\n");
slave_no = fdtdec_get_int(fdt, slave, "slave-port", -ENOENT);
if (slave_no == -ENOENT)
continue;
return ret;
}
/* Slave devices to be registered */
slave_name = malloc(20);
snprintf(slave_name, 20, "netcp@slave-%d", slave_no);
ret = device_bind_driver_to_node(dev, "eth_ks2_sl", slave_name,
offset_to_ofnode(slave), &sl_dev);
if (ret) {
pr_err("ks2_net - not able to bind slave interfaces\n");
static int ks2_eth_bind_slaves(struct udevice *dev, ofnode gbe, ofnode *gbe_0)
{
ofnode interfaces, sec_slave, slave;
int ret;
interfaces = ofnode_find_subnode(gbe, "interfaces");
ofnode_for_each_subnode(slave, interfaces) {
ret = ks2_bind_one_slave(dev, slave, gbe_0);
if (ret)
return ret;
}
sec_slave = ofnode_find_subnode(gbe, "secondary-slave-ports");
ofnode_for_each_subnode(slave, sec_slave) {
ret = ks2_bind_one_slave(dev, slave, NULL);
if (ret)
return ret;
}
}
return 0;
}
static int ks2_eth_parse_slave_interface(int netcp, int slave,
static int ks2_eth_parse_slave_interface(ofnode netcp, ofnode slave,
struct ks2_eth_priv *priv,
struct eth_pdata *pdata)
{
const void *fdt = gd->fdt_blob;
int mdio;
int phy;
struct ofnode_phandle_args dma_args;
ofnode phy, mdio;
int dma_count;
u32 dma_channel[8];
const char *phy_mode;
priv->slave_port = fdtdec_get_int(fdt, slave, "slave-port", -1);
priv->slave_port = ofnode_read_s32_default(slave, "slave-port", -1);
priv->net_rx_buffs.rx_flow = priv->slave_port * 8;
/* U-Boot slave port number starts with 1 instead of 0 */
priv->slave_port += 1;
dma_count = fdtdec_get_int_array_count(fdt, netcp,
"ti,navigator-dmas",
dma_channel, 8);
dma_count = ofnode_count_phandle_with_args(netcp, "ti,navigator-dmas",
NULL, 1);
if (priv->slave_port < dma_count &&
!ofnode_parse_phandle_with_args(netcp, "ti,navigator-dmas", NULL, 1,
priv->slave_port - 1, &dma_args))
priv->net_rx_buffs.rx_flow = dma_args.args[0];
if (dma_count > (2 * priv->slave_port)) {
int dma_idx;
priv->link_type = ofnode_read_s32_default(slave, "link-interface", -1);
dma_idx = priv->slave_port * 2 - 1;
priv->net_rx_buffs.rx_flow = dma_channel[dma_idx];
}
phy = ofnode_get_phy_node(slave);
priv->phy_ofnode = phy;
if (ofnode_valid(phy)) {
priv->phy_addr = ofnode_read_s32_default(phy, "reg", -1);
priv->link_type = fdtdec_get_int(fdt, slave, "link-interface", -1);
phy = fdtdec_lookup_phandle(fdt, slave, "phy-handle");
if (phy >= 0) {
priv->phy_of_handle = phy;
priv->phy_addr = fdtdec_get_int(fdt, phy, "reg", -1);
mdio = fdt_parent_offset(fdt, phy);
if (mdio < 0) {
mdio = ofnode_get_parent(phy);
if (!ofnode_valid(mdio)) {
pr_err("mdio dt not found\n");
return -ENODEV;
}
priv->mdio_base = (void *)fdtdec_get_addr(fdt, mdio, "reg");
priv->mdio_base = ofnode_get_addr(mdio);
}
if (priv->link_type == LINK_TYPE_SGMII_MAC_TO_PHY_MODE) {
@ -728,20 +710,19 @@ static int ks2_eth_parse_slave_interface(int netcp, int slave,
priv->sgmii_link_type = SGMII_LINK_MAC_PHY;
priv->has_mdio = true;
} else if (priv->link_type == LINK_TYPE_RGMII_LINK_MAC_PHY) {
phy_mode = fdt_getprop(fdt, slave, "phy-mode", NULL);
if (phy_mode) {
priv->phy_if = phy_get_interface_by_name(phy_mode);
if (priv->phy_if != PHY_INTERFACE_MODE_RGMII &&
priv->phy_if != PHY_INTERFACE_MODE_RGMII_ID &&
priv->phy_if != PHY_INTERFACE_MODE_RGMII_RXID &&
priv->phy_if != PHY_INTERFACE_MODE_RGMII_TXID) {
pr_err("invalid phy-mode\n");
return -EINVAL;
}
} else {
priv->phy_if = ofnode_read_phy_mode(slave);
if (priv->phy_if == PHY_INTERFACE_MODE_NA)
priv->phy_if = PHY_INTERFACE_MODE_RGMII;
}
pdata->phy_interface = priv->phy_if;
if (priv->phy_if != PHY_INTERFACE_MODE_RGMII &&
priv->phy_if != PHY_INTERFACE_MODE_RGMII_ID &&
priv->phy_if != PHY_INTERFACE_MODE_RGMII_RXID &&
priv->phy_if != PHY_INTERFACE_MODE_RGMII_TXID) {
pr_err("invalid phy-mode\n");
return -EINVAL;
}
priv->has_mdio = true;
}
@ -750,23 +731,19 @@ static int ks2_eth_parse_slave_interface(int netcp, int slave,
static int ks2_sl_eth_of_to_plat(struct udevice *dev)
{
ofnode slave, interfaces, gbe, netcp_devices, netcp;
struct ks2_eth_priv *priv = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
int slave = dev_of_offset(dev);
int interfaces;
int gbe;
int netcp_devices;
int netcp;
interfaces = fdt_parent_offset(fdt, slave);
gbe = fdt_parent_offset(fdt, interfaces);
netcp_devices = fdt_parent_offset(fdt, gbe);
netcp = fdt_parent_offset(fdt, netcp_devices);
slave = dev_ofnode(dev);
interfaces = ofnode_get_parent(slave);
gbe = ofnode_get_parent(interfaces);
netcp_devices = ofnode_get_parent(gbe);
netcp = ofnode_get_parent(netcp_devices);
ks2_eth_parse_slave_interface(netcp, slave, priv, pdata);
pdata->iobase = fdtdec_get_addr(fdt, netcp, "reg");
pdata->iobase = ofnode_get_addr(netcp);
return 0;
}
@ -775,18 +752,15 @@ static int ks2_eth_of_to_plat(struct udevice *dev)
{
struct ks2_eth_priv *priv = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_plat(dev);
const void *fdt = gd->fdt_blob;
int gbe_0 = -ENODEV;
int netcp_devices;
int gbe;
ofnode netcp_devices, gbe, gbe_0;
netcp_devices = fdt_subnode_offset(fdt, dev_of_offset(dev),
"netcp-devices");
gbe = fdt_subnode_offset(fdt, netcp_devices, "gbe");
netcp_devices = dev_read_subnode(dev, "netcp-devices");
gbe = ofnode_find_subnode(netcp_devices, "gbe");
gbe_0 = ofnode_null();
ks2_eth_bind_slaves(dev, gbe, &gbe_0);
ks2_eth_parse_slave_interface(dev_of_offset(dev), gbe_0, priv, pdata);
ks2_eth_parse_slave_interface(dev_ofnode(dev), gbe_0, priv, pdata);
pdata->iobase = dev_read_addr(dev);

View file

@ -834,7 +834,6 @@ int tsec_probe(struct udevice *dev)
struct ofnode_phandle_args phandle_args;
u32 tbiaddr = CONFIG_SYS_TBIPA_VALUE;
struct tsec_data *data;
const char *phy_mode;
ofnode parent, child;
fdt_addr_t reg;
u32 max_speed;
@ -894,12 +893,8 @@ int tsec_probe(struct udevice *dev)
priv->tbiaddr = tbiaddr;
phy_mode = dev_read_prop(dev, "phy-connection-type", NULL);
if (!phy_mode)
phy_mode = dev_read_prop(dev, "phy-mode", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1)
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
pdata->phy_interface = tsec_get_interface(priv);
priv->interface = pdata->phy_interface;

View file

@ -821,7 +821,6 @@ static int axi_emac_of_to_plat(struct udevice *dev)
struct eth_pdata *pdata = &plat->eth_pdata;
int node = dev_of_offset(dev);
int offset = 0;
const char *phy_mode;
pdata->iobase = dev_read_addr(dev);
plat->mactype = dev_get_driver_data(dev);
@ -850,14 +849,9 @@ static int axi_emac_of_to_plat(struct udevice *dev)
plat->phy_of_handle = offset;
}
phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
printf("%s: Invalid PHY interface '%s'\n", __func__,
phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
plat->eth_hasnobuf = fdtdec_get_bool(gd->fdt_blob, node,
"xlnx,eth-hasnobuf");

View file

@ -889,7 +889,6 @@ static int zynq_gem_of_to_plat(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
struct zynq_gem_priv *priv = dev_get_priv(dev);
struct ofnode_phandle_args phandle_args;
const char *phy_mode;
pdata->iobase = (phys_addr_t)dev_read_addr(dev);
priv->iobase = (struct zynq_gem_regs *)pdata->iobase;
@ -923,13 +922,9 @@ static int zynq_gem_of_to_plat(struct udevice *dev)
}
}
phy_mode = dev_read_prop(dev, "phy-mode", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
if (pdata->phy_interface == -1) {
debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
pdata->phy_interface = dev_read_phy_mode(dev);
if (pdata->phy_interface == PHY_INTERFACE_MODE_NA)
return -EINVAL;
}
priv->interface = pdata->phy_interface;
priv->int_pcs = dev_read_bool(dev, "is-internal-pcspma");

View file

@ -77,8 +77,7 @@
EXPORT_FUNC(mdio_get_current_dev, struct mii_dev *,
mdio_get_current_dev, void)
EXPORT_FUNC(phy_find_by_mask, struct phy_device *, phy_find_by_mask,
struct mii_dev *bus, unsigned phy_mask,
phy_interface_t interface)
struct mii_dev *bus, unsigned phy_mask)
EXPORT_FUNC(mdio_phydev_for_ethname, struct phy_device *,
mdio_phydev_for_ethname, const char *ethname)
EXPORT_FUNC(miiphy_set_current_dev, int, miiphy_set_current_dev,

View file

@ -25,7 +25,6 @@
# undef CONFIG_LBA48
#endif
#define CONFIG_DRIVER_DM9000
#ifdef CONFIG_DRIVER_DM9000
# define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300)
# define DM9000_IO CONFIG_DM9000_BASE

View file

@ -44,7 +44,6 @@
#endif
/* Ethernet */
#define CONFIG_DRIVER_DM9000
#define CONFIG_DM9000_BASE 0x30000000
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE + 4)

View file

@ -24,7 +24,6 @@
#define CONFIG_SYS_NS16550_CLK 48000000
/* Ethernet: davicom DM9000 */
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0xb6000000
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE + 2)

View file

@ -43,7 +43,6 @@
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x08000000
#define DM9000_IO (CONFIG_DM9000_BASE)
#define DM9000_DATA (CONFIG_DM9000_BASE + 4)

View file

@ -35,7 +35,6 @@
/* Hardware drivers */
/* DM9000 */
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x2c000000
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)

View file

@ -12,6 +12,7 @@
#include <dm/of.h>
#include <dm/of_access.h>
#include <log.h>
#include <phy_interface.h>
/* Enable checks to protect against invalid calls */
#undef OF_CHECKS
@ -1217,4 +1218,30 @@ int ofnode_conf_read_int(const char *prop_name, int default_val);
*/
const char *ofnode_conf_read_str(const char *prop_name);
/**
* ofnode_get_phy_node() - Get PHY node for a MAC (if not fixed-link)
*
* This function parses PHY handle from the Ethernet controller's ofnode
* (trying all possible PHY handle property names), and returns the PHY ofnode.
*
* Before this is used, ofnode_phy_is_fixed_link() should be checked first, and
* if the result to that is true, this function should not be called.
*
* @eth_node: ofnode belonging to the Ethernet controller
* Return: ofnode of the PHY, if it exists, otherwise an invalid ofnode
*/
ofnode ofnode_get_phy_node(ofnode eth_node);
/**
* ofnode_read_phy_mode() - Read PHY connection type from a MAC node
*
* This function parses the "phy-mode" / "phy-connection-type" property and
* returns the corresponding PHY interface type.
*
* @mac_node: ofnode containing the property
* Return: one of PHY_INTERFACE_MODE_* constants, PHY_INTERFACE_MODE_NA on
* error
*/
phy_interface_t ofnode_read_phy_mode(ofnode mac_node);
#endif

View file

@ -743,6 +743,32 @@ int dev_read_pci_bus_range(const struct udevice *dev, struct resource *res);
int dev_decode_display_timing(const struct udevice *dev, int index,
struct display_timing *config);
/**
* dev_get_phy_node() - Get PHY node for a MAC (if not fixed-link)
*
* This function parses PHY handle from the Ethernet controller's ofnode
* (trying all possible PHY handle property names), and returns the PHY ofnode.
*
* Before this is used, ofnode_phy_is_fixed_link() should be checked first, and
* if the result to that is true, this function should not be called.
*
* @dev: device representing the MAC
* Return: ofnode of the PHY, if it exists, otherwise an invalid ofnode
*/
ofnode dev_get_phy_node(const struct udevice *dev);
/**
* dev_read_phy_mode() - Read PHY connection type from a MAC
*
* This function parses the "phy-mode" / "phy-connection-type" property and
* returns the corresponding PHY interface type.
*
* @dev: device representing the MAC
* Return: one of PHY_INTERFACE_MODE_* constants, PHY_INTERFACE_MODE_NA on
* error
*/
phy_interface_t dev_read_phy_mode(const struct udevice *dev);
#else /* CONFIG_DM_DEV_READ_INLINE is enabled */
#include <asm/global_data.h>
@ -1092,6 +1118,16 @@ static inline int dev_decode_display_timing(const struct udevice *dev,
return ofnode_decode_display_timing(dev_ofnode(dev), index, config);
}
static inline ofnode dev_get_phy_node(const struct udevice *dev)
{
return ofnode_get_phy_node(dev_ofnode(dev));
}
static inline phy_interface_t dev_read_phy_mode(const struct udevice *dev)
{
return ofnode_read_phy_mode(dev_ofnode(dev));
}
#endif /* CONFIG_DM_DEV_READ_INLINE */
/**

View file

@ -1,16 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* NOTE: DAVICOM DM9000 ethernet driver interface
*
* Authors: Remy Bohmer <linux@bohmer.net>
*/
#ifndef __DM9000_H__
#define __DM9000_H__
/****************** function prototypes **********************/
#if !defined(CONFIG_DM9000_NO_SROM)
void dm9000_write_srom_word(int offset, u16 val);
void dm9000_read_srom_word(int offset, u8 *to);
#endif
#endif /* __DM9000_H__ */

View file

@ -55,8 +55,7 @@ int i2c_read (uchar, uint, int , uchar* , int);
#endif
#ifdef CONFIG_PHY_AQUANTIA
struct mii_dev *mdio_get_current_dev(void);
struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
phy_interface_t interface);
struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask);
struct phy_device *mdio_phydev_for_ethname(const char *ethname);
int miiphy_set_current_dev(const char *devname);
#endif

View file

@ -72,7 +72,7 @@ enum fm_eth_type {
#define FM_ETH_INFO_INITIALIZER(idx, pregs) \
.fm = idx, \
.phy_regs = (void *)pregs, \
.enet_if = PHY_INTERFACE_MODE_NONE, \
.enet_if = PHY_INTERFACE_MODE_NA, \
#ifdef CONFIG_SYS_FMAN_V3
#define FM_DTSEC_INFO_INITIALIZER(idx, n) \

View file

@ -157,6 +157,37 @@ struct mdio_ops {
*/
void dm_mdio_probe_devices(void);
/**
* dm_mdio_read - Wrapper over .read() operation for DM MDIO
*
* @mdiodev: mdio device
* @addr: PHY address on MDIO bus
* @devad: device address on PHY if C45; should be MDIO_DEVAD_NONE if C22
* @reg: register address
* Return: register value if non-negative, -error code otherwise
*/
int dm_mdio_read(struct udevice *mdio_dev, int addr, int devad, int reg);
/**
* dm_mdio_write - Wrapper over .write() operation for DM MDIO
*
* @mdiodev: mdio device
* @addr: PHY address on MDIO bus
* @devad: device address on PHY if C45; should be MDIO_DEVAD_NONE if C22
* @reg: register address
* @val: value to write
* Return: 0 on success, -error code otherwise
*/
int dm_mdio_write(struct udevice *mdio_dev, int addr, int devad, int reg, u16 val);
/**
* dm_mdio_reset - Wrapper over .reset() operation for DM MDIO
*
* @mdiodev: mdio device
* Return: 0 on success, -error code otherwise
*/
int dm_mdio_reset(struct udevice *mdio_dev);
/**
* dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO
*

View file

@ -359,18 +359,6 @@ static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
#ifdef CONFIG_PHYLIB_10G
extern struct phy_driver gen10g_driver;
/*
* List all 10G interfaces here, the assumption being that PHYs on these
* interfaces are C45
*/
static inline int is_10g_interface(phy_interface_t interface)
{
return interface == PHY_INTERFACE_MODE_XGMII ||
interface == PHY_INTERFACE_MODE_USXGMII ||
interface == PHY_INTERFACE_MODE_10GBASER;
}
#endif
/**
@ -400,11 +388,9 @@ int phy_reset(struct phy_device *phydev);
*
* @bus: MII/MDIO bus to scan
* @phy_mask: bitmap of PYH addresses to scan
* @interface: type of MAC-PHY interface
* @return: pointer to phy_device if a PHY is found, or NULL otherwise
*/
struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
phy_interface_t interface);
struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask);
#ifdef CONFIG_PHY_FIXED
@ -433,8 +419,10 @@ static inline struct phy_device *fixed_phy_create(ofnode node)
* phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
* @phydev: PHY device
* @dev: Ethernet device
* @interface: type of MAC-PHY interface
*/
void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
void phy_connect_dev(struct phy_device *phydev, struct udevice *dev,
phy_interface_t interface);
/**
* phy_connect() - Creates a PHY device for the Ethernet interface
@ -461,12 +449,10 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr,
* @addr: PHY address on MDIO bus
* @phy_id: where to store the ID retrieved
* @is_c45: Device Identifiers if is_c45
* @interface: interface between the MAC and PHY
* @return: pointer to phy_device if a PHY is found, or NULL otherwise
*/
struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
u32 phy_id, bool is_c45,
phy_interface_t interface);
u32 phy_id, bool is_c45);
/**
* phy_connect_phy_id() - Connect to phy device by reading PHY id
@ -474,12 +460,11 @@ struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
*
* @bus: MII/MDIO bus that hosts the PHY
* @dev: Ethernet device to associate to the PHY
* @interface: Interface between the MAC and PHY
* @return: pointer to phy_device if a PHY is found,
* or NULL otherwise
*/
struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
int phyaddr, phy_interface_t interface);
int phyaddr);
static inline ofnode phy_get_ofnode(struct phy_device *phydev)
{
@ -494,8 +479,10 @@ static inline ofnode phy_get_ofnode(struct phy_device *phydev)
* phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
* @phydev: PHY device
* @dev: Ethernet device
* @interface: type of MAC-PHY interface
*/
void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev,
phy_interface_t interface);
/**
* phy_connect() - Creates a PHY device for the Ethernet interface
@ -542,6 +529,7 @@ int gen10g_discover_mmds(struct phy_device *phydev);
int phy_b53_init(void);
int phy_mv88e61xx_init(void);
int phy_adin_init(void);
int phy_aquantia_init(void);
int phy_atheros_init(void);
int phy_broadcom_init(void);
@ -571,14 +559,6 @@ int phy_xilinx_gmii2rgmii_init(void);
int board_phy_config(struct phy_device *phydev);
int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
/**
* phy_get_interface_by_name() - Look up a PHY interface name
*
* @str: PHY interface name, e.g. "mii"
* @return: PHY_INTERFACE_MODE_... value, or -1 if not found
*/
int phy_get_interface_by_name(const char *str);
/**
* phy_interface_is_rgmii - Convenience function for testing if a PHY interface
* is RGMII (all variants)

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