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ARM: imx: imx8mn-*-evk: use DM settings for PHY configuration
With the correct settings described in the device-tree the PHY settings in the board init are no longer required. The values are taken from the linux device tree. The PHY latency settings are derived from the phy-mode property and the voltage seetings are done via the regulator. Suggested-by: Michael Walle <michael@walle.cc> Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com> Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK Reviewed-by: Fabio Estevam <festevam@gmail.com>
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parent
9eb5e7d9ab
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775011980b
2 changed files with 6 additions and 16 deletions
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@ -64,6 +64,12 @@
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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vddio-supply = <&vddio>;
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vddio: vddio-regulator {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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};
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};
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@ -27,22 +27,6 @@ static void setup_fec(void)
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clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
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}
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int board_phy_config(struct phy_device *phydev)
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{
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/* enable rgmii rxc skew and phy mode select to RGMII copper */
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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return 0;
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}
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int board_init(void)
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{
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setup_fec();
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