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arm64: zynqmp: Add 'silabs, skip-recall' to all si570 clk nodes

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Without 'silabs,skip-recall' property, the driver on System Controller
re-calibrates the output clock frequency at probe() time based on the NVRAM
setting.  This re-calibration causes a glitch on the output clock.  At
power-on, Versal is also booting and expecting a glitch-free clock for
its correct operation.  System Controller should skip the re-calibration
step to prevent any clock instability for Versal.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bbb2322c94503f0e6b369c60312b7546500fad95.1706170068.git.michal.simek@amd.com
This commit is contained in:
Saeed Nowshadi 2024-01-25 09:07:58 +01:00 committed by Michal Simek
parent 98f7bf5da4
commit cbd87dae91
1 changed files with 5 additions and 0 deletions
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5
arch/arm/dts/zynqmp-e-a2197-00-revA.dts
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@ -449,6 +449,7 @@
factory-fout = <156250000>;
clock-frequency = <156250000>;
clock-output-names = "si570_zsfp_clk";
silabs,skip-recall;
};
};
i2c@6 { /* USER_SI570_1 */
@ -463,6 +464,7 @@
factory-fout = <100000000>;
clock-frequency = <100000000>;
clock-output-names = "si570_user1";
silabs,skip-recall;
};
};
@ -560,6 +562,7 @@
factory-fout = <200000000>;
clock-frequency = <200000000>;
clock-output-names = "si570_lpddr4_clk2";
silabs,skip-recall;
};
};
i2c@5 { /* LPDDR4_SI570_CLK1 */
@ -574,6 +577,7 @@
factory-fout = <200000000>;
clock-frequency = <200000000>;
clock-output-names = "si570_lpddr4_clk1";
silabs,skip-recall;
};
};
i2c@6 { /* HSDP_SI570 */
@ -588,6 +592,7 @@
factory-fout = <156250000>;
clock-frequency = <156250000>;
clock-output-names = "si570_hsdp_clk";
silabs,skip-recall;
};
};
i2c@7 { /* 8A34001 - U219B and J310 connector */