Commit graph

136 commits

Author SHA1 Message Date
Stefan Roese
e02d449644 ppc4xx: Cleanup of PVR detection code in cpu.c
This patch cleans the PVR detection code in check_cpu() up a bit.
Basically the strings are better seperated, resulting in an easier
to understand and maintain code version.

The #ifdef's couldn't be removed easily because of two reasons:

- Some SoC revisions have the same PVR, so need a way to differentiate
  between those two SoC's.
- In some case statements registers only available in this SoC variant
  are referenced.

Instead I moved the CONFIG_440 #ifdef a bit, so that 405 platforms don't
add this 440 detection code and vice versa. Resulting in this U-Boot
image size change:

405EX (Kilauea):     408 bytes less
440EPx (Sequoia):    604 bytes less
460EX (Canyonlands): 564 bytes less

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2010-09-23 09:02:06 +02:00
Stefan Roese
24956642ef Remove unused CONFIG_SERIAL_SOFTWARE_FIFO feature
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO
feature from U-Boot. It has only been implemented for PPC4xx and was not
used at all. So let's remove it and make the code smaller and cleaner.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
550650ddd0 ppc4xx: Use common NS16550 driver for PPC4xx UART
This patch removes the PPC4xx UART driver. Instead the common NS16550
driver is used, since all PPC4xx SoC's use this peripheral device.

The file 4xx_uart.c now only implements the UART clock calculation
function which also sets the SoC internal UART divisors.

All PPC4xx board config headers are changed to use this common NS16550
driver now.

Tested on these boards:
acadia, canyonlands, katmai, kilauea, sequoia, zeus

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
afabb498b7 ppc4xx: Big header cleanup part 2, mostly PPC405 related
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.

As a part from this cleanup, the GPIO definitions for PPC405EP are
corrected. The high and low parts of the registers (for example
CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in
the wrong order. This patch now fixes this issue by switching these
xxxH and xxxL values. This brings the GPIO 405EP port in sync with all
other PPC4xx ports.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
5e7abce991 ppc4xx: Big header cleanup, mostly PPC440 related
This patch starts a bit PPC4xx header cleanup. First patch mostly
touches PPC440 files. A later patch will touch the PPC405 files as well.

This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
0988776288 ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specific
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
b36df56115 ppc4xx: Move ppc4xx headers to powerpc include directory
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Timur Tabi
e69e520f9d fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo features
The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already
existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO).
So delete the 8610-specific code and use the built-in features instead.

Signed-off-by: Timur Tabi <timur@freescale.com>
2010-09-21 22:46:02 +02:00
Heiko Schocher
3fbeeea633 common: move TOTAL_MALLOC_LEN to include/common.h
Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:52 +02:00
Wolfgang Denk
ea882baf9c New implementation for internal handling of environment variables.
Motivation:

* Old environment code used a pessimizing implementation:
  - variable lookup used linear search => slow
  - changed/added variables were added at the end, i. e. most
    frequently used variables had the slowest access times => slow
  - each setenv() would calculate the CRC32 checksum over the whole
    environment block => slow
* "redundant" envrionment was locked down to two copies
* No easy way to implement features like "reset to factory defaults",
  or to select one out of several pre-defined (previously saved) sets
  of environment settings ("profiles")
* No easy way to import or export environment settings

======================================================================

API Changes:

- Variable names starting with '#' are no longer allowed

  I didn't find any such variable names being used; it is highly
  recommended to follow standard conventions and start variable names
  with an alphanumeric character

- "printenv" will now print a backslash at the end of all but the last
  lines of a multi-line variable value.

  Multi-line variables have never been formally defined, allthough
  there is no reason not to use them. Now we define rules how to deal
  with them, allowing for import and export.

- Function forceenv() and the related code in saveenv() was removed.
  At the moment this is causing build problems for the only user of
  this code (schmoogie - which has no entry in MAINTAINERS); may be
  fixed later by implementing the "env set -f" feature.

Inconsistencies:

- "printenv" will '\\'-escape the '\n' in multi-line variables, while
  "printenv var" will not do that.

======================================================================

Advantages:

- "printenv" output much better readable (sorted)
- faster!
- extendable (additional variable properties can be added)
- new, powerful features like "factory reset" or easy switching
  between several different environment settings ("profiles")

Disadvantages:

- Image size grows by typically 5...7 KiB (might shrink a bit again on
  systems with redundant environment with a following patch series)

======================================================================

Implemented:

- env command with subcommands:

  - env print [arg ...]

    same as "printenv": print environment

  - env set [-f] name [arg ...]

    same as "setenv": set (and delete) environment variables

    ["-f" - force setting even for read-only variables - not
    implemented yet.]

  - end delete [-f] name

    not implemented yet

    ["-f" - force delete even for read-only variables]

  - env save

    same as "saveenv": save environment

  - env export [-t | -b | -c] addr [size]

    export internal representation (hash table) in formats usable for
    persistent storage or processing:

	-t:	export as text format; if size is given, data will be
		padded with '\0' bytes; if not, one terminating '\0'
		will be added (which is included in the "filesize"
		setting so you can for exmple copy this to flash and
		keep the termination).
	-b:	export as binary format (name=value pairs separated by
		'\0', list end marked by double "\0\0")
	-c:	export as checksum protected environment format as
		used for example by "saveenv" command
	addr:	memory address where environment gets stored
	size:	size of output buffer

	With "-c" and size is NOT given, then the export command will
	format the data as currently used for the persistent storage,
	i. e. it will use CONFIG_ENV_SECT_SIZE as output block size and
	prepend a valid CRC32 checksum and, in case of resundant
	environment, a "current" redundancy flag. If size is given, this
	value will be used instead of CONFIG_ENV_SECT_SIZE; again, CRC32
	checksum and redundancy flag will be inserted.

	With "-b" and "-t", always only the real data (including a
	terminating '\0' byte) will be written; here the optional size
	argument will be used to make sure not to overflow the user
	provided buffer; the command will abort if the size is not
	sufficient. Any remainign space will be '\0' padded.

        On successful return, the variable "filesize" will be set.
        Note that filesize includes the trailing/terminating '\0'
        byte(s).

        Usage szenario: create a text snapshot/backup of the current
	settings:

		=> env export -t 100000
		=> era ${backup_addr} +${filesize}
		=> cp.b 100000 ${backup_addr} ${filesize}

	Re-import this snapshot, deleting all other settings:

		=> env import -d -t ${backup_addr}

  - env import [-d] [-t | -b | -c] addr [size]

    import external format (text or binary) into hash table,
    optionally deleting existing values:

	-d:	delete existing environment before importing;
		otherwise overwrite / append to existion definitions
	-t:	assume text format; either "size" must be given or the
		text data must be '\0' terminated
	-b:	assume binary format ('\0' separated, "\0\0" terminated)
	-c:	assume checksum protected environment format
	addr:	memory address to read from
	size:	length of input data; if missing, proper '\0'
		termination is mandatory

  - env default -f

    reset default environment: drop all environment settings and load
    default environment

  - env ask name [message] [size]

    same as "askenv": ask for environment variable

  - env edit name

    same as "editenv": edit environment variable

  - env run

    same as "run": run commands in an environment variable

======================================================================

TODO:

- drop default env as implemented now; provide a text file based
  initialization instead (eventually using several text files to
  incrementally build it from common blocks) and a tool to convert it
  into a binary blob / object file.

- It would be nice if we could add wildcard support for environment
  variables; this is needed for variable name auto-completion,
  but it would also be nice to be able to say "printenv ip*" or
  "printenv *addr*"

- Some boards don't link any more due to the grown code size:
  DU405, canyonlands, sequoia, socrates.

	=> cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>,
	       Stefan Roese <sr@denx.de>,
	       Heiko Schocher <hs@denx.de>

- Dropping forceenv() causes build problems on schmoogie

	=> cc: Sergey Kubushyn <ksi@koi8.net>

- Build tested on PPC and ARM only; runtime tested with NOR and NAND
  flash only => needs testing!!

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>,
Cc: Stefan Roese <sr@denx.de>,
Cc: Heiko Schocher <hs@denx.de>
Cc: Sergey Kubushyn <ksi@koi8.net>
2010-09-19 19:29:48 +02:00
Wolfgang Denk
91a76751a0 Make getenv() work before relocation.
So far, getenv() would work before relocation is most cases, even
though it was not intended to be used that way.  When switching to a
hash table based implementation, this would break a number of boards.

For convenience, we make getenv() check if it's running before
relocation and, if so, use getenv_f() internally.

Note that this is limited to simple cases, as we use a small static
buffer (32 bytes) in the global data for this purpose.

For this reason, it is also not a good idea to convert all current
uses of getenv_f() into getenv() - some of the existing use cases need
to be able to deal with longer variable values, so getenv_f() is still
needed and recommended for use before relocation.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:48 +02:00
Wolfgang Denk
3611665044 Cleanup use of CONFIG_SYS_SRAM_BASE and CONFIG_SYS_SRAM_SIZE
Traditionally many boards used local definitions for SRAM base address
and size (like SRAM_BASE, SRAM_LEN and/or SRAM_SIZE), while the (now)
"official" names are CONFIG_SYS_SRAM_BASE and CONFIG_SYS_SRAM_SIZE.

The corresponding code in arch/powerpc/lib/board.c was board specific,
and has never actually been maintained well. Replace this by feature-
specific code and adapt the boards that actually use this.

NOTE: there is still a ton of boards using the old #defines, which
therefor contain incorrect values in bi_sramstart and bi_sramsize.

All respective board maintainers are requested to clean up their
respective configurations.  Thanks.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Josef Wagner <Wagner@Microsys.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:46 +02:00
Terry Lv
a80603598c Save environment data to mmc.
This patch is to save environment data to mmc card.
It uses interfaces defined in generic mmc.

Signed-off-by: Terry Lv <r65388@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2010-09-19 17:47:29 +02:00
Wolfgang Denk
40e74c852b bedbug_860.c, bedbug_603e.c: Fix return type to silence compile warnings.
commit 47e26b1b "cmd_usage(): simplify return code handling" caused
the following compile warnings:

bedbug_860.c: In function 'bedbug860_do_break':
bedbug_860.c:73: warning: 'return' with a value, in function returning void
bedbug_860.c:121: warning: 'return' with a value, in function returning void

Fix the return type.

Actually these files could need some cleanup - commands should
return proper error codes, and there are coding style issues.
=> To be fixed later.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-08 22:02:54 +02:00
Wolfgang Denk
c0026fc581 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-09-07 21:52:29 +02:00
Stefan Roese
f3cac53840 ppc4xx: Invalidate d-cache when used as init-ram
We need to invalidate the data cache after it has been used as init-ram.

This problem was detected on the lwmon5 update.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-03 11:14:26 +02:00
Stefan Roese
c1ab75c7d4 ppc4xx: Fix 440EPx bug in reconfigure_pll()
This patch fixes a bug in reconfigure_pll(), where the detection of
the current bootstrap option is wrong. The ICS bits where incorrectly
shifted. This bug was found on the lwmon5 board, which uses bootstrap
option H (I2C bootstrap EEPROM).

Additionally a bit of code was moved into the if statement, since its
only used after later on. No need to run this code all the time.

Also, a few empty lines are added to make the code better readable.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Rupjyoti Sarmah <rsarmah@amcc.com>
Cc: Victor Gallardo <vgallardo@appliedmicro.com>
2010-09-03 11:14:21 +02:00
York Sun
8d9207c792 Fix parameters to support RDIMM for P2020DS
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-31 11:23:04 -05:00
Matthew McClintock
b80d30546e mpx85xx/fdt: Add cpu-release-addr for all cores
We currently do not add a cpu-release-addr for core 0, this is needed
when we want to reset core 0 and later restart it from Linux

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 21:20:10 -05:00
Kumar Gala
ed062e0f6c powerpc/85xx: Rename Security Engine Job Queue to Job Ring to match docs
Official docs call it the Job Ring not Job Queue for the p4080 security
block.  Match the docs to reduce confusion.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:13 -05:00
Kim Phillips
680c613a5c powerpc/8xxx: share PIC defines among 85xx and 86xx
fixes breakeage introduced by commit
a37c36f4e7 "powerpc/8xxx: query
feature reporting register for num cores on unknown cpus"

Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:13 -05:00
Wolfgang Denk
b9d51fbb18 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-08-10 23:03:15 +02:00
Wolfgang Denk
fe8d63c8c7 Merge branch 'master' of git://git.denx.de/u-boot-marvell 2010-08-10 22:37:27 +02:00
Mike Frysinger
5700bb6352 miiphy: constify device name
The driver name does not need to be writable, so constify it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:29 -07:00
Heiko Schocher
48690d8024 net ppc: fix ethernet device names with spaces
since commit 1384f3bb8a ethernet names
with spaces drop a

Warning: eth device name has a space!

message. This patch fix it for:

- "FEC ETHERNET" devices found on
  mpc512x, mpc5xxx, mpc8xx and mpc8220 boards.
  renamed to "FEC".
- "SCC ETHERNET" devices found on
  mpc8xx, mpc82xx based boards. Renamed to "SCC".
- "HDLC ETHERNET" devices found on mpc8xx boards
  Renamed to "HDLC"
- "FCC ETHERNET" devices found on mpc8260 and mpc85xx based
  boards. Renamed to "FCC"

Tested on the kup4k board.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:28 -07:00
Stephan Linz
958e120643 fdt relocate: have more attention to use a bootmap or not
Platforms with flat device tree support can use a bootmap to relocate
the fdt_blob. This is not a must. That's why the relocation function
boot_relocate_fdt() should be use only if CONFIG_OF_LIBFDT was defined
together with CONFIG_SYS_BOOTMAPSZ (see common/cmd_bootm.c).

On MicroBlaze platforms there is no need to use a bootmap to relocate
a fdt blob. So we need a more precise focus on the compilation and usage
of boot_relocate_fdt().

In general it is valid to exclude the function boot_relocate_fdt() if
the bootmap size CONFIG_SYS_BOOTMAPSZ is not defined.

Signed-off-by: Stephan Linz <linz@li-pro.net>
2010-08-08 22:16:05 +02:00
Albert Aribaud
f2a37fcd9b ide: add configuration
CONFIG_IDE_SWAP_IO

This configuration option replaces a complex conditional
in cmd_ide.c with an explicit define to be added to SoC or
board configs.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-08-08 05:17:05 +05:30
Wolfgang Denk
cdb749778a Rename getenv_r() into getenv_f()
While running from flash, i. e. before relocation, we have only a
limited C runtime environment without writable data segment. In this
phase, some configurations (for example with environment in EEPROM)
must not use the normal getenv(), but a special function.  This
function had been called getenv_r(), with the idea that the "_r"
suffix would mean the same as in the _r_eentrant versions of some of
the C library functions (for example getdate vs. getdate_r, getgrent
vs. getgrent_r, etc.).

Unfortunately this was a misleading name, as in U-Boot the "_r"
generally means "running from RAM", i. e. _after_ relocation.

To avoid confusion, rename into getenv_f() [as "running from flash"]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-08-04 00:45:36 +02:00
Kim Phillips
a37c36f4e7 powerpc/8xxx: query feature reporting register for num cores on unknown cpus
doing so helps avant garde users, such as those using simulators that
allow users to configure the number of cores, so as to not have to
manually adjust u-boot sources.  h/w should also be reliably setting
FRR NCPU in the future.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-01 11:18:45 -05:00
york
5fb8a8a731 powerpc/8xxx: Improvement to DDR parameters
Changes for P2020DS DDR applies to other 8xxx platform

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:10 -05:00
york
9490ff4864 powerpc/8xxx: Enable DDR3 RDIMM support
Enabled registered DIMMs using data from SPD. RDIMMs have registers
which need to be configured before using. The register configuration
words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software
should read those RCWs and put into DDR controller before initialization.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:10 -05:00
york
7fd101c97b powerpc/8xxx: Enabled address hashing for 85xx
For 85xx silicon which supports address hashing, it can be activated by
hwconfig.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:09 -05:00
york
5800e7ab32 powerpc/8xxx: Enable quad-rank DIMMs.
Previous code presumes each DIMM has up to two rank (chip select). Newer
DDR controller supports up to four chip select on one DIMM.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:09 -05:00
york
076bff8f47 powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4
Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual
rank with 512MB each rank.

Also check dimm size and rank size for memory controller interleaving

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:09 -05:00
Kumar Gala
79e4e6480b powerpc/8xxx: Enabled hwconfig for memory interleaving
Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with
hwconfig parameters. The syntax is

    setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>"

The mode values for memory controller interleaving are
    cacheline
    page
    bank
    superbank

The mode values for bank interleaving are
    cs0_cs1
    cs2_cs3
    cs0_cs1_and_cs2_cs3
    cs0_cs1_cs2_cs3

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:08 -05:00
Kumar Gala
fd3c9befa8 powerpc/p4080: Add workaround for erratum CPU22
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:57 -05:00
Kumar Gala
61054ffa16 powerpc/p4080: Add workaround for errata SERDES8
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:57 -05:00
Kumar Gala
34a8258fea powerpc/p4080: Add support for initializing SERDES
Add support for initializing the SERDES blocks on CoreNet style QoriQ
devices and the p4080 specific SERDES tables to know which actual
componetns are enabled.

Additionally, split out the Frame Manger (FMAN) into its specific ethernet
ports instead of gross level of the full FMAN.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:57 -05:00
Kumar Gala
db977abfc8 powerpc/85xx: Add support to initialize LIODN registers and portals
On the new QorIQ/CoreNet based platforms we need to initialize the
"portals" as access into the Data Path subystem as well as Logical IO
Device Numbers (LIODN) that are used for the IOMMU (PAMU).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:56 -05:00
Kumar Gala
6aba33e939 powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platforms
The CoreNet style platforms can have a L3 cache that fronts the memory
controllers.  Enable that cache as well as add information into the
device tree about it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:56 -05:00
york
a3f18529ec powerpc/85xx: Move INIT_RAM_ADDR physical address to 36-bit space
If 36-bit physical address is used, move the INIT_RAM_ADDR to higher
address. This frees the low 4GB address space for better use.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:07:49 -05:00
Kumar Gala
ebd7cb0ba9 powerpc/fsl_fman: Add initial fman immap structures
Add basic structures for Frame Manager on P4080/P3041/P5020 devices

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 08:07:47 -05:00
Kumar Gala
9ab87d04a8 powerpc/85xx: Add additional p4080 platform related defines/structs
* Added PCIE4 address, offset, DEVDISR & LAW target ID
* Added new p4080 DDR registers and defines to immap
* Add missing corenet platform DEVDISR related defines
* Updated ccsr_gur to include LIODN registers
* Add RCWSR defines
* Added Basic qman, pme, bman immap structs
* Added SATA related offsets & addresses
* Added Frame Manager 1/2 offsets & addresses
* Renamed CONFIG_SYS_TSEC1_OFFSET to CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET
* Added various offsets and addresses that where missing

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 08:07:47 -05:00
Wolfgang Denk
47e26b1bf9 cmd_usage(): simplify return code handling
Lots of code use this construct:

	cmd_usage(cmdtp);
	return 1;

Change cmd_usage() let it return 1 - then we can replace all these
ocurrances by

	return cmd_usage(cmdtp);

This fixes a few places with incorrect return code handling, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-24 20:43:57 +02:00
Wolfgang Denk
9662317142 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-07-24 20:34:13 +02:00
Stefan Roese
be24ef6e8e ppc4xx: Add ECC status info to machine-check exception for IBM DDR2 core
Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:55:03 +02:00
Stefan Roese
58eb869ffc ppc4xx: Add "ecctest" command to test/simulate ECC errors
This patch adds the "ecctest" command to test and simulate ECC errors
(single bit and/or double bit) while running from SDRAM. Currently only
the IBM DDR2 controller is supported (405EX, 440SP(e), 460EX/GT).

This is done by copying and calling functions, modifying the SDRAM
controller operation mode, in internal SRAM/OCM.

For correctable ECC errors (single bit) only the status will be printed
since the DDR2 controller doesn't provide the faulting address:

=> ecctest 1000000 1
Using address 01000000 for 1 bit ECC error injection
ECC: Correctable error

Uncorrectable ECC errors (double bit) will also display the faulting
address:

=> ecctest 1000000 2
Using address 01000000 for 2 bit ECC error injection
ECC: Uncorrectable error at 0x0001000000

To enable this "ecctest" function you need to define CONFIG_CMD_ECCTEST
in the board config header.

Tested on katmai and t3corp.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:54:54 +02:00
Stefan Roese
b995d7cb2c ppc4xx: DDR/ECC: Use correct macros to clear error status
Use the correct macro instead of the hardcoded 0x4c to clear the ECC
status in the 440/460 DDR(2) error status register after ECC
initialization.

Also the non-440 parts (405EX(r) right now) and the IBM DDR PPC variants
(440GX) use a different registers to clear this error status. Use the
correct ones.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:54:28 +02:00
Stefan Roese
897d6abc50 ppc4xx: Only define DDR2 registers for the correct PowerPC variants
Make sure that some SDRAM/DDR2 registers are only defined for the PPC
variants really implementing those registers.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:54:22 +02:00
Stefan Roese
eab9800182 ppc4xx: Add CONFIG_DDR_RFDC_FIXED to allow board specific RFDC values
Using this define, a board can define an opimized RFDC value and use
the auto calibration code to "tune" the remaining DDR2 controller
calibration register.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:54:09 +02:00