Commit graph

8 commits

Author SHA1 Message Date
Sumit Garg
de8f42c93a dts: qcs404-evb: Add ethernet controller node
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
56443285f2 pinctrl-snapdragon: Get rid of custom drive-strength values
Use standard pinconf drive-strength values from Linux DT bindings rather
than ones based on custom u-boot header. These changes are in direction
to make u-boot DTs for Qcom SoCs to be compatible with standard Linux
DT bindings.

Also, add support for pinconf bias-pull-up.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
0d6def46e0 qcs404-evb: Enable msm_gpio driver support
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
0ddabb6830 arm: dts: qcom: Sync pinctrl DT nodes with Linux bindings
Currently for all Qcom SoCs/boards there are separate compatibles for
GPIO and pinctrl. But this is inconsistent with official (upstream) Linux
bindings which requires only a single compatible "qcom,<SoC name>-pinctrl"
and there is no such compatible property as "qcom,tlmm-<SoC name>".

So fix this inconsistency for Qcom SoCs in order to comply with upstream
DT bindings. This is done via removing compatibles from "msm_gpio" driver
and via binding to "msm_gpio" driver from pinctrl driver in case
"gpio-controller" property is specified for pinctrl node.

Suggested-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:46 -04:00
Sumit Garg
9c96a0c62a dts: qcs404-evb: Add PMIC GPIO controller node
PMIC GPIOs are special GPIOs which are accessible through SPMI bus. So
add corresponding DT nodes.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:46 -04:00
Sumit Garg
0c1eab6f75 dts: qcs404-evb: Add USB controller and PHY nodes
QCS404 SoC provides support for two USB controllers: one USB3 and the
other one being USB2. The USB3 controller supports further 2 PHY: one high
speed PHY and the other super speed PHY. The USB2 controller supports a
single high speed PHY. So add corresponding DT nodes.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:45 -04:00
Sumit Garg
21ed4563cb dts: qcs404-evb: Add reset controller node
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-08-26 10:55:45 -04:00
Sumit Garg
bf95d17809 board: qualcomm: Add support for QCS404 EVB
Add support for Qualcomm QCS404 SoC based evaluation board.

Features:
- Qualcomm Snapdragon QCS404 SoC
- 1GiB RAM
- 8GiB eMMC, uSD slot

U-boot is chain loaded by ABL in 64-bit mode as part of boot.img.
For detailed build and boot instructions, refer to
doc/board/qualcomm/qcs404.rst.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2022-07-25 13:02:04 -04:00