Commit graph

15931 commits

Author SHA1 Message Date
Mario Six
ddc935fc09 mpc83xx: Make distinct MPC8349EMDS_SDRAM board
The MPC8349EMDS config file contains config options to enable SDRAM
support. To keep this ability after the Kconfig migration, create a new
MPC8349EMDS_SDRAM board that enables the SDRAM support and remove the
SDRAM support from the original board.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-21 07:51:36 +02:00
Mario Six
10590363b5 powerpc: Add LSDMR config values
The LSDMR_* macros are used to configure the system bus on MPC83xx.

A few of the possible LSDMR_* macros were never defined in the
respective include files. This renders the SDRAM support on the
MPC8349EMDS unusable, because it uses these undefined macros.

To make the SDRAM option work, introduce these macros into the proper
config file.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
904c47fc7d mpc83xx: Make distinct caddy2 config
vme8349.h contains two separate boards: The vme8349 itself, and the
caddy2 board. The caddy2 board is chosen by setting certain config
variables. Create a proper config file for the caddy2 board to make
Kconfig migration easier.

Furthermore, simplify the vme8349 and caddy2 configs by keeping only the
options necessary for each board.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
16aaca214e mpc83xx: Make distinct MPC8313ERDB targets
MPC8313ERDB has the option of either enabling NOR or NAND boot in its
config file (by commenting out certain #ifdefs). To keep this ability
after migrating options to Kconfig, we introduce two MPC8313ERDB
configs: one for NOR, and one for NAND.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
009c87a2ab keymile: Make distinct kmeter1, and kmcoge5ne configs
The kmeter1, and kmcoge5ne boards also build from the same config
file with #ifdef logic.

Create a separate include config for each board with the #ifdef logic
resolved as needed.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
71c790097b keymile: Make distinct kmsupx5, tuge1, kmopti2, and kmtepr2 configs
The kmsupx5, tuge1, kmopti2, and kmtepr2 boards all build from the same
include config file with lots of #ifdef logic.

To ease Kconfig migration, create new config include files for these
boards, and resolve the #ifdef logic as needed.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
0e0674fcab keymile: Make distinct kmtegr1, kmvect1, suvd3 configs
The kmtegr1, kmvect1, and suvd3 boards all use the same config include
file with lots of #ifdefs in it.

The Kconfig migation will become easier if we get rid of these #ifdefs
first.

Hence, create distinct config include files for these boards, and unwind
the #ifdef logic in these config files to only include the options
necessary for each board.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
8439e99ddb mpc83xx: Introduce ARCH_MPC837X
Replace CONFIG_MPC837x with a proper CONFIG_ARCH_MPC837X Kconfig option.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
61abced70f mpc83xx: Introduce ARCH_MPC836*
Replace CONFIG_MPC836* with proper CONFIG_ARCH_MPC836* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
d5cfa4aa5d mpc83xx: Introduce ARCH_MPC834*
Replace CONFIG_MPC834* with proper CONFIG_ARCH_MPC834* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
bd3b867eb9 mpc83xx: Introduce ARCH_MPC832*
Replace CONFIG_MPC832* with proper CONFIG_ARCH_MPC832* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
9403fc41c7 mpc83xx: Introduce ARCH_MPC831*
Replace CONFIG_MPC833* with proper CONFIG_ARCH_MPC833* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Mario Six
4bc97a3b81 mpc83xx: Introduce ARCH_MPC830*
Replace CONFIG_MPC830* with proper CONFIG_ARCH_MPC830* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-05-20 13:50:34 +02:00
Tom Rini
e14d9ca491 Merge git://git.denx.de/u-boot-x86
- Allow coreboot to process unhandled tags
- Enable NVMe on QEMU x86_64 target
2019-05-19 09:42:19 -04:00
Christian Gmeiner
b52e9f0cb7 x86: coreboot: make it possible to process unhandled tags
coreboot makes it possible to add own entries into coreboot's
table at a per mainboard basis. As there might be some custom
ones it makes sense to provide a way to process them.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-19 16:17:33 +08:00
Fabien Parent
47f30aaa36 ARM: mediatek: mt8516: use PSCI to reset the SoC
Instead of using the watchdog, let's use PSCI to perform the reset
of the SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-05-18 12:32:00 -04:00
Philippe Reynes
ea1e9c04fd dt: bcm63158: watchdog should use a 50Mhz clock
The watchdog should use a clock at 50 Mhz, so
instead of using the clock osc (200 Mhz), we
define a reference clock at 50Mhz and use it
for both watchdog.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-05-18 12:31:59 -04:00
Philippe Reynes
a328ada441 dt: bcm6858: watchdog should use a 50Mhz clock
The watchdog should use a clock at 50 Mhz, so
instead of using the clock osc (200 Mhz), we
define a reference clock at 50Mhz and use it
for both watchdog.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2019-05-18 12:31:59 -04:00
Trevor Woerner
1001502545 CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.

Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18 08:15:35 -04:00
Trevor Woerner
a0aba8a2eb CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
parameters; only for the ARC architecture. This patch turns these two
parameters into Kconfig items everywhere else they are found.

All of the include/configs/* and defconfig changes in this patch are
for arm machines only. The Kconfig changes for arc, nds32, riscv,
and xtensa have been included since these symbols are found in code
under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
include/configs/* or defconfigs for these architectures exist which
include these symbols.

These results have been confirmed with tools/moveconfig.py.

Acked-by: Alexey Brodkin <abrodkin@snopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Re-migrate for a few more boards]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18 08:15:34 -04:00
Trevor Woerner
b7b4af0e35 CONFIG_SYS_[ID]CACHE_OFF: unify the 'any' case
According to De Morgan's Law[1]:
	!(A && B) = !A || !B
	!(A || B) = !A && !B

There are 5 places in the code where we find:
	#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
and 4 places in the code where we find:
	#if (!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF))

In words, the construct:
	!defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
	"is the [DI]CACHE on?"
and the construct:
	defined(CONFIG_SYS_[DI]CACHE_OFF)
means:
	"is the [DI]CACHE off?"

Therefore
	!(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
means:
	"the opposite of 'are they both off?'"
in other words:
	"are either or both on?"
and:
	(!defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF)
means:
	"are either or both on?"

As a result, I've converted the 4 instances of '(!A || !B)' to '!(A && B)' for
consistency.

[1] https://en.wikipedia.org/wiki/De_Morgan%27s_laws

Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
2019-05-18 08:15:34 -04:00
Tom Rini
b51d103cab Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- SoCFPGA DT and reset cleanup, AE MCVEVK board support.
2019-05-16 07:09:33 -04:00
Tom Rini
8b1d3d19be STM32 MCUs update:
_ Add MPU region for SPI NOR memory mapped region
 _ Add missing QSPI flash compatible for STM32 F7 boards
 _ Update spi-tx-bus-width and spi-rx-bus-width properties
 _ Add QSPI support for STM32F469 Discovery board
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Merge tag 'u-boot-stm32-mcu-20190514' of https://github.com/pchotard/u-boot

STM32 MCUs update:
_ Add MPU region for SPI NOR memory mapped region
_ Add missing QSPI flash compatible for STM32 F7 boards
_ Update spi-tx-bus-width and spi-rx-bus-width properties
_ Add QSPI support for STM32F469 Discovery board
2019-05-15 07:10:32 -04:00
Marek Vasut
9e6ed1a346 ARM: dts: socfpga: Keep FPGA bridge entries in SPL DT
Keep the FPGA bridge entries in SPL DT to let do_bridge_reset() toggle
the bridges on/off as needed according to the handoff file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-14 19:53:16 +02:00
Marek Vasut
917bd8a876 ARM: dts: socfpga: Factor out U-Boot specifics from A10 handoff files
Pull out the u-boot,dm-pre-reloc from socfpga_arria10_socdk_sdmmc_handoff.dtsi
into separate dtsi header file to make it easier to patch in custom handoff
dtsi files, without having to manually add the U-Boot bits. Shuffle the include
clauses in the A10 DT files to make it obvious what gets included where without
having to follow confusing long chain of includes, i.e. board DT file includes
everything it needs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-14 19:53:16 +02:00
Wolfgang Grandegger
990ed4452c arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] board
Re-add support for Aries Embedded MCV SoM, which is CycloneV based
and the associated MCVEVK and MCVEVP baseboard. The board can boot
from eMMC. Ethernet and USB is supported.

The Aries Embedded boards have been removed with commit 03b54997d5
("board/aries: Remove"). I will now take care of them.

The device-tree files are from mainline Linux commit e93c9c99a629
("Linux v5.1)".

Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de>
CC: Marek Vasut <marex@denx.de>
CC: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-14 19:52:39 +02:00
Simon Goldschmidt
48ec73453a arm: sofcpga: s10: remove unused ad-hoc reset code
The stratix 10 reset manager ad-hoc code in arch/arm contains an unused
function 'reset_deassert_peripherals_handoff' that has been added from
the beginning. As this is probably a result of copying the gen5 reset
manager and this function has never been used, remove it.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-14 19:52:39 +02:00
Simon Goldschmidt
430b42f76a arm: socfpga: remove re-added ad-hoc reset code
commit c5de2b7eae ("arm: socfpga: implement proper peripheral reset")
has removed the call to 'reset_deassert_peripherals_handoff()' from
socfpga gen5 SPL since the reset driver now handles resets. However,
commit c1d4b464c8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA")
has re-added this ad-hoc reset code, so that all peripherals were now
again enabled instead of letting the drivers enable them by request.

While at it, remove this function for gen5 as it should not be used.

Fixes: commit c1d4b464c8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-14 19:52:38 +02:00
Tom Rini
d2d8f73da4 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- A10 FPGA programming support, Gen5 livetree conversion
2019-05-13 07:13:03 -04:00
Tien Fong Chee
1085bb3cba spl: socfpga: Implement fpga bitstream loading with socfpga loadfs
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Tien Fong Chee
0a42a132a4 ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-10 22:48:11 +02:00
Marek Vasut
d0487da83f sh: sh3: Remove CPU support
This CPU core is old, no boards using the CPU are left in mainline,
it has no prospects of ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
89a6b74636 sh: shmin: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
d7d7e84856 sh: ms7720se: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
a786d9be88 sh: mpr2: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Mark Jonas <mark.jonas@de.bosch.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
7de3ea8b98 sh: sh2: Remove CPU support
This CPU core is old, no boards using the CPU are left in mainline,
it has no prospects of ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
54eac8b3a3 sh: rsk7269: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
58300f399f sh: rsk7264: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Marek Vasut
5736453c6f sh: rsk7203: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
2019-05-10 22:43:18 +02:00
Lokesh Vutla
a325796da4 arm: k3: config.mk: Use k3_gen_x509_cert.sh to generate boot images
Instead of overlading makefile, use the k3_gen_x509_cert.sh script
to generate boot images.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-09 20:22:05 -04:00
Christoph Fritz
02c038ddb3 arm: zimage: add barebox image magic number
For chainboot configurations or test environments, this patch allows
booting barebox images by using command bootz.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
2019-05-09 20:21:59 -04:00
Vagrant Cascadian
048a92ea54 Fix spelling of available.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
2019-05-09 19:52:55 -04:00
Tom Rini
f30f268a07 Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip
Improvements and new features:
- split more rockchip pinctrl_core feature into per SoC
- enable TPL for evb-rk3399 board
- enable TPL/SPL for evb-px5 board
- enable TPL and OP-TEE support for evb-rk3229
- update fix in arm common assembly start code for rockchip header file
- update default SPL_FIT_GENERATOR for rockchip
- rk3399 boards update to use '-u-boot.dtsi'
- add new rk3399 boards: Nanopi M4, Nanopc T4
- enable sound for chromebook_minnie
2019-05-09 12:36:17 -04:00
Tom Rini
062aceb8bf Merge git://git.denx.de/u-boot-marvell
- DM updates for multiple MVEBU boards (Stefan)
- Add CRS305-1G-4S board (Luka)
- Enable MMC in SPL on clearfog (Baruch)
2019-05-09 07:12:25 -04:00
Tom Rini
7d41f2dcbe Merge git://git.denx.de/u-boot-riscv
- Correct SYS_TEXT_BASE for qemu.
- Support booti.
- Increase SYSBOOTM_LEN for Fedora/RISCV kernel.
- Support SMP booting from flash.
2019-05-09 07:11:52 -04:00
Tom Rini
7aaf2af0e0 - Add USB PHY drivers for Amlogic G12A
- Add USB Complex Glue driver for Amlogic G12A
 - Add USB Gadget support for Amlogic G12A
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Merge tag 'u-boot-amlogic-20190509' of git://git.denx.de/u-boot-amlogic

- Add USB PHY drivers for Amlogic G12A
- Add USB Complex Glue driver for Amlogic G12A
- Add USB Gadget support for Amlogic G12A
2019-05-09 07:11:39 -04:00
Jagan Teki
65cc7dcd77 rockchip: rk3399: Add Nanopc T4 board support
Add initial support for Nanopc T4 board.

Specification
- Rockchip RK3399
- Dual-Channel 4GB LPDDR3-1866
- SD card slot
- 16GB eMMC
- RTL8211E 1Gbps
- AP6356S WiFI/BT
- HDMI In/Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- DC 12V/2A

Commit details of rk3399-nanopc-t4.dts sync from Linux 5.1-rc2:
"arm64: dts: rockchip: Add NanoPC-T4 IR receiver"
(sha1: 95658e21b1707ad7844f873db2fdaa295109a5a3)

Tested-by: Daniel Gröber <dxld@darkboxed.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-09 18:24:31 +08:00
Jagan Teki
b2f5da9dd0 rockchip: rk3399: Add Nanopi M4 board support
Add initial support for Nanopi M4 board.

Specification
- Rockchip RK3399
- Dual-Channel 4GB LPDDR3-1866
- SD card slot
- eMMC socket
- RTL8211E 1Gbps
- AP6356S WiFI/BT
- HDMI In/Out, DP, MIPI DSI/CSI
- USB 3.0 x4
- USB Type C power and data
- GPIO1, GPIO2 expansion ports
- DC5V/3A

Commit details of rk3399-nanopi-m4.dts sync from Linux 5.1-rc2:
"arm64: dts: rockchip: Refine nanopi4 differences"
(sha1: c62ffaf5026d0b7633e62b2cea8450b5543c349a)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-09 18:24:31 +08:00
Jagan Teki
adc91db0e6 rockchip: dts: rk3399: nanopi4: Use CD pin as RK_FUNC_1
Attaching GPIO functionality to SDMMC0_DET pin (which
does in Linux base dts) make dwmmc driver "fail to detect
the card".

  Card did not respond to voltage select!

It may be because the existing driver can't support gpio
card detection. So, change the pinctrl functionality from
RK_FUNC_GPIO to RK_FUNC_1 like other rk3399 dts does via
sdmmc_cd pin.

Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-09 18:23:16 +08:00
Atish Patra
3cedc97479 RISCV: image: Add booti support
This patch adds booti support for RISC-V Linux kernel. The existing
bootm method will also continue to work as it is.

It depends on the following kernel patch which adds the header to the
flat Image. Gzip compressed Image (Image.gz) support is not enabled with
this patch.

https://patchwork.kernel.org/patch/10925543/

Tested on HiFive Unleashed and QEMU.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Karsten Merker <merker@debian.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
2019-05-09 16:47:52 +08:00