Commit graph

12386 commits

Author SHA1 Message Date
Wolfgang Denk
c04bf5e9a4 Merge branch 'master' of git://git.denx.de/u-boot-arm 2011-03-27 21:20:29 +02:00
Tom Warren
05858736f5 arm: Tegra2: Change mach-type to MACH_TYPE_SEABOARD due to mach-types.h update
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-03-27 19:20:30 +02:00
Chander Kashyap
f69bb51145 S5P: mmc: Resolved interrupt error during mmc_init
Blocksize was hardcoded to 512 bytes. But the blocksize varies
depeding on various mmc subsystem commands (between 8 and 512).
This hardcoding was resulting in interrupt error during data
transfer.

It is now calculated based upon the request sent by mmc subsystem.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:26 +02:00
Chander Kashyap
bef5f8565f ARMV7: S5P: Fixed register offset in mmc.h
The MMC registers are accessed through struct s5p_mmc member
variables. MMC controller "control4" register offset is set
to 0x8C as per data sheet. The size of struct s5p_mmc is also
corrected.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:21 +02:00
Minkyu Kang
9aca34d6ab S5P: timer: replace bss variable by gd
Use the global data instead of bss variable, replace as follow.

count_value -> removed
timestamp -> tbl
lastdec -> lastinc

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Albert ARIBAUD <albert.aribaud@free.fr>
2011-03-27 19:20:17 +02:00
Minkyu Kang
aa44a45f73 S5P: universal: Enable the pwm driver
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:08 +02:00
Minkyu Kang
96caf02f60 S5P: goni: Enable the pwm driver
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:06 +02:00
Minkyu Kang
dc795a8882 S5P: smdkc100: Enable the pwm driver
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:20:03 +02:00
Minkyu Kang
70fc52dfaa S5P: timer: Use pwm functions
Use pwm functions for timer that is PWM timer 4.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:59 +02:00
Donghwa Lee
3f129280b3 ARM: S5P: pwm driver support
This is common pwm driver of S5P.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:54 +02:00
seedshope
ecc7cedd5a SMDK6400: Fixup dram_init for relocation support
Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:24 +02:00
seedshope
9a3a49fb00 SMDK6400: Disable LED function in start.s on the nand booting
Since nand boot have some limit for the first 4KB, We only
disable the LED function to reduce the code space. At the
same time, Fix the compile error for LED function undefined
in the compile time of nand_spl.

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:21 +02:00
seedshope
6dde5074cc SMDK6400: Add some labels to u-boot.lds to support nand_spl
In the nand_spl feature of SMDK6400. Add some relocation symbols to
nand_spl/board/samsung/smdk6400/u-boot.lds to fix the compile error.

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:16 +02:00
seedshope
fb3527575d SMDK6400: Fix the mutiple link error
The first, the cpu_init.o have already been link for cmd_link_o_target
atfer compile, But, The link script re-link the point file. So the link
machine will generate multiple definition error information.

The second, Since the first 4kB of nand boot featue code move to nand_spl,
So It is not necessary to force the cpu_init.o in non-nand boot.

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:10 +02:00
seedshope
6c0db6fb7f SMDK6400: Fix some label undefined in build error
Modify Makefile for cpu_init.c and Start.s use some label,this defined
u-boot.lds of arch/arm/cpu/arm1176. But SMDK6400 use the link script
board/samsung/smdk6400/u-boot-nand.lds. So add some label form u-boot.lds
to u-boot-nand.lds

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:05 +02:00
seedshope
6d56073c60 SMDK6400: Fix CONFIG_SYS_INIT_SP_ADDR undefined
Fix CONFIG_SYS_INIT_SP_ADDR undefined issue.

Signed-off-by: Zhong Hongbo <bocui107@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2011-03-27 19:19:00 +02:00
Po-Yu Chuang
f326cbba98 arm: fix incorrect monitor protection region in FLASH
Monitor protection region in FLASH did not cover .rel.dyn
and .dynsym sections, because it uses __bss_start to compute
monitor_flash_len. Use _end instead.

Add _end to linker scripts for end of u-boot image
Add _end_ofs to all the start.S.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:52 +02:00
Po-Yu Chuang
44c6e6591c rename _end to __bss_end__
Currently, _end is used for end of BSS section.  We want _end to mean
end of u-boot image, so we rename _end to __bss_end__ first.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-03-27 19:18:37 +02:00
Prabhakar Kushwaha
b0c5ceb305 powerpc/85xx: Fix PCI memory map setup on P1_P2_RDB
Update the PCIe address map to match standard FSL memory map.
Additionally, fix the TLBs so the cover the PCIe address space properly
so cards plugged in like an e1000 work correctly.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:46:21 -05:00
York Sun
eb672e92f4 powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134
The fix for errata workaround is to avoid covering physical address
0xff000000 to 0xffffffff during the implementation.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:50 -05:00
York Sun
4ca3192946 powerpc/mpc8xxx: disable rcw_en bit for non-DDR3
rcw_en bit is only available for DDR3 controllers. It is a reserved bit on
DDR1 and DDR2 controllers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:50 -05:00
York Sun
634bc55429 powerpc/mpc8572ds: revise board specific timing for dual-rank DIMMs
Tested all possible values for clk_adjust and write_data_delay for dual
rank UDIMM and RDIMM to revise the tables.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:50 -05:00
York Sun
08b3f7599f powerpc/mpc8xxx: fix recognition of DIMMs with ECC and Address Parity
To recognize DIMMs with ECC capability by testing ECC bit only. Not to be
confused by Address Parity bit.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-24 09:20:49 -05:00
Ed Swarthout
55f7934d2b strmhz: Make hz unsigned to support greater than 2146 MHz clock
For example, an input of 0x80000000 should print:

2147.484 instead of -2147.-483.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-22 23:34:36 +01:00
Haiying Wang
6dc1eceb9c Introduce a new linker flag LDFLAGS_FINAL
commit 8aba9dceeb
Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGS

breaks the usage of --gc-section to build nand_spl. We still need linker option
--gc-section for every uboot image, not only the main one. LDFLAGS_FINAL passes
the --gc-sections to each uboot image.

To get the proper linker flags, we use LDFLAGS and LDFLAGS_FINAL to replace
PLATFORM_LDFLAGS in the Makefile of each nand_spl board.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2011-03-22 23:32:06 +01:00
Peter Barada
c81c122242 Fix hash table deletion to prevent lost entries
Use negative used value to mark deleted entry.  Search keeps probing
past deleted entries.  Adding an entry uses first deleted entry when
it hits end of probe chain.

Initially found that "ramdiskimage" and "preboot" collide modulus 347,
causing "preboot" to be inserted at idx 190, "ramdiskimage" at idx 191.
Previous to this fix when "preboot" is deleted, "ramdiskimage" is
orphaned.

Signed-off-by: Peter Barada <peter.barada@logicpd.com>
Tested-by: Wolfgang Denk <wd@denx.de>
2011-03-22 22:43:04 +01:00
Joakim Tjernlund
5e987ddf85 Top config.mk: add include/config.mk
Seems to me that the top level config.mk should include
the auto generated include/config.mk so that all Makefile's
pickup those definitions.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2011-03-21 22:56:56 +01:00
Po-Yu Chuang
8d8fd5b696 net: ftmac100: update get_timer() usages
Use get_timer() the same way as drivers/net/ftgmac100.c

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Reviewed-by: Macpaul Lin <macpaul@gmail.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
2011-03-21 22:54:23 +01:00
Po-Yu Chuang
6f6e6e09b2 net: ftmac100: remove unnecessary volatiles
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Reviewed-by: Macpaul Lin <macpaul@gmail.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
2011-03-21 22:53:30 +01:00
Heiko Schocher
927d2cea6b mpc52xx, digsy_mtc_rev5: Fix Linux crash, if no Flash in bank 2
If no Flash is connected to cs1, Linux crashes, because
reg entries are not correct adapted.

Following fix is needed:
- swap base addresses in CONFIG_SYS_FLASH_BANKS_LIST, as
  flash bank 1 is on chipselect 0 and flash bank 2 on
  chipselect 1
- call fdt_fixup_nor_flash_size() from ft_board_setup()

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <hs@denx.de>
cc: Werner Pfister <Pfister_Werner@intercontrol.de>
cc: Detlev Zundel <dzu@denx.de>
2011-03-21 22:51:27 +01:00
Wolfgang Denk
62043ed02a Merge branch 'master' of git://git.denx.de/u-boot-ubi 2011-03-21 21:40:15 +01:00
Wolfgang Denk
9063fda9d6 Merge branch 'master' of git://git.denx.de/u-boot-sh 2011-03-21 21:38:29 +01:00
Stefan Roese
7f5d8a4d8e UBI: Fix error code handling in ubi commands
Some ubi commands returned negative error codes, resulting in
the following error message on the prompt:

"exit not allowed from main input shell."

Negative error codes are not allowed.

This patch now changes the UBI code to return positive error codes.
Additionally "better" error codes are used, for example "ENOMEM" when
no memory is available for the UBI volume creation any more.

Also the output of some commands is enhanced:

Before:

=> ubi read 100000 testvol 100000
Volume testvol found at volume id 0
read 1048576 bytes from volume 0 to 100000(buf address)
=> ubi write 100000 testvol 1000
Volume testvol found at volume id 0

After:

=> ubi read 100000 testvol 100000
Read 1048576 bytes from volume testvol to 00100000
=> ubi write 100000 testvol 1000
4096 bytes written to volume testvol

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2011-03-21 10:02:16 +01:00
Nobuhiro Iwamatsu
b52da2aed8 sh: Add KEEP order to start.o section
The start.o section is changed by --gc-section option of ld.
Of this using KEEP order, therefore, evade this problem.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-03-16 10:16:34 +09:00
Nobuhiro Iwamatsu
40c477082f sh: Add handling of CONFIG_SYS_NO_FLASH for board.c
Some board of SH does not have flash memoy.
This revises it to initialize Flash when CONFIG_SYS_NO_FLASH is not
defined.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-03-16 10:16:34 +09:00
Yoshihiro Shimoda
903de461e4 net: sh_eth: add support for SH7757's ETHER
SH7757 has ETHER and GETHER. This patch supports EHTER only.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-03-16 10:16:34 +09:00
Kumar Gala
7afc45ad7d powerpc/85xx: Fix synchronization of timebase on MP boot
There is a small ordering issue in the master core in that we need to
make sure the disabling of the timebase in the SoC is visible before we
set the value to 0.  We can simply just read back the value to
synchronizatize the write, before we set TB to 0.

Reported-by: Dan Hettena
Tested-by: Dan Hettena
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-15 01:25:51 -05:00
John Schmoller
cc1dd33f27 mpc8[5/6]xx: Ensure POST word does not get reset
The POST word is stored in a spare register in the PIC on MPC8[5/6]xx
processors.  When interrupt_init() is called, this register gets reset
which resulted in all POST_RAM POSTs not being ran due to the corrupted
POST word.  To resolve this, store off POST word before the PIC is
reset, and restore it after the PIC has been initialized.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-13 11:24:44 -05:00
Priyanka Jain
b71ea33699 fsl_esdhc: Correcting esdhc timeout counter calculation
- Timeout counter value is set as DTOCV bits in SYSCTL register
  For counter value set as timeout,
  Timeout period = (2^(timeout + 13)) SD Clock cycles

- As per 4.6.2.2 section of SD Card specification v2.00, host should
  cofigure timeout period value to minimum 0.25 sec.

- Number of SD Clock cycles for 0.25sec should be minimum
	(SD Clock/sec * 0.25 sec) SD Clock cycles
	= (mmc->tran_speed * 1/4) SD Clock cycles

- Calculating timeout based on
	(2^(timeout + 13)) >=  mmc->tran_speed * 1/4
	Taking log2 both the sides and rounding up to next power of 2
	=> timeout + 13 = log2(mmc->tran_speed/4) + 1

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-07 08:49:28 -06:00
Matthew McClintock
509e19cab4 powerpc/85xx: Fix pixis_reset altbank mask on MPC8536DS
Currently, pixis_reset altbank does not work properly. This patch
uses the correct mask to boot into the alternate bank.

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-06 21:41:07 -06:00
Ed Swarthout
e81241af5a powerpc/85xx: Fix plat_mp_up() disabling of BPTR for CoreNet Platforms
Copying directly from ECM/PQ3 is not correct for how CoreNet based
platforms handle boot page translation.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-05 10:16:24 -06:00
York Sun
d89a976c13 powerpc/corenet_ds: revise platform dependent parameters
This patch revised clk_adjust and wrlvl_start timings for corenet_ds, based
on testing on Virtium VL33B5163F-K9S and Kingston KVR1333D3Q8R9S/4G.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-05 10:13:50 -06:00
York Sun
59a4089f82 corenet_ds: pick the middle value for all tested timing parameters
For DDR3 controller, the clk_adjust and wrlvl_start are platform-dependent.
The best values should be picked up from the middle of all working
combinations. This patch updates the table with confirmed values tested on
Hynix dual-rank UDIMMs (HMT125U7BFR8C-H9) at 1300MT/s, 1200MT/s, 1000MT/s,
900MT/s, 800MT/s and Kingston quad-rank RDIMMs (KVR1333D3Q8R9S/4G) at 1300MT/s,
1200MT/s, 1000MT/s.

Signed-off-by: York Sun <yorksun@freescale.com>
2011-03-05 10:13:50 -06:00
York Sun
f5b6fb7c1b powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registers
The write recovery time of both registers should match. Since mode register
doesn't support cycles of 9,11,13,15, we should use next higher number for
both registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-05 10:13:50 -06:00
Kumar Gala
8e29ebabf8 fsl_law: Fix LAW printing function
We had an extra '0x' in the output of the LAWAR header that would cause
output like:

LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d

intead of:

LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-22 23:25:19 -06:00
Sandeep Paulraj
c7977858dc ARM: Update mach-types
This commit updates the mach-types based on the latest
in linus's head

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-02-21 08:30:55 +01:00
Fabio Estevam
0952ea16ad arm1136 relocation: Fix calculation of board_init_r
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-02-21 08:30:55 +01:00
Fabio Estevam
428f718889 arm1136: Fix NAND boot
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
2011-02-21 08:30:55 +01:00
Po-Yu Chuang
3a8a83e08d arm: get_sp() should always be compiled
get_sp() was incorrectly excluded if none of
  CONFIG_SETUP_MEMORY_TAGS
  CONFIG_CMDLINE_TAG
  CONFIG_INITRD_TAG
  CONFIG_SERIAL_TAG
  CONFIG_REVISION_TAG
were defined.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
2011-02-21 08:30:55 +01:00
Lei Wen
ea4bc120db Pantheon: Add Board Support for Marvell dkb board
DKB is a Development Board for PANTHEON TD/TTC(pxa920/pxa910) with
* Processor upto 806Mhz
* LPDDR1/2
* x8/x16 SLC/MLC NAND
* Footprints for eMMC & MMC x8 card

With Peripherals:
* Parallel LCD I/F
* Audio codecs (88PM8607)
* MIPI CSI-2 camera
* Marvell 88W8787 802.11n/BT module
* Marvell 2G/3G RF
* Dual analog mics & speakers, headset jack, LED, ambient
* USB2.0 HS host, OTG (mini AB)
* GPIO, GPIO expander with DIP switches for easier selection
* UART serial over USB, CIR

This patch adds basic board support with DRAM and UART functionality

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2011-02-21 08:30:55 +01:00