commit: 65f83802b7 "serial: 16550: Add getfcr accessor"
breaks u-boot commandline working with long commands
sending to the board.
Since the above patch, you have to setup the fcr register.
For board/archs which enable OF_PLATDATA, the new field
fcr in struct ns16550_platdata is not filled with a
default value ...
This leads in not setting up the uarts fifo, which ends
in problems, when you send long commands to u-boots
commandline.
Detected this issue with automated tbot tests on am335x
based shc board.
The error does not popup, if you type commands. You need
to copy&paste a long command to u-boots commandshell
(or send a long command with tbot)
Possible boards/plattforms with problems:
./arch/arm/cpu/arm926ejs/lpc32xx/devices.c
./arch/arm/mach-tegra/board.c
./board/overo/overo.c
./board/quipos/cairo/cairo.c
./board/logicpd/omap3som/omap3logic.c
./board/logicpd/zoom1/zoom1.c
./board/timll/devkit8000/devkit8000.c
./board/lg/sniper/sniper.c
./board/ti/beagle/beagle.c
./drivers/serial/serial_rockchip.c
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add compatibility string for the Ingenic JZ4780 SoC, the necessary
UART enable bit into FCR and register shift. Neither are encoded
in the DTS coming from Linux, so we need to support it this way.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add driver data to each compatible string to identify the type of
the port. Since all the ports in the driver are entirely compatible
with 16550 for now, all are marked with PORT_NS16550. But, there
are ports which have specific quirks, like the JZ4780 UART, which
do not have any DT property to denote the quirks. Instead, Linux
uses the compatible string to discern such ports and enable the
necessary quirks.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Add function which allows fetching the default FCR register setting
from platform data for DM , while retaining old behavior for non-DM
by returning UART_FCRVAL.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This reverts commit 82f5279b0c.
The build failure of k2*evm boards was fixed in a different way by
the previous commit. It is nasty to patch generic drivers around
with #ifdef CONFIG_CLK just for the KeyStone's matter.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
When calling clk_get_by_index(), fall back to the legacy method of
getting the clock if -ENOENT is returned.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Previously ns16550 compatible UARTs probed via device tree have needed
their device tree nodes to contain a clock-frequency property. An
alternative to this commonly used with Linux is to reference a clock via
a phandle. This patch allows U-Boot to support that, retrieving the
clock frequency by probing the appropriate clock device.
For example, a system might choose to provide the UART base clock as a
reference to a clock common to multiple devices:
sys_clk: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <10000000>;
};
uart0: uart@10000000 {
compatible = "ns16550a";
reg = <0x10000000 0x1000>;
clocks = <&sys_clk>;
};
uart1: uart@10000000 {
compatible = "ns16550a";
reg = <0x10001000 0x1000>;
clocks = <&sys_clk>;
};
This removes the need for the frequency information to be duplicated in
multiple nodes and allows the device tree to be more descriptive of the
system.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With of-platdata this driver cannot know the format of the of-platdata
struct, so we cannot use generic code for accessing the of-platdata. Each
SoC that uses this driver will need to set up ns16550's platdata for it.
So don't compile in the generic code.
Signed-off-by: Simon Glass <sjg@chromium.org>
The CONFIG_OMAP1510 is no longer defined, so remove this dead code.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Nishanth Menon <nm@ti.com>
The ns16550 driver needs serial_in_shift() and serial_out_shift()
when compiled in debug UART mode, so shift the DM_SERIAL check a
little to make these functions available.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If the UART is to be accessed using I/O port accessors (inb & outb) then
using map_physmem doesn't make sense, since it operates in a different
memory space. Remove the call to map_physmem when
CONFIG_SYS_NS16550_PORT_MAPPED is defined, allowing I/O port addresses
to not be mangled by the incorrect mapping.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Moved the new field to the end of the struct to avoid problems:
Signed-off-by: Simon Glass <sjg@chromium.org>
This reverts commit d9a3bec682.
While this is a correct change to do long term it unfortunately breaks a
number of platforms that are using pdata and not named struct members so
they are getting all of their data after 'base' incorrect.
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Zap the rockchip serial compatible string, because rockchip
serial has "snps,dw-apb-uart" compatible string in the dts.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
Allow the ns16550 debug UART to be used without the full driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Use the driver model version of the function to find the BAR. This updates
the fdtdec function, of which ns16550 is the only user.
The fdtdec_get_pci_bdf() function is dropped for several reasons:
- with driver model we should use 'struct udevice *' rather than passing the
device tree offset explicitly
- there are no other users in the tree
- the function parses for information which is already available in the PCI
device structure (specifically struct pci_child_platdata which is available
at dev_get_parent_platdata(dev)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
For platforms that don't use device tree in SPL the only way to mark this
driver as 'required by relocation' is with the DM_FLAG_PRE_RELOC flag. Add
this to ensure that the driver is bound.
Fixes: fde7e18938 ("dm: tegra: pci: Move CONFIG_PCI_TEGRA to Kconfig")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
Change reg-shift property default to zero. When the integer property
is missing, it should be taken as zero. This is consistent to Linux
drivers/tty/serial/of_serial.c.
The x86 and most powerpc use reg-shift of 0. Most others use reg-shift
of 2. While reg-shift of 1 is rarely used.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers
is completed.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add generic binding to unify ns16550 drivers. There are
several drivers using almost the same code, such as serial_dw,
serial_keystone, serial_omap, serial_ppc, serial_rockchip,
serial_tegra.c, and serial_x86. But each is platform specific.
The key difference between these drivers is the way to get
input clock frequency. With this unified approach, fixed clock
frequency should be extracted from "clock-frequency" property of
device tree blob. If this property is not available, the macro
CONFIG_SYS_NS16550_CLK will be used. It can be a constant or a
function to get clock, eg, get_serial_clock().
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Change map_sysmem() to map_physmem(,,MAP_NOCACHE). Though map_sysmem()
can be used to map system memory, it might be wrong to use it for I/O
ports. The map_physmem() serves the same purpose to translate physical
address to virtual address with the additional flag to take care of cache
property. Most drivers use map_physmem() since I/O ports access should be
uncached. As ns16550 is a driver, it should use map_physmem() rather
than map_sysmem().
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
We want to be able to add other common code to this function. So change the
driver's version to have an underscore before it, just like
_debug_uart_putc(). Define debug_uart_init() to call this version.
Update all drivers to this new method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is a convenient way for a driver to get the hardware address of a
device, when regmap or syscon are not being used. Change existing callers
to use it as an example to others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing
devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
away the ugly logic in include/fdtdec.h:
#ifdef CONFIG_OF_CONTROL
# if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL)
# define OF_CONTROL 0
# else
# define OF_CONTROL 1
# endif
#else
# define OF_CONTROL 0
#endif
Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to
CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for
SPL.
Also, we no longer have to cancel CONFIG_OF_CONTROL in
include/config_uncmd_spl.h and scripts/Makefile.spl.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Since Rockchip requires 32-bit serial access, add this to the driver.
Refactor a little to make this easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option is used by some boards, so support it with driver model. This
is really ugly - we should rewrite this driver once all users are moved to
driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
This was accidentally added by commit dd0b0122ba
"serial: ns16550: Add an option to specify the debug UART register shift".
Remove it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Simon Glass <sjg@chromium.org>
It is not necessary to write a zero baud rate to the device, and for some
chips this will cause problems. Drop this code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow this driver to support boards where the register shift is not 0.
This fixes some compiler warnings which appear in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
This UART permits different register spacing. To support the debug UART on
devices which have a spacing other than 1 byte, allow the shift value to
be specified.
Signed-off-by: Simon Glass <sjg@chromium.org>
In the case where the arch defines a custom map_sysmem(), make sure that
including just mapmem.h is sufficient to have these functions as they
are when the arch does not override it.
Also split the non-arch specific functions out of common.h
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add debug UART functions to permit ns16550 to provide an early debug UART.
Try to avoid using the stack so that this can be called from assembler before
a stack is set up (at least on ARM and PowerPC).
Signed-off-by: Simon Glass <sjg@chromium.org>
For the debug UART we need to be able to provide any parameters before
driver model is set up. Add parameters to the low-level access functions
to make this possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are many pci uart devices which are ns16550 compatible. We can
describe them in the board dts file and use it as the U-Boot serial
console as specified in the chosen node 'stdout-path' property.
Those pci uart devices can have their register be memory-mapped, or
i/o-mapped. The driver will try to use the memory-mapped register if
the reg property in the node has an entry to describe the memory-mapped
register, otherwise i/o-mapped register will be used.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
The same problem that is seen on some OMAP3 is also seen on some OMAP4
so include them in the test in order to prevent some hangs during SPL.
[trini: Re-word commit message, make apply cleanly]
Signed-off-by: Tom Rini <trini@ti.com>
The probe logic sets up the pointer to the platform data in the device
tree decode method. It should be done in the probe() method, and anyway
the device tree decode method can't be used when CONFIG_OF_CONTROL is
not enabled.
Fix these two problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
It is inconvenient to have to use casts when specifying platform data. Also
it is not strictly correct, since we should use map_sysmem() to convert an
address to a pointer.
Adjust the platform data to use an address.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
There is a bug in the logic which checks for an available character. This
can cause invalid characters to be received - this was noticed on
beaglebone. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Add driver model support so that ns16550 can support operation both with
and without driver model.
The driver needs a clock frequency so cannot stand alone unfortunately. The
clock frequency must be provided by a separate driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
The same sequence is used in several places, so move it into a function.
Note that UART_LCR_BKSE is an alias for UART_LCR_DLAB.
Signed-off-by: Simon Glass <sjg@chromium.org>
The following configs are not defined at all.
- CONFIG_OMAP1510
- CONFIG_OMAP_1510P1
- CONFIG_OMAP_SX1
- CONFIG_OMAP3_DMA
- CONFIG_OMAP3_ZOOM2
- CONFIG_OMAP_INNOVATOR
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Use CONFIG_SOC_KEYSTONE in common places instead of defining
a lot of "if def .. || if def " for different Keystone2 SoC types.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
keystone serial hw support hw flow control. This patch
enables hw flow control for keystone EVMs as an optional
feature based on CONFIG_SERIAL_HW_FLOW_CONTROL.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler
SoC. Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please
refer the ti/k2hk_evm/README for details on the board, build and other
information.
This patch add support for keystone architecture and k2hk evm.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Sandeep Nair <sandeep_n@ti.com>
The omap3_zoom2 board has not been updated for a correct CONFIG_SYS_HZ
and Tom Rix's email has long been bouncing.
Signed-off-by: Tom Rini <trini@ti.com>
Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX
Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com>
[trini: Adapt for CONFIG_OMAP_COMMON changes, AM43XX]
Signed-off-by: Tom Rini <trini@ti.com>
The omap2420H4 was the only mainline omap24xx board. Prior to being
fixed by Jon Hunter in time for v2013.04 it had been functionally broken
for a very long time. Remove this board as there's not been interest in
it in U-Boot for quite a long time.
Signed-off-by: Tom Rini <trini@ti.com>
Flush UART3 xmit on enable if TEMT is broken
On some OMAP3 devices when UART3 is configured for boot mode before SPL starts
only THRE bit is set. We have to empty the transmitter before initialization
starts. This patch avoids the use of CONFIG_SYS_NS16550_BROKEN_TEMT.
Signed-off-by: Manfred Huber <man.huber@arcor.de>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
This cast does not seem correct, since we should be writing to a pointer,
not a ulong.
This fixes the following warning on nds32:
-ns16550.c:49: warning: passing argument 2 of 'writeb' makes pointer from integer without a cast
Signed-off-by: Simon Glass <sjg@chromium.org>
Some platforms (e.g. IGEPv2 board) has a broken ns16550 UART that
does not set the TEMT bit when the transmitter is empty in SPL.
This makes U-Boot to hang while waiting for TEMT to be set.
Add a new option to avoid this:
CONFIG_SYS_NS16550_BROKEN_TEMT
16550 UART set the Transmitter Empty (TEMT) Bit when all output
has finished and the transmitter is totally empty. U-Boot waits
for this bit to be set to initialize the serial console. On some
broken platforms this bit is not set in SPL making U-Boot to
hang while waiting for TEMT. Define this option to avoid it.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
TEMT is set when the transmitter is totally empty and all output has
finished.
This prevents output problems (including a loss of synchronization
observed on p2020 that persisted for quite a while) if SPL has output
still on its way out.
Signed-off-by: Scott Wood <scottwood@freescale.com>
--
v2: fixed typo in subject, and explained what the bit does in the changelog
Having both USBTTY and CONFIG_SERIAL_MULTI enabled in SPL, the
usbtty.c file is protected in Makefile to not be compiled into
the SPL. Yet, the ns16550 serial driver does not contain such
protection. Add it to avoid missing symbol error.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Rini <trini@ti.com>
also fix NS16550_init() as we need 16x divider
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Acked-by: Sughosh Ganu <urwithsughosh@gmail.com>
Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
This patch adds basic support for booting the board.
This patch adds support for the UART necessary to
get to the u-boot prompt.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory
mapped access will be used to read/write the uart registers.
This is especially useful for SoC devices that implement 16550
compatible uarts but that have peripheral access width constraints.
Signed-off-by: Dave Aldridge <fovsoft@gmail.com>
On some processors this ier register configuration is different
for ex. Marvell Armada100
This patch introduce CONFIG_SYS_NS16550_IER macro support to
unconditionally initialize this register.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Call watchdog_reset() upon newline. This is done here in putc
since the environment code uses a single puts() to print the complete
envrironment upon "printenv". So we can't put this watchdog call
in puts().
This is needed for boards with a very short watchdog timeout, like the
lwmon5 with a 100ms timeout. Without this patch this board resets in the
commands with long outputs, like "printenv" or "fdt print".
Note that the image size is not increased with this patch when
CONFIG_HW_WATCHDOG or CONFIG_WATCHDOG are not defined since the compiler
optimizes this additional code away.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix typo in comment.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The x86 architecture exclusively uses Port-Mapped I/O (inb/outb) to access
the 16550 UARTs. This patch mimics how Linux selects between Memory-Mapped
and Port-Mapped I/O. This allows x86 boards to use CONFIG_SERIAL_MUTLI and
drop the custom serial port driver
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.
Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
ns16550 busyloops waiting for incoming byte causing watchdog to reboot
while waiting for a key press. A call to WATCHDOG_RESET in NS16550_getc
loop fixes it.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Zoom2 serial is in general supplied by one of the 4 UARTS on the debug board.
The default serial is from the USB connector on left side of the debug board.
The USB connector will produce 2 of the 4 UARTS. On your host pick the first
enumeration.
The details of the setting of the serial gpmc setup are not available.
The values were provided by another party.
The serial port set up is the same with Zoom1.
Baud rate 115200, 8 bit data, no parity, 1 stop bit, no flow.
The kernel bootargs are
console=ttyS3,115200n8
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Fix problems introduced in commit
7b5611cdd1 [inka4x0: Add hardware
diagnosis functions for inka4x0] which redefined MSR_RI which is
already used on PowerPC systems.
Also eliminate redundant definitions in ps2mult.h. More cleanup will
be needed for other redundant occurrences though.
Signed-off-by: Detlev Zundel <dzu@denx.de>
This patch will create a configuration option for a minimum configuration for
the ns16550 serial driver at drivers/serial/ns16550.c and will apply this new
configuration option to the SIMPC8313.h config file in order to fix the NAND
bootstrap build error. This option will exclude all functions with exception of
NS16550_putc and NS16550_init. This will be used primarily to save space and
remove unused code from builds in which space is limited.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
According to the OMAP5912 Serial Interfaces Reference Guide (see
http://focus.ti.com/lit/ug/spru760c/spru760c.pdf, page 150), the
FIFO_EN enable bit in the FIFO Control Register (FCR) can only be
changed when the baud clock is not running, i. e. when both DLL and
DLH are set to 0.
Thus make sure that DLL and DLH are 0 when writing the FCR.
Signed-off-by: Wolfgang Denk <wd@denx.de>
