Import asm-offsets.c from kernel to generate offset for struct pt_regs
needed by exception handlers.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This adds a new Kconfig option CONFIG_MIPS_INIT_STACK_IN_SRAM which
a SoC can select if it supports some kind of SRAM. Together with
CONFIG_SYS_INIT_SP_ADDR the initial stack and global data can be
set up in that SRAM. This can be used to provide a C environment
also for lowlevel_init().
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Move the code for setting up the initial stack and global data
to a macro to be able to use it more than once.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Clear cp0 status while preserving implementation specific bits.
Set bits BEV and ERL as the arch specification requires after
a reset or soft-reset exception.
Extend and fix initialization of watch registers. Check if additional
watch register sets are implemented and initialize them too.
Initialize cp0 count as early as possible to get the most
accurate boot timing.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
When booting from ROM, early exceptions can't be handled
properly. Instead of busy-looping give the developer the
possibilty to examine the situation. Invoke an UHI
exception operation which can be read as unhandled exception
by a hardware debugger if one is attached. If the debugger
doesn't support UHI, the exception is read as unexpected
breakpoint.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This adds a compile time option to include code for static
exception vectors. Static exception vectors are only needed,
when the U-Boot entry point is equal to the CPU reset exception
vector address. For instance this is the case when U-Boot is
used as ROM in Qemu or booted from parallel NOR flash. When
U-Boot is booted from RAM (e.g. loaded there by SPL), the
exception vectors need to be setup dynamically, which is done
in follow-up commits.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch extends the imx6 clock code to enable or disable the EIM
slow clock, which in necessary when one wants to use EIM interface t
o read/write from external memory (e.g. NOR).
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
This patch adds initial support for Samtec VIN|ING 2000 board.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
The catch-all job is failing due to time limits depending on factors out
of our control, so move Samsung and Rockchip boards into their own jobs
and then exclude them from the general ARM and AArch64 jobs.
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable the escpi3 nets attached to the mikroBUS slot
on the i.MX7 Sabre evalution board. Also enble the SPI flash
commands to work with the "flash click" board.
This is V2 of this patch with changes recommended by the maintainer
CC: Jagan Teki <jteki@openedev.com>
Specify standard padding for payload to 68KB. This is derived from
the maximum header size plus maximum SPL size. It matches the
already defined offset for SD/eMMC devices (69KB) too. This allows
to use the u-boot-with-spl.imx build target to generate a directly
flashable image which can be flashed using:
dd if=u-boot-with-spl.imx of=/dev/mmcblk0 bs=512 skip=2
While the patch has been created with SD/eMMC in mind, this also
works with other boot media. The board file needs to configure the
media specific (absolute) payload offset accordingly. Especially
the IVT offset is boot media specific and can be retrieved from the
reference manual (Table 8-25. Image Vector Table Offset and Initial
Load Region Size). For NAND boot a define like this should do the
job:
#define CONFIG_SYS_NAND_U_BOOT_OFFS (SPL_PAD_TO + 0x400)
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
UDOO Neo Board is a development board from Seco that has three models:
- UDOO Neo Basic
- UDOO Neo Basic Kick Starter
- UDOO Neo Extended
- UDOO Neo Full
All versions are based on the i.MX6 SoloX processor.
For more details about the UDOO Neo board, please refer to:
http://www.udoo.org/udoo-neo/
This work is based on a previous commit of Francesco Montefoschi
<francesco.monte@gmail.com>:
877b71184a
Only tested on the UDOO Neo Full board.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Our update scripts write the kernel and device tree in seperate
UBI volumes. This allows to use a lot less UBI/UBIFS support in
U-Boot, which should lower the risk of hitting bugs in this area.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Change the PMIC bulk configuration from auto mode to sync mode to avoid
voltage dropout issue seen in auto mode.
Signed-off-by: Ken Lin <ken.lin@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
The DDR calibration routines are gated by conditionals for the
i.MX6DQ SOCs, but with the use of the sysinfo parameter, these
are usable on at least i.MX6SDL and i.MX6SL variants with DDR3.
Also, since only the Novena board currently uses the dynamic
DDR calibration routines, these routines waste space on other
boards using SPL.
Add a KConfig entry to allow boards to selectively include the
DDR calibration routines.
Signed-off-by: Eric Nelson <eric@nelint.com>
Add routine mmdc_read_calibration() to return the output of DDR
calibration. This can be used for debugging or to aid in construction
of static memory configuration.
This routine will be used in a subsequent patch set adding a virtual
"mx6memcal" board, but could also be useful when gathering statistics
during an initial production run.
Signed-off-by: Eric Nelson <eric@nelint.com>
The DDR calibration routines have scattered support for bus
widths other than 64-bits:
-- The mmdc_do_write_level_calibration() routine assumes the
presence of PHY1, and
-- The mmdc_do_dqs_calibration() routine tries to determine
whether one or two DDR PHYs are active by reading MDCTL.
Since a caller of these routines must have a valid struct mx6_ddr_sysinfo
for use in calling mx6_dram_cfg(), and the bus width is available in the
"dsize" field, use this structure to inform the calibration routines which
PHYs are active.
This allows the use of the DDR calibration routines on CPU variants
like i.MX6SL that only have a single MMDC port.
Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Marek Vasut <marex@denx.de>
The DDR calibration code is only setting flag DG_CMP_CYC (DQS gating sample
cycle) for the first PHY.
Set the 32-cycle flag for both PHYs and clear when done so the MPDGCTRL0
output value isn't polluted with calibration artifacts.
Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add constants for the MPZQLP2CTL DDR register for both
banks to allow setting the LPDDR2 timing values in
.cfg files using a named constant instead of hex addresses
as is currently done in mx6slevk and other board files.
Signed-off-by: Eric Nelson <eric@nelint.com>
When I tried to deactivate VIDEO support for the Wandboard, it still
tried to initialize the Framebuffer and so on. That is the reason for
the added ifdefs. CONFIG_VIDEO is enabled in the configuration as default
and therefore nothing changes for the default user.
The structs mx6dl_i2c2_pad_info and mx6q_i2c2_pad_info are only available
when CONFIG_IPUV3 are set and should not be tried to access, when that
define is not defined.
Signed-off-by: Sven Ebenfeld <sven.ebenfeld@gmail.com>
This patch increases supported PWMs from previously PWM4 now up to PWM8
if i.MX6SX is in use.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Configure the PHY to output a 125MHz clk from CLK_25M and set tx clock delay.
This patch is similar to commit 4b6035da48
("mx6sabresd: Make Ethernet functional again").
Signed-off-by: Soeren Moch <smoch@web.de>
The ipu has two display interfaces. Make the used one a parameter
in struct display_info_t instead of using unconditionally DI0.
DI0 is the default setting.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
If CONFIG_SPL_LIBCOMMON_SUPPORT is not defined there is a lone case statement
at the end of the switch leading to a compile error.
Remove the offending case statement.
| common/spl/spl_mmc.c:339:7: error: label at end of compound statement
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Vasut <marex@denx.de>
Check BOOT_CFG2[3:4] to determine which SD/MMC port is selected to boot
from. If MMC2 is selected return BOOT_DEVICE_MMC2. In all other cases
return BOOT_DEVICE_MMC1, as we do not have corresponding macro for MMC3
and MMC4.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Before disable cache, need to first flush cache.
There maybe dirty data in D-Cache before disable D-Cache.
After disable D-Cache, the first store instructions in
psci_v7_flush_dcache_all will directly store registers
{r4-r5, r7, r9-r11, lr} to memory.
If there is dirty data before disable D-Cache,
psci_v7_flush_dcache_all will flush data to memory,
and may overwrite the memory that hold the registers
{r4-r5, r7, r9-r11, lr}.
So before disable cache, first flush D-Cache.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Hongbo Zhang <hongbo.zhang@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Juno uses a 1:1 mapping between CPU and PCI addresses for IO. First,
that will trip devices that cannot use more than 16 bits of addresses
for IO, second it is un-necessary as the system can handle zero-based
PCI addresses just fine.
Change the mapping to start IO bus addresses from zero.
Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Firmware provides a spin table on the raspberry pi. This table shouldn't
get overwritten by payloads, so we need to mark it as reserved.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
To enable working efifb support, let's map the frame buffer as 32bpp
instead of 16bpp.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
The rpi has a pretty simple way of resetting the whole system. All it takes
is to poke a few registers at a well defined location in MMIO space.
This patch adds support for the EFI loader implementation to allow an OS to
reset and power off the system when we're outside of boot time.
Signed-off-by: Alexander Graf <agraf@suse.de>
Add support to detect RGMII link interface from link-interface
device tree entry. Also rename the existing link type enums so
that it provides meaningful interface like SGMII.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch removes use of U_BOOT_DEVICE in board/raspberrypi/rpi/rpi.c,
enables OF_CONTROL in the config and adjusts the rpi_*defconfig configs.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When using OF_CONTROL, the disabled value of the mini UART platdata
gets reset after board_early_init_f. So move detection and disabling
to board_init and remove board_early_init_f.
This uses the first device using the mini uart driver, as this method
works reliably with different device trees or even no device tree at all.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For the Raspberry Pi 3 it needs to be possible to disable the serial
device after initialization happens, as only after the GPIO device is available
it is known whether the mini uart is usable.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The information currently set via platdata has to be represented in the
device tree now. bcm283x-uboot.dtsi adds the u-boot specific "skip-init"
property to the serial nodes and enables initialization in the pre-reloc phase.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds device trees for the bcm283x platform to be used with
OF_CONTROL. The version 4.8-rc7 of the linux kernel was used as source.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds dt-bindings as used by the linux kernel device trees
for the bcm283x family.
Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To be able to represent the skip-init platdata element with OF_CONTROL,
it needs to be read from the device tree as well and put into the platform data.
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds device tree support for the bcm283x mini-uart driver.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds device tree support for the bcm2835 GPIO driver.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
fill_dir_slot use get_contents_vfatname_block as a temporary buffer for
constructing a list of dir_slot entries. To save the memory and providing
correct type of memory for above usage, a local buffer with accurate size
declaration is introduced.
The local array size 640 is used because for long file name entry,
each entry use 32 bytes, one entry can store up to 13 characters.
The maximum number of entry possible is 20. So, total size is
32*20=640bytes.
Signed-off-by: Genevieve Chan <ccheauya@altera.com>
Signed-off-by: Tien Fong Chee <tfchee@altera.com>
Introduce USB Gadget config option. This allows to combine Makefile
entries for SPL_USBETH_SUPPORT and SPL_DFU_SUPPORT.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Ravi Babu <ravibabu@ti.com>
The DFU Kconfig menu entries should be part of the SPL
Kconfig file. Also avoid using the top level Makefile by
moving the config dependent build artifacts to the driver/
and driver/usb/gadget/ Makfiles.
With that, DFU can be built again in SPL if
CONFIG_SPL_DFU_SUPPORT is enabled.
Fixes: 6ad6102246 ("usb:gadget: Disallow DFU in SPL for now")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Some devices (e.g. dra7xx) support loading to RAM using DFU without
having direct boot from RAM support. Make sure the linker list
does not contain BOOT_DEVICE_RAM if CONFIG_SPL_RAM_DEVICE is not
enabled.
Fixes: 98136b2f26 ("spl: Convert spl_ram_load_image() to use linker list")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
