Commit graph

156 commits

Author SHA1 Message Date
Stefan Roese
e732faec95 [PATCH] PPC4xx: 440SP Rev. C detection added
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-28 16:09:24 +01:00
Wolfgang Denk
d2c83f5493 Merge with /home/sr/git/u-boot/denx-alpr-merge-test 2006-11-27 23:11:18 +01:00
Stefan Roese
f6e495f54c [PATCH] 4xx_enet.c: Correct the setting of zmiifer register
Patch below corrects the setting of the zmiifer register, it was
overwritting the register rather than ORing the settings.

Signed-off-by: Neil Wilson <NWilson@airspan.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 17:43:25 +01:00
Stefan Roese
1729b92cde [PATCH] 4xx: Fix problem with board specific reset code (now for real)
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 14:52:04 +01:00
Stefan Roese
1f94d162e2 [PATCH] 4xx: Fix problem with board specific reset code
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 14:48:41 +01:00
Stefan Roese
ec0c2ec725 [PATCH] Remove testing 4xx enet PHY setup
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 14:46:06 +01:00
Stefan Roese
1c2ce22620 [PATCH] Update Prodrive ALPR board support (440GX)
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-27 14:12:17 +01:00
Stefan Roese
48c7d6dba9 Merge with /home/stefan/git/u-boot/denx 2006-11-27 14:11:22 +01:00
Stefan Roese
2053283304 [PATCH] PPC4xx start.S: Fix for processor errata
Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx
errata 1.12: 440_33 by moving patch up in code.

Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-22 13:20:50 +01:00
Stefan Roese
dfc8a9ee00 Merge with /home/stefan/git/u-boot/denx 2006-11-10 07:48:47 +01:00
Stefan Roese
7ade0c634a Fix bug in PPC440 NAND driver cpu/ppc4xx/ndfc.c
Patch by Stefan Roese, 24 Oct 2006
2006-10-24 18:13:43 +02:00
Wolfgang Denk
ba999c531e Cleanup compile warnings. Prepare for release 1.1.5 2006-10-20 17:54:33 +02:00
Stefan Roese
43a2b0e76a Add board/cpu specific NAND chip select function to 440 NDFC
Based on idea and implementation from Jeff Mann
Patch by Stefan Roese, 20 Oct 2006
2006-10-20 15:17:55 +02:00
Stefan Roese
edf0b54338 Make 4xx bootup message shorter on 440EPx/GRx platforms
Patch by Stefan Roese, 18 Oct 2006
2006-10-18 16:00:43 +02:00
Stefan Roese
d7762337cb * PPC405EP: Add support for board configuration of CPC0_PCI register
This is needed to be able to configure PerWE*/PCI_INT* pin as PerWE*
Patch by Tolunay Orkun, 07 Apr 2006
2006-10-12 20:09:31 +02:00
Stefan Roese
e0a46554c3 * PPC405EP: Add CFG_GPIO0_OR, CFG_GPIO0_ODR to setup GPIO completely.
- Add configuration of Open Drain GPIO Output selection
  - Add configuration of initial value of GPIO output pins
Patch by Tolunay Orkun, 07 Apr 2006
2006-10-12 20:09:27 +02:00
Wolfgang Denk
2b208f5308 Move "ar" flags to config.mk to allow for silent "make -s"
Based on patch by Mike Frysinger, 20 Jun 2006
2006-10-09 01:02:05 +02:00
Wolfgang Denk
511d0c72b8 Coding style cleanup 2006-10-09 00:42:01 +02:00
Stefan Roese
f3443867e9 Add CONFIG_BOARD_RESET to configure board specific reset function
Patch by Stefan Roese, 07 Oct 2006
2006-10-07 11:30:52 +02:00
Stefan Roese
64cd52efd1 Merge with /home/stefan/git/u-boot/denx 2006-09-18 10:48:03 +02:00
Stefan Roese
854bc8da75 Add support for AMCC Rainier PPX440GRx eval board
Patch by Stefan Roese, 13 Sep 2006
2006-09-13 13:56:49 +02:00
Stefan Roese
2d658967e1 Fix build problem cpu/ppc4xx/ndfc.c
Patch by Stefan Roese, 07 Sep 2006
2006-09-07 13:09:53 +02:00
Stefan Roese
887e2ec9ec Add support for AMCC Sequoia PPC440EPx eval board
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
  in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
  please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
  in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
2006-09-07 11:51:23 +02:00
Wolfgang Denk
6741ae92f3 Merge with /home/m8/git/u-boot 2006-09-04 01:03:57 +02:00
Marian Balakowicz
f93286397e Add support for a saving build objects in a separate directory.
Modifications are based on the linux kernel approach and
support two use cases:

  1) Add O= to the make command line
  'make O=/tmp/build all'

  2) Set environement variable BUILD_DIR to point to the desired location
  'export BUILD_DIR=/tmp/build'
  'make'

The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'

Command line 'O=' setting overrides BUILD_DIR environent variable.

When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
2006-09-01 19:49:50 +02:00
Stefan Roese
2b393b0f0a PCIe endpoint support for AMCC Yucca 440SPe board
Patch by Tirumala R Marri, 26 Aug 2006
2006-08-29 08:05:15 +02:00
Wolfgang Denk
16850919ff Code cleanup 2006-08-27 18:10:01 +02:00
Stefan Roese
899620c2d6 Add initial support for the ALPR board from Prodrive
NAND needs some additional testing
Patch by Heiko Schocher, 15 Aug 2006
2006-08-15 14:22:35 +02:00
Wolfgang Denk
7213859d11 Merge with /home/raj/git/u-boot 2006-08-11 18:19:53 +02:00
Rafal Jaworowski
36b904a7fd Fix PCI-Express on PPC440SPe rev. A. 2006-08-11 12:35:52 +02:00
Wolfgang Denk
d10afb3916 Merge with /home/raj/git/u-boot 2006-08-10 15:40:49 +02:00
Rafal Jaworowski
692519b1ed Add support for PCI-Express on PPC440SPe (Yucca board). 2006-08-10 12:43:17 +02:00
Stefan Roese
a2c95a7224 PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance
AMCC suggested to set the PMU bit to 0 for best performace on
the PPC440 DDR controller.
Please see doc/README.440-DDR-performance for details.
Patch by Stefan Roese, 28 Jul 2006
2006-07-28 18:34:58 +02:00
Wolfgang Denk
b9365a26a1 Code cleanup 2006-07-21 11:56:05 +02:00
Wolfgang Denk
b87dfd2854 Add support for TB5200 board
The TB5200 ("Tinybox") is a small baseboard for the TQM5200 module
integrated in a little aluminium case.
Patch by Martin Krause, 8 Jun 2006

Some code cleanup
2006-07-19 13:50:38 +02:00
Marian Balakowicz
edd6cf20e1 Fix timer problems on AMCC yucca board.
Set Timer Clock Select to use CPU clock as a timer input source.
2006-07-06 21:17:24 +02:00
Marian Balakowicz
fbb0b559ae Add system memory to the PCI region list for AMCC PPC44x CPUs.
Enabled it for Yucca board.
2006-07-04 00:55:47 +02:00
Marian Balakowicz
fe84b48a94 Cleanup config file and bootup output for Yucca board. 2006-07-03 23:42:36 +02:00
Marian Balakowicz
bba6837732 Fix CONFIG_440_GX define usage. 2006-06-30 18:35:04 +02:00
Marian Balakowicz
f6e5739a68 Merge: Add support for AMCC 440SPe CPU based eval board (Yucca). 2006-06-30 18:19:42 +02:00
Marian Balakowicz
6c5879f380 Add support for AMCC 440SPe CPU based eval board (Yucca). 2006-06-30 16:30:46 +02:00
Stefan Roese
ed4633c93a Minor cleanup for PCS440EP board
Patch by Stefan Roese, 13 Jun 2006
2006-06-13 18:55:07 +02:00
Stefan Roese
a4c8d1389f Add support for PCS440EP board
Patch by Stefan Roese, 02 Jun 2006
2006-06-02 16:20:36 +02:00
Stefan Roese
5770a1e488 Fix problem in PVR detection for 440GR
Patch by Stefan Roese, 18 May 2006
2006-05-18 19:21:53 +02:00
Stefan Roese
512f8d5d78 Add support for AMCC 440EP Rev C and 440GR Rev B
Patch by John Otken, 08 May 2006
2006-05-10 14:10:41 +02:00
Wolfgang Denk
cf48eb9abd Some code cleanup 2006-04-16 10:51:58 +02:00
Wolfgang Denk
197b049b8b Merge with /home/sr/git/u-boot/4xx-sdram 2006-04-05 23:55:15 +02:00
Wolfgang Denk
d87080b721 GCC-4.x fixes: clean up global data pointer initialization for all boards. 2006-03-31 18:32:53 +02:00
Stefan Roese
62534beb2f Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
405 SDRAM: - The SDRAM parameters can now be defined in the board
             config file and the 405 SDRAM controller values will
             be calculated upon bootup (see PPChameleonEVB).
             When those settings are not defined in the board
             config file, the register setup will be as it is now,
             so this implementation should not break any current
             design using this code.

             Thanks to Andrea Marson from DAVE for this patch.

440 DDR:   - Added function sdram_tr1_set to auto calculate the
             TR1 value for the DDR.
           - Added ECC support (see p3p440).

Patch by Stefan Roese, 17 Mar 2006
2006-03-31 14:32:07 +02:00
Stefan Roese
f3fecfe6d7 Fix problem with updated PCI code in cpu/ppc4xx/405gp_pci.c
Patch by Stefan Roese, 13 Mar 2006
2006-03-13 09:43:01 +01:00