Commit graph

185 commits

Author SHA1 Message Date
Masahiro Yamada
47a79f657e usb: uniphier: remove UniPhier xHCI driver and select DM_USB
This driver has not been converted to Driver Model, and it is an
obstacle to migrate other block device drivers.  Remove it for now.

The UniPhier SoCs already use a DM-based EHCI driver, so now
ARCH_UNIPHIER can select DM_USB.

These two changes must be done atomically because removing the
legacy driver causes a build error.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2016-09-14 22:54:19 +09:00
Stephen Warren
6e06acb732 fdt: allow fdtdec_get_addr_size_*() to translate addresses
Some code may want to read reg values from DT, but from nodes that aren't
associated with DM devices, so using dev_get_addr_index() isn't
appropriate. In this case, fdtdec_get_addr_size_*() are the functions to
use. However, "translation" (via the chain of ranges properties in parent
nodes) may still be desirable. Add a function parameter to request that,
and implement it. Update all call sites to default to the original
behaviour.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Squashed in build fix from Stephen:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-08-12 09:20:27 -06:00
Boris Brezillon
4ccae81cda mtd: nand: Add the sunxi NAND controller driver
We already have an SPL driver for the sunxi NAND controller, now add
the normal/standard one.

The source has been copied from Linux 4.6 with a few changes to make
it work in u-boot.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
2016-07-24 20:36:28 -05:00
Simon Glass
920c6965d1 sandbox: Find keyboard driver using driver model
The cros-ec keyboard is always a child of the cros-ec node. Rather than
searching the device tree, looking at the children. Remove the compat string
which is now unused.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-11 14:06:44 -06:00
Simon Glass
39ea0ee925 fdt: x86: Tidy up a few COMPAT string definitions
The 'COMPAT_' part should appear only once so drop the duplicate part. It is
ignored anyway, but let's keep things consistent.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-07-11 14:06:44 -06:00
Simon Glass
01a227dfc8 fdt: Add a note to avoid adding new compatible strings
The list is shrinking and we should avoid adding new things. Instead, a
proper driver should be created with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-07-11 14:06:44 -06:00
Simon Glass
da9e0a9bab fdt: Drop unused exynos compatible strings
A few drivers have moved to driver model, so we can drop these strings.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-07-11 14:06:44 -06:00
Simon Glass
6cd2602d61 x86: fdt: Drop the unused compatible strings in fdtdec
We have drivers for several more devices now, so drop the strings which are
no-longer used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-07-11 14:06:44 -06:00
Simon Glass
703aaf76c2 fdt: Drop some unused compatible strings
We have driver-model drivers for some of these now, so drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-07-05 13:23:04 -07:00
Simon Glass
04b9dd10cc fdt: Correct return value in fdtdec_decode_display_timing()
This should return a non-zero value if there is a missing property. Update
the return value accordingly. The only expected error is -FDT_ERR_NOTFOUND.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-12 23:49:38 +02:00
Stephen Warren
39f633320c mmc: tegra: add basic Tegra186 support
Tegra186's MMC controller needs to be explicitly identified. Add another
compatible value for it.

Tegra186 will use an entirely different clock/reset control mechanism to
existing chips, and will use standard clock/reset APIs rather than the
existing Tegra-specific custom APIs. The driver support for that isn't
ready yet, so simply disable all clock/reset usage if compiling for
Tegra186. This must happen at compile time rather than run-time since the
custom APIs won't even be compiled in on Tegra186. In the long term, the
plan would be to convert the existing custom APIs to standard APIs and get
rid of the ifdefs completely.

The system's main eMMC will work without any clock/reset support, since
the firmware will have already initialized the controller in order to
load U-Boot. Hence the driver is useful even in this apparently crippled
state.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-31 11:22:59 -07:00
Simon Glass
69ca6fd850 x86: dts: Drop memory SPD compatible string
This is not needed now that the memory controller driver has the SPD data
in its own node.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17 10:27:27 +08:00
Simon Glass
779653b0cb x86: Drop all the old pin configuration code
We don't need this anymore - we can use device tree and the new pinconfig
driver instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17 10:27:25 +08:00
Simon Glass
fd30d2c608 dm: fdtdec: Correct a sandbox build warning
Adjust the cast to avoid a warning when stdint.h is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
2016-03-14 15:34:50 -06:00
Simon Glass
d76592122b tegra: nyan-big: Move the LCD driver to driver model
Adjust the driver to use driver model. The SOR becomes a bridge device. We
use the normal simple_panel driver to handle the display itself. We also
need to enable some options such as regulators, PWMs and DM_VIDEO itself.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16 09:17:51 -07:00
Peng Fan
1889a7e275 fdt: introduce fdtdec_get_child_count
Introduce fdtdec_get_child_count for get the number of subnodes
of one parent node.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2016-02-06 14:43:04 +01:00
Simon Glass
f8b4e45e31 x86: Drop the irq router compatible string
We use driver model for this now, so we don't need this string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:18 +08:00
Simon Glass
3ade5bc4dc dm: video: sandbox: Convert sandbox to use driver model for video
Now that driver model support is available, convert sandbox over to use it.
We can remove a few of the special hooks that sandbox currently has.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2016-01-20 19:10:16 -07:00
Tom Rini
4edde96111 Merge branch 'master' of git://git.denx.de/u-boot-x86 2016-01-14 21:51:32 -05:00
Bin Meng
394e0b6624 fdtdec: Add compatible string for Intel IvyBridge FSP
Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:14 +08:00
Simon Glass
fcc0a8774b dm: serial: Convert ns16550 driver to use driver model PCI API
Use the driver model version of the function to find the BAR. This updates
the fdtdec function, of which ns16550 is the only user.

The fdtdec_get_pci_bdf() function is dropped for several reasons:
- with driver model we should use 'struct udevice *' rather than passing the
   device tree offset explicitly
- there are no other users in the tree
- the function parses for information which is already available in the PCI
device structure (specifically struct pci_child_platdata which is available
at dev_get_parent_platdata(dev)

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-12 10:19:09 -07:00
Marek Vasut
ef4b01b2f7 arm: socfpga: Allow DWC2 UDC probing from OF
The USB gadget framework does not support DM yet, so add this bit
to let DWC2 UDC probe from OF on platforms which support it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Lukasz Majewski <l.majewski@majess.pl>
Cc: Lukasz Majewski <l.majewski@samsung.com>
2015-12-20 03:36:50 +01:00
Simon Glass
e81ca88451 dm: tegra: pci: Convert tegra boards to driver model for PCI
Adjust the Tegra PCI driver to support driver model and move all boards over
at the same time. This can make use of some generic driver model code, such
as the range-decoding logic.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
2015-12-01 06:26:36 -07:00
Simon Glass
f77f5e9be7 dm: tegra: Convert keyboard driver to driver model
Adjust the tegra keyboard driver to support driver model, using the new
uclass. Make this the default for all Tegra boards so that those that use
a keyboard will build correctly with this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19 20:13:40 -07:00
Stephen Warren
d9eda6c441 pci: tegra: add/enable support for Tegra210
This needs a separate compatible value from Tegra124 since the new HW
version has bugs that would prevent a driver for previous HW versions
from operating at all.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-11-12 09:21:05 -07:00
Simon Glass
1017296247 dm: spl: Support device tree when BSS is in a different section
At present in SPL we place the device tree immediately after BSS. This
avoids needing to copy it out of the way before BSS can be used. However on
some boards BSS is not placed with the image - e.g. it can be in RAM if
available.

Add an option to tell U-Boot that the device tree should be placed at the
end of the image binary (_image_binary_end) instead of at the end of BSS.

Note: A common reason to place BSS in RAM is to support the FAT filesystem.
We should update the code so that it does not use so much BSS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:52 +01:00
Simon Glass
3bc37a50e0 fdt: Add a function to look up a /chosen property
It is sometimes useful to find a property in the chosen node. Add a function
for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:51 +01:00
Stephen Warren
4ea5243a3a fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT
PCI addresses are always represented as 3 cells in DT. (one cell for bus
and device, and two cells for a 64-bit addres). This does not vary based
on either the physical address size of the CPU, nor any #address-cells
property in DT (or more precisely, #address-cells must be set to 3 in any
PCIe controller's node).

Fix fdtdec_get_pci_addr() to use conversion functions that operate on
(fixed) cell-sized data rather than (varying) physical-address-sized
data, so that the function works on 64-bit systems.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2015-10-23 09:42:28 -06:00
Przemyslaw Marczak
ff0a6358b6 fdtdec: fix parsing 'reg' property with zero value in '#size-cells'
After rework of lib/fdtdec.c by:

commit: 02464e3 fdt: add new fdt address parsing functions

the function fdtdec_get_addr() doesn't work as previous,
because the implementation assumes that properties '#address-cells'
and '#size-cells' are equal to 1, which can be not true sometimes.

The new API introduced fdtdec_get_addr_size_auto_parent() for the 'reg'
property parsing, but the implementation assumes, that #size-cells
can't be less than 1.

This causes that the following children's 'reg' property can't be reached:

parent@0x0 {
     #address-cells = <1>;
     #size-cells = <0>;
     children@0x100 {
         reg = < 0x100 >;
     };
};

Change the condition value from '1' to '0', which allows parsing property
with at least zero #size-cells, fixes the issue.

Now, fdtdec_get_addr_size_auto_parent() works properly.

Tested on: Odroid U3/X2, Trats, Trats2, Odroid XU3, Snow (by Simon).

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2015-10-03 14:39:19 +01:00
Stephen Warren
d93b9a0709 fdt: fix fdtdec_get_addr_size not to require any size cells
fdtdec_get_addr_size() may be used in two cases:
a) With sizep supplied, in which case both an address and a size are
parsed from DT. In this case, the DT property must be large enough to
contain both values.
b) With sizep NULL, in which case only an address is parsed from DT.
In this case, the DT property only need be large enough to contain this
address value. Commit 02464e386b "fdt: add new fdt address parsing
functions" broke this relaxed checking, and required the DT property to
contain both an address and a size value in all cases.

Fix fdtdec_get_addr_size() to vary ns based on whether the size value
is being parsed from the DT or not. This is safe since the function only
parses the first entry in the property, so the overall value of (na + ns)
need not be accurate, since it is never used to step through the property
data to find other entries. Besides, this fixed behaviour essentially
matches the original behaviour before the patch this patch fixes. (The
original code validated that the property was exactly the length of
either na or (na + ns), whereas the current code only validates that the
property is at least that long. For non-failure cases, the two behaviours
are identical).

Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Suchanek <hramrach@gmail.com>
Fixes: 02464e386b ("fdt: add new fdt address parsing functions")
Reported-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-03 14:39:19 +01:00
Stephen Warren
02464e386b fdt: add new fdt address parsing functions
fdtdec_get_addr_size() hard-codes the number of cells used to represent
an address or size in DT. This is incorrect in many cases depending on
the DT binding for a particular node or property (e.g. it is incorrect
for the "reg" property). In most cases, DT parsing code must use the
properties #address-cells and #size-cells to parse addres properties.

This change splits up the implementation of fdtdec_get_addr_size() so
that the core logic can be used for both hard-coded and non-hard-coded
cases. Various wrapper functions are implemented that support cases
where hard-coded cell counts should or should not be used, and where
the client does and doesn't know the parent node ID that contains the
properties #address-cells and #size-cells.

dev_get_addr() is updated to use the new functions.

Core functionality in fdtdec_get_addr_size_fixed() is widely tested via
fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and
dev_get_addr() by manually modifying the Tegra I2C driver to invoke them.

Much of the core implementation of fdtdec_get_addr_size_fixed(),
fdtdec_get_addr_size_auto_parent(), and
fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's
previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit".

Based-on-work-by: Thierry Reding <treding@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Suchanek <hramrach@gmail.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Dropped #define DEBUG at the top of fdtdec.c:
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-15 07:57:13 -06:00
Marek Vasut
129adf5bf4 mmc: dw_mmc: Probe the MMC from OF
Rework the driver to probe the MMC controller from Device Tree
and make it mandatory. There is no longer support for probing
from the ancient qts-generated header files.

This patch now also removes previous temporary workaround.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
2015-09-04 11:54:20 +02:00
Simon Glass
b697e0ff5b dm: tpm: Convert I2C driver to driver model
Convert the tpm_tis_i2c driver to use driver model and update boards which
use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-08-31 07:57:28 -06:00
Bin Meng
bc6351eb48 fdtdec: Fix possible infinite loop in fdtdec_get_pci_vendev()
When there is no valid compatible string in current list,
we should advance to next one in the compatible string list.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-26 07:54:13 -07:00
Masahiro Yamada
0f9258228e of: clean up OF_CONTROL ifdef conditionals
We have flipped CONFIG_SPL_DISABLE_OF_CONTROL.  We have cleansing
devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
away the ugly logic in include/fdtdec.h:

 #ifdef CONFIG_OF_CONTROL
 # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL)
 #  define OF_CONTROL 0
 # else
 #  define OF_CONTROL 1
 # endif
 #else
 # define OF_CONTROL 0
 #endif

Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute.  It refers to
CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for
SPL.

Also, we no longer have to cancel CONFIG_OF_CONTROL in
include/config_uncmd_spl.h and scripts/Makefile.spl.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-18 13:46:05 -04:00
Simon Glass
236efe36be Revert "fdt: Fix fdtdec_get_addr_size() for 64-bit"
This reverts commit 5b34436035.

This function has a few problems. It calls fdt_parent_offset() which as
mentioned in code review is very slow.

https://patchwork.ozlabs.org/patch/499482/
https://patchwork.ozlabs.org/patch/452604/

It also happens to break SPI flash on Minnowboard max which is how I noticed
that this was applied. I can send a patch to tidy that up, but in any case
I think we should consider a revert until the function is better implemented.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-14 10:00:52 -06:00
Andrew Bradford
f3b84a3032 x86: baytrail: Configure FSP UPD from device tree
Allow for configuration of FSP UPD from the device tree which will
override any settings which the FSP was built with itself.

Modify the MinnowMax and BayleyBay boards to transfer sensible UPD
settings from the Intel FSPv4 Gold release to the respective dts files,
with the condition that the memory-down parameters for MinnowMax are
also used.

Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay
Fixed lines >80col
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-14 03:24:21 -06:00
Marek Vasut
6ab00db226 arm: socfpga: misc: Reset ethernet from OF
Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc
hardcoded values in the U-Boot code. Since we don't have a proper reset
framework in place yet, we have to do this slightly ad-hoc parsing of the
OF tree instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2015-08-08 14:14:08 +02:00
Simon Glass
5ae3a5e887 dts: Drop unused compatible ID for the NXP video bridge
This has moved to driver model so we can drop the fdtdec support.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:17 -06:00
Simon Glass
68964dbc83 video: Remove the old parade driver
We have a new one which uses driver model and device tree configuration.
Remove the old one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:16 -06:00
Simon Glass
05bccbcd76 power: Remove old TPS65090 drivers
Remove the old drivers (both the normal one and the cros_ec one) now that
we have new drivers that use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:16 -06:00
Masahiro Yamada
3bd926cc7e lib: fdt: fix indent of #ifdef..#endif conditional
Match the depth of indentation between #ifdef and #endif
for better readability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-05 08:42:39 -06:00
Tom Warren
7aaa5a60ce ARM: Tegra210: Add support to common Tegra source/config files
Derived from Tegra124, modified as appropriate during T210
board bringup. Cleaned up debug statements to conserve
string space, too. This also adds misc 64-bit changes
from Thierry Reding/Stephen Warren.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-07-28 10:30:20 -07:00
Thierry Reding
5b34436035 fdt: Fix fdtdec_get_addr_size() for 64-bit
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-07-28 10:30:17 -07:00
Simon Glass
cb5f97f707 fdt: Provide debug info when a device tree cannot be found
It can be quite confusing with a new platform to figure out why the device
tree cannot be located. Add some debug information for this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:28 -06:00
Simon Glass
c4af6732c4 lib: Add function to extract a number from the end of a string
Split out the code in fdtdec which finds a number at the end of a string. It
can be useful in other situations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:28 -06:00
Haikun Wang
b1d9e46a0b fdt: armv8: Fix build warnings on armv8
Fix below build warnings on armv8,
drivers/spi/fsl_dspi.c: In function ‘fsl_dspi_ofdata_to_platdata’:
drivers/spi/fsl_dspi.c:667:2:
warning: format ‘%x’ expects argument of type ‘unsigned int’,
	but argument 2 has type ‘fdt_addr_t’ [-Wformat=]
debug("DSPI: regs=0x%x, max-frequency=%d, endianess=%s, num-cs=%d\n",
		    ^
lib/fdtdec.c: In function ‘fdtdec_get_addr_size’:
lib/fdtdec.c:105:4:
warning: format ‘%lx’ expects argument of type ‘long unsigned int’,
but argument 3 has type ‘fdt_size_t’ [-Wformat=]
debug("addr=%08lx, size=%08lx\n",
			    ^

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-20 07:21:47 -06:00
Simon Glass
257bfd2e21 dm: usb: tegra: Drop legacy USB code
Drop the code that doesn't use driver model for USB.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Gabriel Huau
5318f18d2c x86: gpio: add pinctrl support from the device tree
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.

Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
2015-06-04 03:32:08 -06:00
Bin Meng
9c7dea602e x86: Refactor PIRQ routing support
PIRQ routing is pretty much common in Intel chipset. It has several
PIRQ links (normally 8) and corresponding registers (either in PCI
configuration space or memory-mapped IBASE) to configure the legacy
8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing
support using device tree and move it to a common place, so that we
can easily add PIRQ routing support on a new platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-06-04 02:39:39 -06:00