Commit graph

270 commits

Author SHA1 Message Date
Minkyu Kang
399e5ae0d0 s5pc1xx: support Samsung s5pc1xx SoC
This patch adds support for the Samsung s5pc100 and s5pc110
SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
2009-10-13 21:13:55 -05:00
Sandeep Paulraj
00e1665a3c TI: DaVinci: GPIO header file and definitions
Some DaVinci SOC's use GPIOs to enable EMAC and DM9000.
This patch adds some definitions for GPIO registers and also adds
structures for GPIO.
A separate header file is being added so that in future we
can have a DaVinci GPIO driver similer to OMAP.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:37 -05:00
Sandeep Paulraj
95ae803afb TI: DaVinci DM646x: Update flag used to represent DM646x SOC's
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
CONFIG_SOC_DM646x to represent DM646x specific code.
This patch changes occurrences of CONFIG_SOC_DM646x to
CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
the flag CONFIG_SOC_DM644X. We want some uniformity.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:37 -05:00
Dirk Behme
9de0212bd7 OMAP3 MMC: Fix warning dereferencing type-punned pointer
Fix warning
Dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Steve Sakoman <sakoman@gmail.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:36 -05:00
Sandeep Paulraj
7908c97a10 TI DaVinci: DM646x: Initial Support for DM646x SOC
DM646x is an SOC from TI which has both an ARM and a DSP.
There are multiple variants of the SOC mainly dealing with different
core speeds.
This patch adds the initial framework for the DM646x SOC.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-13 06:17:34 -05:00
Tom Rix
7a2aa8b681 OMAP3 Move cache routine to cache.S
v7_flush_dcache_all, because it depends on omap ROM code is not
generic.  Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.

Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S.  This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.

The conversion from cache.c to cache.S was done most through
disassembling the uboot binary.  The only significant change was
to change the comparision for the return of get_cpu_rev from

   cmp	r0, #0
   beq	earlier_than_label

Which was lost information to

   cmp	r0, #CPU_3XX_ES20
   blt	earlier_than_label

The paths through the enable routine were verified by
adding an infinite loop and seeing the hang.  Then
removing the infinite loop and seeing it continue.

The disable routine is similar enough that it was not
tested with this method.

Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:33 -05:00
Peter Tyser
0630535e2d arm/microblaze/nios/nios2/sh: Remove relocation fixups
These architectures don't need relocation fixups, so reduce their
codesize a bit by defining CONFIG_RELOC_FIXUP_WORKS.

Also remove the reloc_off field from their global data structures
as it is no longer needed.

Note that the location of the standalone application jump table pointer
in the global data structure is affected by this change, breaking
execution of standalone applications compiled for previous versions of
U-Boot. We will therefore increment XF_VERSION in the next commit,
which also touches this area.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 10:17:57 +02:00
Simon Kagstrom
0413cfecea Correct ffs/fls regression for PowerPC etc
Commits

  02f99901ed
  52d61227b6

introduced a regression where platform-specific ffs/fls implementations
were defined away. This patch corrects that by using PLATFORM_xxx
instead of the name itself.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
2009-09-17 22:45:31 +02:00
Simon Kagstrom
a6e19d69f6 arm: Define test_and_set_bit and test_and_clear bit for ARM
Needed for (e.g.) ubifs support to work.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-09-15 22:35:20 +02:00
Simon Kagstrom
4b15de08fe arm: Make arm bitops endianness-independent
Bring over the bitop implementations from the Linux
include/asm-generic/bitops/non-atomic.h to provide
endianness-independence.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-09-15 22:34:04 +02:00
Simon Kagstrom
02f99901ed Move __set/clear_bit from ubifs.h to bitops.h
__set_bit and __clear_bit are defined in ubifs.h as well as in
asm/include/bitops.h for some architectures. This patch moves
the generic implementation to include/linux/bitops.h and uses
that unless it's defined by the architecture.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-09-15 22:31:24 +02:00
Wolfgang Denk
3ea43ff773 Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-09-07 23:12:46 +02:00
Wolfgang Denk
9f23ca42b3 ARM: Update mach-types
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-09-04 23:20:29 +02:00
Prafulla Wadaskar
49d2cb4d61 arm: Kirkwood: add SYSRSTn Duration Counter Support
This feature can be used to trigger special command "sysrstcmd" using
reset key long press event and environment variable "sysrstdelay" is set
(useful for reset to factory or manufacturing mode execution)

Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
When SYSRSTn is asserted low, a SYSRSTn duration counter is running.
The counter value is stored in the SYSRSTn Length Counter Register
The counter is based on the 25-MHz reference clock (40ns)
It is a 29-bit counter, yielding a maximum counting duration of
2^29/25 MHz (21.4 seconds). When the counter reach its maximum value,
it remains at this value until counter reset is triggered by setting
bit 31 of KW_REG_SYSRST_CNT

Implementation:
Upon long reset assertion (> ${sysrstdelay} in secs) sysrstcmd will be
executed if pre-defined in environment variables.
This feature will be disabled if "sysrstdelay" variable is unset.

for-ex.
setenv sysrst_cmd "echo starting factory reset;
		   nand erase 0xa0000 0x20000;
		   echo finish ed sysrst command;"
will erase particular nand sector if triggered by this event

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-09-01 22:34:03 +02:00
Ilya Yanok
10bc241dfc imx27lite: add support for imx27lite board from LogicPD
This patch adds support for i.MX27-LITEKIT development board from
LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND
flash, FEC ethernet controller integrated into i.MX27.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-09-01 22:10:55 +02:00
Simon Kagstrom
f3d4f8870e Remove duplicate set_cr
Remove duplicate set_cr

set_cr is defined in both asm-arm/proc-armv/system.h and
include/asm-arm/system.h. This patch removes it (and some duplicate
defines) from the former.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-09-01 22:08:46 +02:00
Sandeep Paulraj
77b351cd0f NAND: DaVinci: V2 Adding 4 BIT ECC support
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-26 15:37:03 -05:00
Ben Goska
8fa656aa52 omap3: Fixed a problem with hwecc
In commit 187af954cf there
was a typo that offset all the ecc registers by 4 bytes, fixed that.

Signed-off-by: Ben Goska <goskab@onid.oregonstate.edu>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-18 13:51:30 +02:00
Wolfgang Denk
4af34177b6 Monahans: avoid floating point calculations
Current code for the Monahans CPU defined OSCR_CLK_FREQ as 3.250 (MHz)
which caused floating point operations to be used. This resulted in
unresolved references to some FP related libgcc functions when using
U-Boot's private libgcc functions.

Change the code to use fixed point math only.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-17 23:53:41 +02:00
Dirk Behme
cd3dcba142 OMAP3: Fix missing GPMC_CONFIG_CS0_BASE
Applying two indepenent OMAP3 patches resulted in missing
GPMC_CONFIG_CS0_BASE. Patch "omap3: embedd gpmc_cs into gpmc
config struct" removes GPMC_CONFIG_CS0_BASE, independent patch
"omap3: bug fix for NOR boot support" introduces it's usage.
Re-introduce GPMC_CONFIG_CS0_BASE.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-10 00:12:43 +02:00
Ilya Yanok
ba3dbaf281 mxc-mmc: sdhc host driver for MX2 and MX3 proccessor
This is a port of Linux driver for SDHC host controller hardware
found on Freescale's MX2 and MX3 processors. Uses new generic MMC
framework (CONFIG_GENERIC_MMC) and it looks like there are some
problems with a framework (at least on LE cpus). Some of these
problems are addressed in the following patches.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2009-08-09 23:47:38 +02:00
Alessandro Rubini
642d7b63c3 kirkwood/gpio.h: remove duplicate definition
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
2009-08-09 23:46:45 +02:00
Dirk Behme
a3d1421dfd omap3: use only fixed-size types inside ctrl_structs
replace variable types in ctrl_structs for omap3 by those with
fixed size (u8, u16, u32).
Additional ifndef-protection is needed by examples which do not
compile when including asm/types.h

Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:36:29 +02:00
Dirk Behme
97a099eaa4 omap3: remove typedefs for configuration structs
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:33:23 +02:00
Matthias Ludwig
187af954cf omap3: embedd gpmc_cs into gpmc config struct
Embedd chip select configuration into struct for gpmc config
instead of having it completely separated as suggested by
Wolfgang Denk on
http://lists.denx.de/pipermail/u-boot/2009-May/052247.html

Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
2009-08-07 23:31:51 +02:00
David Hunter
301b7db88f pxa: Fix typo in GCDR(x)
Fix a typo in the GCDR(x) macro. It's a good thing no one was using it.

Signed-off-by: David Hunter <hunterd42@gmail.com>
2009-08-01 16:06:26 +02:00
Alessandro Rubini
60cbfbfd0f arm nomadik: add gpio support
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-29 09:57:46 +02:00
Tom Rix
549b98306d OMAP3 Remove twl4030 defines
These defines have been subplanted by the equivelent defines in
include/twl4030.h

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-07-29 09:57:45 +02:00
Tom Rix
7f79dfb48b OMAP I2C Fix the sampling clock.
This problem is seen on Zoom1 and Zoom2 in the startup and
when i2c probe is used

Before :

In:    serial
Out:   serial
Err:   serial
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_pin: I2C_STAT=1000
I2C read: I/O error
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot:  0
OMAP3 Zoom1# i2c probe
Valid chip addresses:timed out in wait_for_bb: I2C_STAT=1000
 02 03 04 05 06 07 08 09 0A 0B 0C 0D <snip>

After :

In:    serial
Out:   serial
Err:   serial
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot:  0
OMAP3 Zoom1# i2c probe
Valid chip addresses: 48 49 4A 4B

The addresses are for the twl4030.

The prescalar that converts the function clock to the sampling
clock is hardcoded to 0.  The reference manual recommends 7
if the function clock is 96MHz.

Instead of just changing the hardcoded values, the prescalar
is calculated from the value I2C_IP_CLK.

The i2c #defines are in kHz.  The speed passed into the
i2c init routine is in Hz.  To be consistent, change the
defines to be in Hz.

The timing calculations are based on what is done in the
linux 2.6.30 kernel in drivers/i2c/buses/i2c_omap.c as
apposed to what is done in TRM.

The major variables in the timing caculations are
specified as #defines that can be overriden as required.

The variables and their defaults are

I2C_IP_CLK				SYSTEM_CLOCK_96
I2C_INTERNAL_SAMPLING_CLK		19200000
I2C_FASTSPEED_SCLL_TRIM			6
I2C_FASTSPEED_SCLH_TRIM			6
I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM	I2C_FASTSPEED_SCLH_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLH		I2C_FASTSPEED_SCLH_TRIM

This was runtime verified on Zoom1, Zoom2, Beagle and Overo.
The 400kHz and 3.4M cases were verifed on test Zoom1,
Zoom2, Beagle and Overo configurations.

Testing for omap2 will be done in a second step as Nishanth
and Jean-Christophe commented.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-07-28 08:52:33 +02:00
Heiko Schocher
57215cd2e5 arm, kirkwood: added kw_gpio_set_valid() in gpio.h
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-23 00:20:33 +02:00
Dieter Kiermaier
ec16441085 Kirkwood: add Marvell Kirkwood gpio driver
Signed-off-by: Dieter Kiermaier <dk-arm-linux@gmx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Heiko Schocher <hs@denx.de>
2009-07-23 00:19:28 +02:00
Heiko Schocher
688b6a0ff2 arm, kirkwood: added KW_TWSI_BASE in kirkwood.h
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-23 00:16:18 +02:00
Simon Kagstrom
8bf29b59fc Add unaligned.h for arm
This patch adds unaligned.h for ARM (needed to build with LZO
compression). The file is taken from the linux kernel, but includes
u-boot headers instead.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
2009-07-19 11:56:34 +02:00
Wolfgang Denk
6973fb414c Merge branch 'asm-generic' of git://git.denx.de/u-boot-microblaze 2009-07-16 21:53:15 +02:00
Wolfgang Denk
c3ae126c2c Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-07-13 23:45:02 +02:00
Sedji Gaouaou
5ccc2d99d6 at91: Introduction of at91sam9g10 SOC.
AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a
faster clock speed: 266/133MHz.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
2009-07-12 17:56:11 +02:00
Sedji Gaouaou
22ee647380 at91: Introduction of at91sam9g45 SOC.
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.

The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES.
On the board you can find 2 USART, USB high speed,
a 480*272 LG lcd, ethernet, gpio/joystick/buttons.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
2009-07-12 17:43:34 +02:00
Daniel Mack
c33c5990ce pxa: fix CKEN_B register bits
The current defition for CKEN_B register bits is nonsense. Adding 32 to
the shifted value is equal to '| (1 << 5)', and this bit is marked
'reserved' in the PXA docs.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
2009-07-12 17:43:32 +02:00
Daniel Mack
bd876be46f pxa: add clock for system bus 2 arbiter
This clock is needed for systems using the USB2 device unit or the 2d
graphics accelerator.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
2009-07-12 17:43:31 +02:00
Prafulla Wadaskar
b996165f5a arm: Kirkwood: bugfix: UART1 bar correction
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-12 17:43:15 +02:00
Michal Simek
bc0d3296f1 asm-generic: Consolidate errno.h to asm-generic/errno.h
This patch use blackfin errno.h implementation which
correspond Linux kernel one.

MIPS implemetation is different that's why I keep it.

I removed ppc_error_no.h from Marvell boards which
was the same too.

I have got ack from ppc40x, blackfin, arm, coldfire and avr custodians.

Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-09 14:07:11 +02:00
David Brownell
154b5484ac davinci_nand chipselect/init cleanup
Update chipselect handling in davinci_nand.c so that it can
handle 2 GByte chips the same way Linux does:  as one device,
even though it has two halves with independent chip selects.
For such chips the "nand info" command reports:

  Device 0: 2x nand0, sector size 128 KiB

Switch to use the default chipselect function unless the board
really needs its own.  The logic for the Sonata board moves out
of the driver into board-specific code.  (Which doesn't affect
current build breakage if its NAND support is enabled...)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:03 -05:00
Sandeep Paulraj
496863b244 NAND DaVinci: Update to ALE/CLE Mask values
All DaVinci SOC's use a CLE mask of 0x10 and an ALE mask of 0x8
except the DM646x. This was decided by the design team driving the design.
This patch updates the CLE and ALE values for DM646x.
Updated patches for DM646x will be sent shortly.
This applies to u-boot-nand-flash git

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:02 -05:00
Sandeep Paulraj
0c1684437e ARM DaVinci: Changing ALE Mask Value
The ALE mask used by DaVinci SOCs is wrong. The patch changes the mask value
from '0xa' to '0x8'. This is the mask we use for all TI releases.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:02 -05:00
David Brownell
6e29ed8e57 davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)
Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option.  It's not just nasty;
it's also unused by any current boards, and doesn't even match the
main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
on newer chips that support it).

DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
match non-BROKEN code paths for 1-bit HW ECC.  The BROKEN code paths
do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
and 5.0/2.6.18) do ... but only for small pages.  Large page support
is really broken (and it's unclear just what software it was trying
to match!), and the ECC layout was making three more bytes available
for use by filesystem (or whatever) code.

Since this option itself seems broken, remove it.  Add a comment
about the MV/TI compat issue, and the most straightforward way to
address it (should someone really need to solve it).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:01 -05:00
David Brownell
fcb7747775 davinci_nand: cleanup I (minor)
Minor cleanup for DaVinci NAND code:

 - Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
   be defined when there are multiple chipselect lines in use
   (as with common 2 GByte chips).

 - Cleanup handling of EMIF control registers
    * Only need one pointer pointing to them
    * Remove incorrect and unused struct supersetting them

 - Use the standard waitfunc; we don't need a custom version

 - Partial legacy cleanup:
    * Don't initialize every board like it's a DM6446 EVM
    * #ifdef a bit more code for BROKEN_ECC

Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:44:55 -05:00
Wolfgang Denk
8e5e9b940c Coding style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-07 22:35:02 +02:00
Magnus Lilja
d08e5ca301 MX31: Add NAND SPL boot support to i.MX31 PDK board.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2009-07-06 21:53:18 +02:00
Prafulla Wadaskar
78eabb90b7 arm: Kirkwood: arch specific updated for ehci-Kirkwood driver support
This patch abstracts Kirkwood arch specific changes to support ehci-kirkwood driver

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-06 21:53:15 +02:00
Alessandro Rubini
095a460b49 arm nomadik: use 1000 as HZ value and rewrite timer code
This sets CONFIG_SYS_HZ to 1000 as required, and completely rewrites
timer code, which is now both correct and much smaller.  Unused
functions like udelay_masked() have been removed as no driver uses
them, even the ones that are not currently active for this board.
mtu.h is copied literally from the kernel sources.

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:53:08 +02:00