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at91: Introduction of at91sam9g10 SOC.

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AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a
faster clock speed: 266/133MHz.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
This commit is contained in:
Sedji Gaouaou 2009-06-25 17:04:15 +02:00 committed by Jean-Christophe PLAGNIOL-VILLARD
parent 22ee647380
commit 5ccc2d99d6
8 changed files with 66 additions and 6 deletions
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1
MAINTAINERS
View file

@ -548,6 +548,7 @@ Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
meesc ARM926EJS (AT91SAM9263 SoC)
Sedji Gaouaou<sedji.gaouaou@atmel.com>
at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC)
at91sam9m10g45ek ARM926EJS (AT91SAM9G45 SoC)
Marius Gröger <mag@sysgo.de>

3
MAKEALL
View file

@ -586,8 +586,9 @@ LIST_at91=" \
at91sam9260ek \
at91sam9261ek \
at91sam9263ek \
at91sam9m10g45ek \
at91sam9g10ek \
at91sam9g20ek \
at91sam9m10g45ek \
at91sam9rlek \
cmc_pu2 \
csb637 \

14
Makefile
View file

@ -2743,12 +2743,22 @@ at91sam9xeek_config : unconfig
at91sam9261ek_nandflash_config \
at91sam9261ek_dataflash_cs0_config \
at91sam9261ek_dataflash_cs3_config \
at91sam9261ek_config : unconfig
at91sam9261ek_config \
at91sam9g10ek_nandflash_config \
at91sam9g10ek_dataflash_cs0_config \
at91sam9g10ek_dataflash_cs3_config \
at91sam9g10ek_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring 9g10,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9G10EK 1" >>$(obj)include/config.h ; \
$(XECHO) "... 9G10 Variant" ; \
else \
echo "#define CONFIG_AT91SAM9261EK 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
$(XECHO) "... with environment variable in NAND FLASH" ; \
elif [ "$(findstring dataflash_cs3,$@)" ] ; then \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \
$(XECHO) "... with environment variable in SPI DATAFLASH CS3" ; \
else \

36
board/atmel/at91sam9261ek/at91sam9261ek.c
View file

@ -57,6 +57,16 @@ static void at91sam9261ek_nand_hw_init(void)
csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* Configure SMC CS3 for NAND/SmartMedia */
#ifdef CONFIG_AT91SAM9G10EK
at91_sys_write(AT91_SMC_SETUP(3),
AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3),
AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(7) |
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(7));
at91_sys_write(AT91_SMC_CYCLE(3),
AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
#else
at91_sys_write(AT91_SMC_SETUP(3),
AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
@ -65,6 +75,7 @@ static void at91sam9261ek_nand_hw_init(void)
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
at91_sys_write(AT91_SMC_CYCLE(3),
AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
#endif
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
@ -92,6 +103,21 @@ static void at91sam9261ek_nand_hw_init(void)
static void at91sam9261ek_dm9000_hw_init(void)
{
/* Configure SMC CS2 for DM9000 */
#ifdef CONFIG_AT91SAM9G10EK
at91_sys_write(AT91_SMC_SETUP(2),
AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(3) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(2),
AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(8) |
AT91_SMC_NRDPULSE_(6) | AT91_SMC_NCS_RDPULSE_(8));
at91_sys_write(AT91_SMC_CYCLE(2),
AT91_SMC_NWECYCLE_(20) | AT91_SMC_NRDCYCLE_(20));
at91_sys_write(AT91_SMC_MODE(2),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
AT91_SMC_TDF_(1));
#else
at91_sys_write(AT91_SMC_SETUP(2),
AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
@ -105,6 +131,7 @@ static void at91sam9261ek_dm9000_hw_init(void)
AT91_SMC_EXNWMODE_DISABLE |
AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
AT91_SMC_TDF_(1));
#endif
/* Configure Reset signal as output */
at91_set_gpio_output(AT91_PIN_PC10, 0);
@ -169,7 +196,11 @@ static void at91sam9261ek_lcd_hw_init(void)
at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1);
#ifdef CONFIG_AT91SAM9G10EK
gd->fb_base = CONFIG_AT91SAM9G10_LCD_BASE;
#else
gd->fb_base = AT91SAM9261_SRAM_BASE;
#endif
}
#ifdef CONFIG_LCD_INFO
@ -207,8 +238,13 @@ int board_init(void)
/* Enable Ctrlc */
console_init_f();
#ifdef CONFIG_AT91SAM9G10EK
/* arch number of AT91SAM9G10EK-Board */
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G10EK;
#else
/* arch number of AT91SAM9261EK-Board */
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK;
#endif
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;

1
cpu/arm926ejs/at91/Makefile
View file

@ -29,6 +29,7 @@ COBJS-$(CONFIG_AT91CAP9) += at91cap9_devices.o
COBJS-$(CONFIG_AT91SAM9260) += at91sam9260_devices.o
COBJS-$(CONFIG_AT91SAM9G20) += at91sam9260_devices.o
COBJS-$(CONFIG_AT91SAM9261) += at91sam9261_devices.o
COBJS-$(CONFIG_AT91SAM9G10) += at91sam9261_devices.o
COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o
COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o
COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o

2
doc/README.at91
View file

@ -27,7 +27,7 @@ Environment variables
------------------------------------------------------------------------------
AT91SAM9261EK
AT91SAM9261EK, AT91SAM9G10EK
------------------------------------------------------------------------------
Memory map

2
include/asm-arm/arch-at91/hardware.h
View file

@ -23,7 +23,7 @@
#define AT91_BASE_SPI AT91SAM9260_BASE_SPI0
#define AT91_ID_UHP AT91SAM9260_ID_UHP
#define AT91_PMC_UHP AT91SAM926x_PMC_UHP
#elif defined(CONFIG_AT91SAM9261)
#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10)
#include <asm/arch/at91sam9261.h>
#define AT91_BASE_SPI AT91SAM9261_BASE_SPI0
#define AT91_ID_UHP AT91SAM9261_ID_UHP

13
include/configs/at91sam9261ek.h
View file

@ -32,8 +32,11 @@
#define CONFIG_SYS_HZ 1000
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
#ifdef CONFIG_AT91SAM9G10EK
#define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/
#else
#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
#define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */
#endif
#define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
@ -62,7 +65,11 @@
#define CONFIG_LCD_INFO_BELOW_LOGO 1
#define CONFIG_SYS_WHITE_ON_BLACK 1
#define CONFIG_ATMEL_LCD 1
#ifdef CONFIG_AT91SAM9261EK
#define CONFIG_ATMEL_LCD_BGR555 1
#else
#define CONFIG_AT91SAM9G10_LCD_BASE 0x23E00000 /* LCD is no more in SRAM */
#endif
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
/* LED */
@ -147,7 +154,11 @@
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
#ifdef CONFIG_AT91SAM9G10EK
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
#else
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
#endif
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE 1
#define CONFIG_CMD_FAT 1