Commit graph

49985 commits

Author SHA1 Message Date
Praneeth Bajjuri
cd30f3fc9e arm: dra76: fastboot: extend cpu type for getvar command
'commit dda0bd674481 ("arm: dra762: Add support for device package identification")'
introduces ABZ and ACD package identification.

This patch is to extend usage of "fastboot getvar cpu" for
DRA76x ABZ and ACD devices.

Helps in fixing the boot warning.

Warning: fastboot.cpu: unknown CPU rev: 123863298
on
CPU  : DRA762-GP ES1.0 ABZ package
Model: TI AM5748 IDK
Board: AM574x IDK REV 1.0A

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-08 09:07:37 -04:00
Ludovic Desroches
eb85cc10b4 defconfig: at91-sama5d2_ptc_ek: remove unused SYS_EXTRA_OPTIONS
Remove SYS_USE_NANDFLASH, SYS_USE_MMC as they are deprecated and
unused.
The board configurations already use CONFIG_SD_BOOT and
CONFIG_NAND_BOOT respectively.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[eugen.hristev@microchip.com: rework on latest u-boot]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Eugen Hristev
528a42a795 board: sama5d27_som1_ek: Fix the USB vbus power
According to the REVB schematic, fix the USB vbus power enable pin.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Eugen Hristev
72281cbcf8 configs: at91: sama5: updated mtdparts variable in bootargs
We have a new demo layout of our sama5 boards for the NAND Flash
memory.
According to this new layout, adjust the mtdparts variable in bootargs
to align with this, which is available at :
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d3XplainedMainPage#NAND_Flash_demo_Memory_map,

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Eugen Hristev
23dd6015ce board: sama5d2_ptc_ek: adjust the smc timings of nand
To fix the issue of write the rootfs.ubi, adjust the smc timings
configuration of the nand controller.

Based on original work by Wenyou Yang

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-05-08 09:07:36 -04:00
Ludovic Desroches
8ee54672df gpio: atmel_pio4: give a full configuration when muxing pins
When a pin is muxed to a peripheral or as a GPIO, the only
configuration that can be set is the pullup. It is too restrictive
so this patch allows to give a full configuration.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:36 -04:00
Ludovic Desroches
9ab66d0d20 board: atmel: sama5d2_ptc_ek: update pin configuration for NAND
The drive strength has to be set to medium for the NAND data lines.
With a low drive, we can get some data corruption.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:35 -04:00
Ludovic Desroches
cbccb33584 gpio: atmel_pio4: add drive strength macros
Macros for drive strength configuration were missing.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-05-08 09:07:35 -04:00
Ley Foon Tan
7c45862f22 pci: intel: Add Intel FPGA PCIe controller driver
Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in
rootport mode only, the EP mode is not supported. The driver is tested
with the Intel e1000e NIC driver.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-08 09:07:35 -04:00
Michalis Pappas
666028fc7c arm64: Add SMC and HVC commands
This patch adds smc and hvc commands, that allow issuing Secure Monitor
Calls and Hypervisor Calls conforming to the ARM SMC Calling Convention.

Add Kconfig items to allow each command can be individually enabled.

Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-08 09:07:35 -04:00
Neil Armstrong
42de652272 pinctrl: meson: Update pinmux with new Linux bindings
The pinctrl bindings has changed for Amlogic Meson SoCs since Linux 4.13,
update the pinctrl driver to take this in account.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Neil Armstrong
7d750c3520 ARM64: meson: Sync DT and Bindings with Linux 4.16
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.16.0.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Neil Armstrong
f0f3762cb7 ARM: meson: rename GXBB to GX
Taking into account the Amlogic Family name starts with GX, including
the GXBB, GXL and GXM SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-08 09:07:34 -04:00
Patrice Chotard
8b41464547 clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock
On all STM32F4 and F7 SoCs  family (except STM32F429), PLLSAI
output P can be used as 48MHz clock source for USB and SDMMC.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tested By: Bruno Herrera <bruherrera@gmail.com>
2018-05-08 09:07:34 -04:00
Patrick Bruenn
274fb461f4 dm: led: add testcase for "default-state" property
Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.

dm: led: add testcase for "default-state" property

Add two more gpio-leds to sandbox test device tree with default-state
property set to "on"/"off".
Add dm_test_led_default_state() to check that these new LED's are set to
LEDST_ON and LEDST_OFF.

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08 09:07:33 -04:00
Patrick Bruenn
bc882f5d5c dm: led: auto probe() LEDs with "default-state"
To avoid board specificy LED activation code, automatically
activate gpio-leds with "default-state" property during bind().

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08 09:07:33 -04:00
Patrick Bruenn
d90f0d4cae dm: led: Support "default-state" property
Add support for the device tree property "default-state". This feature
might be useful for LEDs indicating "power on" or similar states.

Note: Even with this commit gpio-leds remain in reset state. That's
because the led_gpio is not probed until DM_FLAG_ACTIVATED is set.

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-05-08 09:07:33 -04:00
Jassi Brar
732bc7ce3f mmc: support writing sparse images
Provide an alternate path for sparse-images to be
written to MMC. For example, via tftp on platforms
that don't support fastboot protocol. Or when an
image is to written at some offset, rather than the
start of a partition.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
[trini: Guard with CONFIG_FASTBOOT_FLASH tests, use LBAF for lbaint_t
        printing]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-08 09:06:33 -04:00
Jassi Brar
2f83f219bf fastboot: sparse: make write_sparse_image useable for non-fastboot
write_sparse_image could be useful for non-fastboot users.
For ex a platform, without usb-device/fastboot support, could
get sparse images over tftp and write using the mmc command.
Or non-android systems could also leverage the sparse format.

Towards that, this patch removes anything fastboot specific from
the write_sparse_image implementation. Which includes making the
function return integer as error code and calls for fastboot logging
via an optional callback function 'mssg'.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-05-07 20:57:51 -04:00
Jassi Brar
32d3154e5c fastboot: sparse: remove redundant argument to write_sparse_image
'sz' has no use for write_sparse_image, remove it simplifying the api.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-05-07 20:57:51 -04:00
Lokesh Vutla
a43d46a73c arm: v7R: Add support for enabling caches
Cache maintenance procedure is same for v7A and v7R
processors. So re-use cache-cp15.c file except for
mmu parts.

Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:53:29 -04:00
Lokesh Vutla
f2ef204312 arm: v7R: Add support for MPU
The Memory Protection Unit(MPU) allows to partition memory into regions
and set individual protection attributes for each region. In absence
of MPU a default map[1] will take effect. Add support for configuring
MPU on Cortex-R, by reusing the existing support for Cortex-M processor.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1002400.html

Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:53:29 -04:00
Michal Simek
4bbd6b1d94 arm: v7R: Add initial support
The Cortex-R* processors are a mid-range CPUs for use in deeply-embedded,
real-time systems. It implements the ARMv7-R architecture, and includes
Thumb-2 technology for optimum code density and processing throughput.

Except for MPU(Memory Protection Unit) and few CP15 registers, most of the
features are compatible with v7 architecture. So,reuse the same armv7
folder and introduce a new config CPU_V7R in order to differentiate
from v7 based platforms.

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:28 -04:00
Lokesh Vutla
f4bcd767bd arm: v7: Kconfig: Introduce SYS_ARM_CACHE_CP15
Certain ARM architectures like ARMv7-A, ARMv7-R has support for
enabling caches using CP15 registers. To have a common support
for all these architectures, introduce a Kconfig symbol
SYS_ARM_CACHE_CP15 that selects cache-cp15.c

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:28 -04:00
Lokesh Vutla
7240b80ee0 arm: v7: Kconfig: Add entry for MMU
Add a Kconfig entry for MMU and imply for all platforms using
cache-cp15.c containing MMU setup. Using imply instead of select so that
MMU can be disabled by defconfigs when not needed.

Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:28 -04:00
Lokesh Vutla
acf1500138 arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A
Currently CPU_V7 kconfig symbol supports only ARMv7A architectures under
armv7 folder. This led to a misconception of creating separate folders
for armv7m and armv7r. There is no reason to create separate folder for
other armv7 based architectures when it can co-exist with few Kconfig
symbols.

As a first step towards a common folder, rename CPU_V7 as CPUV7A. Later
separate Kconfig symbols can be added for CPU_V7R and CPU_V7M and
can co exist in the same folder.

Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:53:24 -04:00
Lokesh Vutla
2a5180535c arm: v7: Update VBAR only if available
Not all ARM V7 based cpus has VBAR for remapping
vector base address. So, update VBAR only if it available.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
04ca871459 test: ofnode: test ofnode_device_is_compatible()
Test ofnode_device_is_compatible(), and also ofnode_path().

Requested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
99552c3435 test: regmap: test Linux-compatible syscon_node_to_regmap()
Like Linux, syscon_node_to_regmap() allows a node to work as a syscon
provider without binding it to a syscon driver.  Test this.

Requested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
e151a1c288 syscon: add Linux-compatible syscon API
The syscon implementation in U-Boot is different from that in Linux.
Thus, DT files imported from Linux do not work for U-Boot.

In U-Boot driver model, each node is bound to a dedicated driver
that is the most compatible to it.  This design gets along with the
concept of DT, and the syscon in Linux originally worked like that.

However, Linux commit bdb0066df96e ("mfd: syscon: Decouple syscon
interface from platform devices") changed the behavior because it is
useful to let a device bind to another driver, but still work as a
syscon provider.

That change had happened before U-Boot initially supported the syscon
driver by commit 6f98b7504f ("dm: Add support for generic system
controllers (syscon)").  So, the U-Boot's syscon works differently
from the beginning.  I'd say this is mis-implementation given that
DT is not oriented to a particular project, but Linux is the canon
of DT in practice.

The problem typically arises in the combination of "syscon" and
"simple-mfd" compatibles.

In Linux, they are orthogonal, i.e., the order between "syscon" and
"simple-mfd" does not matter at all.

Assume the following compatible.

   compatible = "foo,bar-syscon", "syscon", "simple-mfd";

In U-Boot, this device node is bound to the syscon driver
(driver/core/syscon-uclass.c) since the "syscon" is found to be the
most compatible.  Then, syscon_get_regmap() succeeds.

However,

   compatible = "foo,bar-syscon", "simple-mfd", "syscon";

does not work because this node is bound to the simple-bus driver
(drivers/core/simple-bus.c) in favor of "simple-mfd" compatible.
The compatible string "syscon" is just dismissed.

Moreover,

   compatible = "foo,bar-syscon", "syscon";

works like the first case because the syscon driver populates the
child devices.  This is wrong because populating children is the job
of "simple-mfd" (or "simple-bus").

This commit ports syscon_node_to_regmap() from Linux.  This API
does not require the given node to be bound to a driver in any way.

Reported-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07 15:49:52 -04:00
Masahiro Yamada
d35812368a regmap: change regmap_init_mem() to take ofnode instead udevice
Currently, regmap_init_mem() takes a udevice. This requires the node
has already been associated with a device. It prevents syscon/regmap
from behaving like those in Linux.

Change the first argumenet to take a device node.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:51 -04:00
Masahiro Yamada
5ccc2c2130 dm: ofnode: add ofnode_device_is_compatible() helper
device_is_compatible() takes udevice, but there is no such a helper
that takes ofnode.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-07 15:49:51 -04:00
Masahiro Yamada
8c1de5e08b regmap: clean up regmap allocation
Putting zero length array at the end of struct is a common technique
to embed arbitrary length of members.  There is no good reason to let
regmap_alloc_count() branch by "if (count <= 1)".

As far as I understood the code, regmap->base is an alias of
regmap->ranges[0].start, but it is not helpful but make the code
just ugly.

Rename regmap_alloc_count() to regmap_alloc() because the _count
suffix seems pointless.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: fixup cpu_info-rcar.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 15:15:27 -04:00
Patrick Delaunay
9ce751a6f5 psci: arm: remove armv7 function psci_save_target_pc
This function is no more used, and replaced by psci_save
which save also context id as requested by PSCI requirements.

Even if the context id is not used by Linux, it should be saved
and restored in r0 when the CPU_ON is performed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
9622c7e65d sunxi: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
4f7dc2e603 uniphier: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
4c6fe075ce tegra: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
47ec6b4ea3 imx7: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:55 -04:00
Patrick Delaunay
60599c1c08 ls102xa: psci: save context id in cpu_on command
Replace the psci_save_target_pc call by the new function
psci_save(cpu, pc,context_id)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:52:54 -04:00
Patrick Delaunay
41c79775f0 arm: stm32mp1: add PSCI support
Add PSCI v1.0 support for Linux and manage PSCI state
for each CPU (affinity 0 level) with all mandatory functions:
- PSCI_VERSION
- CPU_SUSPEND
- CPU_OFF
- CPU_ON
- AFFINITY_INFO
- SYSTEM_OFF
- SYSTEM_RESET
- PSCI_FEATURES
and 1 optional to avoid Linux warning
- MIGRATE_INFO_TYPE

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
2018-05-07 11:52:48 -04:00
Patrick Delaunay
486daaa618 arm: psci: add a weak function psci_arch_cpu_entry
The added function psci_arch_cpu_entry() is called
during psci_cpu_entry() and can be used by arch to handle
PSCI state transition from ON_PENDING to ON.

The default weak function is empty: not behavior change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-05-07 11:45:15 -04:00
Patrick Delaunay
1a047c23f9 arm: psci: save context id for cpu_on PSCI command
Save and use the 3rd parameter of PSCI CPU_ON request: context_id.

The context_id parameter is only meaningful to the caller.
U-Boot PSCI preserves a copy of the value passed in this parameter.
Following wakeup from a  powerdown state, U-BOOT PSCI places
this value in R0 when it first enters the OS.

NB: this context id is not (yet?) used by Linux but it is mandatory
    to be PSCI compliant.

update armv7 psci functions:
- psci_save_target_pc(): keep for backward compatibility with
  current platform (only save PC and force context id to 0)
  => should be removed when all platform migrate to the new API

- psci_save(): new API to use by ARMv7 platform with PSCI,
  save pc (= entry_point_address) and context_id

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07 11:45:15 -04:00
Tom Rini
890e79f2b1 Prepare v2018.05
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 11:32:36 -04:00
Tom Rini
068f86eb6d git-mailrc: Update some addresses and aliases
- Based on commit 08ae21af96 ("MAINTAINERS: Switch nxp.com domain")
  update or drop some formerly Freescale addresses.
- Update a few aliases to reflect current custodians

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 11:32:08 -04:00
Tom Rini
4549e789c1 SPDX: Convert all of our multiple license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have multiple licenses (in
these cases, dual license) declared in the SPDX-License-Identifier tag.
In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A
or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B"
as per the Linux Kernel style document.  Note that parenthesis are
allowed so when they were used before we continue to use them.

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 10:24:31 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Lokesh Vutla
7ce85318cf arm: mach-omap2: cache: Explicitly enable I cache
omap-common cache enabling sequence relies on cpu_init_cp15()
(inside start.S) for enabling I-caches. But cpu_init_cp15()
can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So
enable I-caches if not enabled already.

Debugged-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-06 13:35:40 -04:00
Kelvin Cheung
535adee869 Kconfig: Add dependency on HASH to verified boot
Building with verified boot support requires hash, add that
dependency here. Otherwise the following build error will come out
without crc command.

      LD      u-boot
lib/built-in.o: In function `hash_calculate':
lib/rsa/rsa-checksum.c:29: undefined reference to
`hash_progressive_lookup_algo'
...
make[1]: *** [u-boot] Error 1

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-06 13:35:40 -04:00
Keerthy
ebf48500df board: ti: am43: Fix DCDC3 voltage for epos-evm
A common voltage of 1.35V was being programmed for all am43 board
versions. EPOS-EVM Needs 1.20V for LPDDR2.

Fixes: fc69d47262 (“board: ti: AM43XX: Add ddr voltage rail configuration”)
Reported-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-06 13:35:40 -04:00
Trevor Woerner
1f154a6318 README.sandbox: small typos
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2018-05-06 13:35:40 -04:00