Move the default mapping of spl_boot_device to weak function of
spl_board_boot_device. So that every board of iMX7/8/8M can overwrite
this function to implement specific mapping.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The SPL SDP is configured as BOOT_DEVICE_BOARD, so when booting from
USB, change its type to BOOT_DEVICE_BOARD, so we can use SDP.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
All the SoCs use mach-imx has CONFIG_MACH_IMX selected, so
the macro could be the gate to build arch/arm/mach-imx to simplify
the rules.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The CONFIG_SPL_MAX_SIZE could be 0x27000 for i.MX8MM when SPL_TEXT_BASE
set to 0x7E1000.
The DDR firmware max uses 96KB, there is a 4KB padding header before
SPL_TEXT_BASE, so the SPL MAX SIZE is `256KB - 96KB - 4KB`.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
The MAINTAINERS file currently lists files in
arch/arm/include/asm/arch-imx/ being part of the IMX maintainers
purview, however the arch/arm/include/asm/ directory also contains the
directories arch-imx8, arch-imx8m, arch-imx8ulp and arch-imxrt which
would also appear to be relevant to the team. Tweak the entry to cover
these directories so that tools like get_maintainers.pl will suggest
relevant maintainers when making changes just in these directories.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
With supporting timer_get_boot_us, we can profile boot up time with below
configs and function bootstage_mark_name().
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
When you pass "--no-tree" to checkpatch it disables some extra checks
that are important for Linux. Specifically I want checks like:
warning: DT compatible string "boogie,woogie" appears un-documented
check ./Documentation/devicetree/bindings/
Let's make the default for Linux to _not_ pass --no-tree. We'll have a
config option and command line flag to override.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace logically correct word in the description.
Fixes: 91a91ff804 ("dm: Add Kconfig options for driver model SPL support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a basic test of the 'fdt addr' command, to kick things off.
This includes a new convenience function to run a command from a printf()
string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this feature so that it works on sandbox, using a basic identity
mapping. This allows us to run the 'ut addrmap' test.
Also fix up the test to use the correct macros to access the linker
list, so that the 'ut addrmap' command actually works.
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently the fitImage data area is resized in 1 kiB steps. This works
when bundling smaller images below some 1 MiB, but when bundling large
images into the fitImage, this make binman spend extreme amount of time
and CPU just spinning in pylibfdt FdtSw.check_space() until the size
grows enough for the large image to fit into the data area. Increase
the default step to 64 kiB, which is a reasonable compromise -- the
U-Boot blobs are somewhere in the 64kiB...1MiB range, DT blob are just
short of 64 kiB, and so are the other blobs. This reduces binman runtime
with 32 MiB blob from 2.3 minutes to 5 seconds.
The following can be used to trigger the problem if rand.bin is some 32 MiB.
"
/ {
itb {
fit {
images {
test {
compression = "none";
description = "none";
type = "flat_dt";
blob {
filename = "rand.bin";
type = "blob-ext";
};
};
};
};
};
configurations {
binman_configuration: config {
loadables = "test";
};
};
};
"
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
When CONFIG_LOG is activated, if LOG_DEBUG is defined in a file and
DEBUG is not defined the trace with debug() macro are not displayed,
because the parameter cond : _DEBUG = 0 is checked in debug_cond().
With this patch the define DEBUG, used to force the trace generated by
debug() macro, is linked with the define LOG_DEBUG, used to force the
trace generated by other macros (log_debug, dev_dbg, pr_debug).
We only need to define LOG_DEBUG in a file to activate all the
traces generated by any U-Boot debug macro, as it is described in
/doc/develop/logging.rst
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
If parameter drv of lists_bind_fdt() is specified, we shall bind only to
this very driver and to no other.
If the driver drv has an of_match property, we shall only bind to the
driver if it matches the compatible string of the device.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Without setting CONFIG_LOG_MAX_LEVEL to a value above 6 we will not detect
NULL dereferences and other errors in log_debug() calls.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If parameter drv of lists_bind_fdt() is specified, we want to bind to this
specific driver even if its field of_match is NULL.
If entry->of_match is NULL, we should not dereference it in a debug
statement.
Fixes: d3e773613b ("dm: core: Use U-Boot logging instead of pr_debug()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Consider CONFIG_LOG_MAX_LEVEL and gd->default_log_level in
* do_log_test_helpers()
* log_test_dropped()
* log_test_level_deny()
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When programming qspi flash speed we need to check the requested flash
speed not to exceed the spi max frequency. In the current implementation
we are checking qspi ref clk instead. This commit fixes the issue by
checking the requested speed and programs the specified max frequency.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-5-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support_ops function zynq_qspi_mem_exec_op to check controller
supported operations by spi-mem framework. Current default support ops
function does not allow dummy buswidth no more than 1, unless we are
using buswidth is 4 for TX.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-4-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add child pre probe function in the driver. Update max_hz of priv from
spi_slave structure.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support_ops function to check controller supported operations by
spi-mem framework. Current default support ops function does not allow
dummy buswidth no more than 1, unless we are using buswidth is 4 for TX.
In order to support dummy buswidth > 1 by spi-nor framework we are adding
explicit support_ops to check controller supported operations.
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add support for spi memory operations for xilinx AXI qspi driver.
This provides an high-level interface to execute SPI memory
operations by the controller.
Remove existing spi transfer based implementation and use
spi memory based exec_op() implementation for qspi IO operations.
Simplified existing startup_block implementation.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.
This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
or eFUSEs, as a key source to the AES engine if the FSBL is not
encrypted. This prevents using the BBRAM or eFUSE as the key source
to the AES engine during run-time applications."
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reduce the function code by calling xilinx_pm_request() once only.
Use the same variable bsize_req to store either bstream size in bytes
or an address of bstream size according to a type required by the
firmware version. Remove obsolete debug().
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-11-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Convert taken FPGA image "compatible" string to a binary compatible
flag and pass it to an FPGA driver.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-9-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add a "compatible" string to binary flag converter, which uses
a callback str2flag() of given FPGA driver if available.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-8-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-7-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
This flag is used to check whether a Xilinx FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-6-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add a call to convert FPGA "compatible" string to a binary flag.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-5-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Function definition arguments should also have identifier names.
Add missed ones to struct xilinx_fpga_op callbacks, unifying code.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-3-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
For imx8mm-cl-iot-gate we can use extension command to scan
extension boards attached on the mainboard. We enable the
extension command by default for users to detect the extension
boards.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
It allows using this feature without enabling the "fpga loads"
command.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Co-developed-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-2-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
After commit 8cca60a2cb ("Kconfig: Remove some symbols from the
whitelist") downstream builds failed for boards setting this in
include/configs/…
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-2-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.
This driver depends on mailbox and IPI driver, hence enable them as well.
Add ARCH_VERSAL in the depends on of mailbox Kconfig to compile for
Versal platforms.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-6-ashok.reddy.soma@xilinx.com
Mailbox driver might be need for Versal and other future platforms.
To remove the dependency, move struct zynqmp_ipi_msg to
zynqmp_firmware.h so that mailbox driver compiles for other platforms
easily.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-5-ashok.reddy.soma@xilinx.com
Enable power domain driver to configure pmufw config object and request
node for all the IP's that are enabled in DT.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-4-ashok.reddy.soma@xilinx.com
Try loading pmufw config overlay for core0, if it doesn't return any
error it means pmufw is accepting nodes for other IP's. Otherwise dont
try to load config object for any other IP, just return from
zynqmp_pmufw_node function.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-3-ashok.reddy.soma@xilinx.com
zynqmp_pmufw_load_config_object() has some error cases and it is better
to return those errors. Change prototype of this function to return
errors.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-2-ashok.reddy.soma@xilinx.com
Enable reset driver for ZynqMP platforms. This will enable us to reset
the IP's using generic reset_assert and reset_deassert calls.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add CONFIG_DM_RESET and CONFIG_RESET_ZYNQMP configs in versal default
configuration to enable support for reset driver for versal
platform.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-3-ashok.reddy.soma@xilinx.com
Add support for versal platform by adding "xlnx,versal-reset"
compatible string in zynqmp-reset driver. Reset numbering schema
for versal is not same as zynqmp, so nr_reset and reset_id are
set to zero. In case of assert/dessert, required device reset id
is sent from respective driver through struct reset_ctl.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220720095959.29610-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
