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fpga: xilinx: add bitstream flags to driver desc
Store a set of supported bitstream types in xilinx_desc structure. It will be used to determine whether an FPGA image is able to be loaded with a given driver. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
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f18adf1065
commit
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6 changed files with 14 additions and 7 deletions
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@ -22,6 +22,7 @@ xilinx_desc fpga = {
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.family = xilinx_zynq,
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.iface = devcfg,
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.operations = &zynq_op,
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.flags = FPGA_LEGACY,
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};
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#endif
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@ -27,7 +27,10 @@
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_FPGA_VERSALPL)
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static xilinx_desc versalpl = XILINX_VERSAL_DESC;
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static xilinx_desc versalpl = {
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xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
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FPGA_LEGACY
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};
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#endif
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int board_init(void)
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@ -48,7 +48,10 @@
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DECLARE_GLOBAL_DATA_PTR;
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#if CONFIG_IS_ENABLED(FPGA) && defined(CONFIG_FPGA_ZYNQMPPL)
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static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;
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static xilinx_desc zynqmppl = {
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xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op, NULL,
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ZYNQMP_FPGA_FLAGS
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};
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#endif
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int __maybe_unused psu_uboot_init(void)
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@ -14,7 +14,4 @@
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extern struct xilinx_fpga_op versal_op;
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#define XILINX_VERSAL_DESC \
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{ xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op }
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#endif /* _VERSALPL_H_ */
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@ -37,6 +37,9 @@ typedef enum { /* typedef xilinx_family */
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max_xilinx_type /* insert all new types before this */
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} xilinx_family; /* end, typedef xilinx_family */
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/* FPGA bitstream supported types */
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#define FPGA_LEGACY BIT(0)
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typedef struct { /* typedef xilinx_desc */
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xilinx_family family; /* part type */
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xilinx_iface iface; /* interface type */
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@ -45,6 +48,7 @@ typedef struct { /* typedef xilinx_desc */
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int cookie; /* implementation specific cookie */
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struct xilinx_fpga_op *operations; /* operations */
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char *name; /* device name in bitstream */
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int flags; /* compatible flags */
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} xilinx_desc; /* end, typedef xilinx_desc */
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struct xilinx_fpga_op {
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@ -25,7 +25,6 @@
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extern struct xilinx_fpga_op zynqmp_op;
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#define XILINX_ZYNQMP_DESC \
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{ xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op }
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#define ZYNQMP_FPGA_FLAGS (FPGA_LEGACY)
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#endif /* _ZYNQMPPL_H_ */
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