Commit graph

157 commits

Author SHA1 Message Date
Peng Fan
1bd790bc4b firmware: psci: enable DM_FLAG_PRE_RELOC
It is possible that cpu core may reset before relocation with PSCI reset

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-25 15:31:28 -04:00
Jonas Karlman
2229758118 clk: scmi: Add Kconfig option for SPL
Building U-Boot SPL with CLK_SCMI and SCMI_FIRMWARE Kconfig options
enabled and SPL_FIRMWARE disabled result in the following error.

  drivers/clk/clk_scmi.o: in function `scmi_clk_gate':
  drivers/clk/clk_scmi.c:84: undefined reference to `devm_scmi_process_msg'
  drivers/clk/clk_scmi.c:88: undefined reference to `scmi_to_linux_errno'
  drivers/clk/clk_scmi.o: in function `scmi_clk_get_rate':
  drivers/clk/clk_scmi.c:113: undefined reference to `devm_scmi_process_msg'
  drivers/clk/clk_scmi.c:117: undefined reference to `scmi_to_linux_errno'
  drivers/clk/clk_scmi.o: in function `scmi_clk_set_rate':
  drivers/clk/clk_scmi.c:139: undefined reference to `devm_scmi_process_msg'
  drivers/clk/clk_scmi.c:143: undefined reference to `scmi_to_linux_errno'
  drivers/clk/clk_scmi.o: in function `scmi_clk_probe':
  drivers/clk/clk_scmi.c:157: undefined reference to `devm_scmi_of_get_channel'
  make[1]: *** [scripts/Makefile.spl:527: spl/u-boot-spl] Error 1
  make: *** [Makefile:2043: spl/u-boot-spl] Error 2

Add Kconfig option so that CLK_SCMI can be disabled in SPL to fix this.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-04-21 15:16:01 +08:00
Jorge Ramirez-Ortiz
83d7a7af5d firmware: ti_sci: fix typo in boot authentication message name
Fix AUTH_BOOT message identifier (s/IMIAGE/IMAGE)

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Acked-by: Andrew Davis <afd@ti.com>
2023-01-18 13:11:13 -05:00
Bryan Brattlof
d90c8bc441 board: ti: introduce the basic files needed to support the am62a
Introduce the bare minimum SD and UART support for the am62a sk.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-12-09 14:10:28 -05:00
Patrick Delaunay
55b0affd26 firmware: scmi: use protocol node name to bind the scmi regulator driver
In scmi firmware driver, it is better to bind the scmi protocol driver
"scmi_voltage_domain" with the node name of the protocol 17 and not
the sub-node named "regulator", because is a fixed string which doesn't
provide information and because it is not aligned with the other scmi
protocol nodes.

For example on stm32mp135f-dk board with device tree in stm32mp131.dtsi

scmi: scmi {
	compatible = "linaro,scmi-optee";
	#address-cells = <1>;
	#size-cells = <0>;
	linaro,optee-channel-id = <0>;
	shmem = <&scmi_shm>;
	scmi_clk: protocol@14 {
		reg = <0x14>;
		#clock-cells = <1>;
	};
	scmi_reset: protocol@16 {
		reg = <0x16>;
		#reset-cells = <1>;
	};
	scmi_voltd: protocol@17 {
		reg = <0x17>;
		scmi_regu: regulators {
			#address-cells = <1>;
			#size-cells = <0>;
			scmi_reg11: voltd-reg11 {
				reg = <VOLTD_SCMI_REG11>;
				regulator-name = "reg11";
			};
			scmi_reg18: voltd-reg18 {
				reg = <VOLTD_SCMI_REG18>;
				regulator-name = "reg18";
			};
			scmi_usb33: voltd-usb33 {
				reg = <VOLTD_SCMI_USB33>;
				regulator-name = "usb33";
			};
		};
	};
};

Before the patch:

> dm tree

 scmi_agent    0  [ + ]   scmi-over-optee       |-- scmi
 clk           1  [ + ]   scmi_clk              |   |-- protocol@14
 ...
 reset         1  [   ]   scmi_reset_domain     |   |-- protocol@16
 nop           2  [ + ]   scmi_voltage_domain   |   `-- regulators
 regulator     0  [ + ]   scmi_regulator        |       |-- voltd-reg11
 regulator     1  [ + ]   scmi_regulator        |       |-- voltd-reg18
 regulator     2  [ + ]   scmi_regulator        |       |-- voltd-usb33
 ...

after the patch:

> dm tree

 scmi_agent    0  [ + ]   scmi-over-optee       |-- scmi
 clk           1  [ + ]   scmi_clk              |   |-- protocol@14
 ...
 reset         1  [   ]   scmi_reset_domain     |   |-- protocol@16
 nop           2  [ + ]   scmi_voltage_domain   |   `-- protocol@17
 regulator     0  [ + ]   scmi_regulator        |       |-- voltd-reg11
 regulator     1  [ + ]   scmi_regulator        |       |-- voltd-reg18
 regulator     2  [ + ]   scmi_regulator        |       |-- voltd-usb33
 ...

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-12-08 09:29:02 -05:00
Patrick Delaunay
eebb967dce firmware: scmi: fix the multi channel support with CCF
When the CCF is activated, the dev->parent is not necessary
the reference to SCMI transport and the function devm_scmi_of_get_channel
failed for the registered SCMI clock, child for protocol@14,
the channel is null and the SCMI clock driver crash for any operations.

This patch changes the first parameter of the ops of_get_channel(),
aligned with other process_msg() to pass directly the good reference,
i.e. parent result of find_scmi_transport_device(dev)
which return the reference of the scmi transport device.

Fixes: 8e96801aa6 ("firmware: scmi: add multi-channel support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-10-12 08:55:31 -04:00
Ashok Reddy Soma
ef2896a4d2 firmware: zynqmp: Change loadable config object from APU_0 to OCM_BANK_0
To check dynamic loading of config object, currently APU_0 is used.
Suggestion from pmwfw team is to load OCM_BANK_0 and check for
XST_PM_NO_ACCESS error only to skip future config objects. Other errors
should not be considered for skipping. Change from NODE_APU_0 to
NODE_OCM_BANK_0 and check for XST_PM_NO_ACCESS to skip future config
objects.

Add ":  " to printf statement when there is no permission to load config
object, to align with PMUFW version print.

Update kernel doc for return value for zynqmp_pmufw_load_config_object().

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2784018844ba4afced0e3edff76bdbfe532f517d.1664523444.git.michal.simek@amd.com
2022-10-05 11:36:54 +02:00
Simon Glass
8909066199 dm: core: Drop ofnode_is_available()
This function is also available as ofnode_is_enabled(), so use that
instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:11:31 -04:00
Jay Buddhabhatti
2a00cef820 firmware: zynqmp: Add Versal NET compatible string
Add compatible string for Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ec73f786e1c89094752ff3693f6f0fb4536c85c5.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Andrew Davis
96e036a4e5 firmware: ti_sci: Move ACK checking to ti_sci_do_xfer() function
We can check if the message was acknowledged in the common
ti_sci_do_xfer() which lets us remove it from after each call to this
function. This simplifies the code and reduces binary size.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26 10:55:46 -04:00
Andrew Davis
f127a58e05 firmware: ti_sci: Remove inline keyword from functions
The inline hint is not needed here, the compiler will do the right thing
based on if we are compiling for speed or for code size. In this case the
inline causes this function to be placed inside each callsite which is
not the right thing to do for either speed nor size. There is no
performance benefit to this due to the larger function size reducing
cache locality, but there is a huge size penalty. Remove inline keyword.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26 10:55:46 -04:00
Andrew Davis
0d74f2684b firmware: ti_sci: Factor out message alloc failed message
We don't need to print the same message in every location, just
print it in the function that fails and remove all the extra
message printouts.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26 10:55:46 -04:00
Andrew Davis
5917850138 firmware: ti_sci: Reduce output on ti_sci_do_xfer error
This ti_sci_do_xfer() function already prints out the reason for the
failure, and the caller of each of these functions should also notify
the user of the failed task. Remove this extra level of error message.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26 10:55:46 -04:00
Ashok Reddy Soma
2e40ab1f21 firmware: zynqmp: Load config overlay for core0 to pmufw
Try loading pmufw config overlay for core0, if it doesn't return any
error it means pmufw is accepting nodes for other IP's. Otherwise dont
try to load config object for any other IP, just return from
zynqmp_pmufw_node function.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-3-ashok.reddy.soma@xilinx.com
2022-07-26 08:36:10 +02:00
Ashok Reddy Soma
c9f12ed9bc firmware: zynqmp: Change prototype of zynqmp_pmufw_load_config_object()
zynqmp_pmufw_load_config_object() has some error cases and it is better
to return those errors. Change prototype of this function to return
errors.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220722084658.30995-2-ashok.reddy.soma@xilinx.com
2022-07-26 08:36:02 +02:00
Tom Rini
b340199f82 spl: Ensure all SPL symbols in Kconfig have some SPL dependency
Tighten up symbol dependencies in a number of places.  Ensure that a SPL
specific option has at least a direct dependency on SPL.  In places
where it's clear that we depend on something more specific, use that
dependency instead.  This means in a very small number of places we can
drop redundant dependencies.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Vignesh Raghavendra
e4b4501ede firmware: ti_sci_static_data: Make file board agnostic
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.

Drop J7200 EVM specific settings as its same as J721e

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2022-07-06 14:30:08 -04:00
Tom Rini
c316ee674f Xilinx changes for v2022.10
cpu:
 - Add driver for microblaze cpu
 
 net:
 - Add support for DM_ETH_PHY to AXI emac and emaclite
 
 xilinx:
 - Switch platforms to DM_ETH_PHY
 - DT chagnes in ZynqMP and Zynq
 - Enable support for SquashFS
 
 zynqmp:
 - Add support for KR260 boards
 - Move BSS from address 0
 - Move platform identification from board code to soc driver
 - Improve zynqmp_psu_init_minimize
 
 versal:
 - Enable loading app at EL1
 
 serial:
 - Setup default address and clock rates for DEBUG uarts
 
 pinctrl:
 - Add support for tri state and output enable properties
 
 relocate-rela:
 - Clean relocate-rela implementation for ARM64
 - Add support for Microblaze
 
 microblaze:
 - Add support for runtime relocation
 - Rework cache handling (wiring, Kconfig) based on cpuinfo
 - Remove interrupt support
 
 timer:
 - Extract axi timer driver from Microblaze to generic location
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYrlYngAKCRDKSWXLKUoM
 ITgbAJ9S9xO2QqxtuodWAYMtJfvZ14c7mgCeKnyFTrrBnJkC0wPsGqE71oNJ49o=
 =3gGm
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location
2022-06-27 10:15:50 -04:00
Stefan Herbrechtsmeier
f851be15f4 firmware: zynqmp: Probe driver before use
Probe the driver before use to ensure that the driver is always
available and the global data are valid. Initialize the global data
with zero and probe the driver if the global data are still zero. This
allows a usage of the firmware functions from other drivers with
arbitrary order between the drivers.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-2-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Stefan Herbrechtsmeier
fe7090c702 firmware: zynqmp: Check if rx channel dev pointer is valid
Check if rx channel dev pointer is valid and not if the address of the
pointer is valid.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24 14:37:27 +02:00
Etienne Carriere
2fbe47b7e7 firmware: psci: bind arm smccc features when discovered
Use PSCI device to query Arm SMCCC v1.1 support from secure monitor
and if so, bind drivers for the SMCCC features that monitor supports.

Drivers willing to be bound from Arm SMCCC features discovery can use
macro ARM_SMCCC_FEATURE_DRIVER() to register to smccc feature discovery,
providing target driver name and a callback function that returns
whether or not the SMCCC feature is supported by the system.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Etienne Carriere
b1ff399c6e firmware: psci: reorder header files inclusion
Fixes ordering of header files inclusion in PSCI firmware driver.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Etienne Carriere
c08decd29e firmware: scmi: use multi channel in mailbox, optee and smccc agents
Updates .process_msg operators of the SCMI transport drivers that
supports multi-channel to use it now that drivers do provide
the reference through channel argument. These are the mailbox
agent, the optee agent and the smccc agent.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:56 -04:00
Etienne Carriere
965d606d60 firmware: scmi: optee transport: implement multi-channel
Implements multi SCMI channel support in OP-TEE SCMI transport. An
SCMI protocol may use a dedicated channel, specified by the DT.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
57b812fc8f firmware: scmi: smccc transport: implement multi-channel
Updates SCMI SMCCC transport driver to get SCMI channel reference
at initialization and use when posting SCMI messages.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
b5d32ea42b firmware: scmi: mailbox transport: implement multi-channel
Updates SCMI mailbox transport driver to get SCMI channel reference
at initialization and use when posting SCMI messages.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
8e96801aa6 firmware: scmi: add multi-channel support
Adds resources for SCMI protocols to possibly use a dedicated SCMI
channel instead of the default channel allocated by the SCMI agent
during initialization. As per DT binding documentation, some SCMI
transports can define a specific SCMI communication channel for
given SCMI protocols. It allows SCMI protocols to pass messages
concurrently each other.

This change introduces new scmi agent uclass API function
devm_scmi_of_get_channel() for SCMI drivers probe sequences to get
a reference to the SCMI channel assigned to its related SCMI protocol.
The function queries the channel reference to its SCMI transport driver
through new scmi agent uclass operator .of_get_channel that uses Device
Tree information from related SCMI agent node.

Operator .of_get_channel returns a reference to the SCMI channel
assigned to SCMI protocol used by the caller device. SCMI transport
drivers that do not support multi-channel are not mandated to register
this operator. When so, API function devm_scmi_of_get_channel() returns
NULL and SCMI transport driver are expected to retrieve by their own
means the reference to the unique SCMI channel, for example using
platform data as these drivers currently do in U-Boot source tree.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
5a11df381a firmware: scmi: factorize scmi transport look up
Defines local helper function find_scmi_transport_device() with the
instructions to find the SCMI transport device from a SCMI protocol
device.

Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
85dc582892 firmware: scmi: prepare uclass to pass channel reference
Changes SCMI transport operator ::process_msg to pass the SCMI channel
reference provided by caller SCMI protocol device.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
8bcb1b4898 firmware: scmi: prepare scmi uclass API to multi-channel
Changes SCMI driver API function devm_scmi_process_msg() to add
an SCMI channel reference argument for when SCMI agent supports
SCMI protocol specific channels. First argument of devm_scmi_process_msg()
is also change to point to the caller SCMI protocol device rather
than its parent device (the SCMI agent device).

The argument is a pointer to opaque struct scmi_channel known from
the SCMI transport drivers. It is currently unused and caller a pass
NULL value. A later change will enable such support once SCMI protocol
drivers have means to get the channel reference during initialization.

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
5d8eb4ce33 firmware: scmi: optee: fix inline description of PTA_SCMI_CMD_GET_CHANNEL
Removes inaccurate inline description of OP-TEE SCMI PTA command
PTA_SCMI_CMD_GET_CHANNEL.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Etienne Carriere
593eac9805 firmware: scmi: optee: use TEE shared memory for SCMI messages
Changes implementation when using TEE dynamically allocated shared
memory to synchronize with the Linux implementation where the legacy
SMT protocol cannot be used with such memory since it is expected from
device mapped memory whereas OP-TEE shared memory is cached and
hence should not be accessed using memcpy_toio()/memcpy_fromio().

This change implements the MSG shared memory protocol introduced
in Linux [1]. The protocol uses a simplified SMT header of 32bit
named MSG_SMT to carry SCMI protocol information and uses side channel
means to carry exchanged buffer size information, as TEE invocation API
parameters when used in the SCMI OP-TEE transport.

Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f301bba0ca7392d16a6ea4f1d264a91f1fadea1a
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23 13:12:55 -04:00
Vignesh Raghavendra
7e9e386773 firmware: ti_sci_static_data: add static DMA chan data
Add range of DMA channels available for R5 SPL usage before DM firmware
is loaded.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-06-10 13:37:32 -04:00
T Karthik Reddy
7011efce23 firmware: firmware-zynqmp: Add zynqmp_pm_set_gem_config api
Add zynqmp_pm_set_gem_config() api to configure GEM secure registers.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f69e32355c6a6be7d2780663353c52757530207d.1648631275.git.michal.simek@xilinx.com
2022-04-05 15:13:13 +02:00
Michal Simek
f307c688ea firmware: zynqmp: Do not bind PD driver in SPL if disabled
Change if condition to cover SPL flow. SPL needs to have
CONFIG_SPL_POWER_DOMAIN enabled to be able to bind
CONFIG_ZYNQMP_POWER_DOMAIN driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8e1d381013a0ce39d736da166d2b401c4b12d38a.1646064792.git.michal.simek@xilinx.com
2022-03-29 09:12:58 +02:00
Tom Rini
297e6eb8dc Xilinx changes for v2022.07-rc1
microblaze:
 - Add support for reserved memory
 
 xilinx:
 - Update FRU code with MAC reading
 
 zynqmp:
 - Remove double AMS setting
 - DT updates (mostly for SOMs)
 - Add support for zcu106 rev 1.0
 
 zynq:
 - Update nand binding
 
 nand:
 - Aligned zynq_nand to upstream DT binding
 
 net:
 - Add support for ethernet-phy-id
 
 mmc:
 - Workaround CD in zynq_sdhci driver also for ZynqMP
 - Add support for dynamic/run-time SD config for SOMs
 
 gpio:
 - Add driver for slg7xl45106
 
 firmware:
 - Add support for dynamic SD config
 
 power-domain:
 - Update zynqmp driver with the latest firmware
 
 video:
 - Add skeleton driver for DP and DPDMA
 
 i2c:
 - Fix i2c to work with QEMU
 
 pinctrl:
 - Add driver for zynqmp pinctrl driver
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYjIBkgAKCRDKSWXLKUoM
 IYUwAKCYRBxb59BFq4MRvTbNcRZ7H4oGIQCfVUl3x9KZ7nFZaYAaBXFBxwna+PE=
 =irCR
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2022.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.07-rc1

microblaze:
- Add support for reserved memory

xilinx:
- Update FRU code with MAC reading

zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0

zynq:
- Update nand binding

nand:
- Aligned zynq_nand to upstream DT binding

net:
- Add support for ethernet-phy-id

mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs

gpio:
- Add driver for slg7xl45106

firmware:
- Add support for dynamic SD config

power-domain:
- Update zynqmp driver with the latest firmware

video:
- Add skeleton driver for DP and DPDMA

i2c:
- Fix i2c to work with QEMU

pinctrl:
- Add driver for zynqmp pinctrl driver
2022-03-16 12:52:02 -04:00
Ashok Reddy Soma
7d9ee46672 firmware: zynqmp: Add support for set sd config and is function supported
Add firmware API's to set SD configuration and to check if a purticular
function is supported.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f64fa2f73e4775e9ad2f4d91339d6c74b43116a3.1645626962.git.michal.simek@xilinx.com
2022-03-09 12:34:47 +01:00
Etienne Carriere
7c33f78983 clk: scmi: register scmi clocks with CCF
Implements SCMI APIs to retrieve the number exposed SCMI clocks using
SCMI_PROTOCOL_ATTRIBUTES messages and the names of the clocks using
SCMI_CLOCK_ATTRIBUTES messages.

This change updates sandbox SCMI clock test driver to manage these
2 new message IDs.

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Clement Leger <clement.leger@bootlin.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02 17:42:06 -05:00
Etienne Carriere
10d3e5d20b firmware: scmi: fix sandbox and related tests for clock discovery
Updates sandbox SCMI clock driver and tests since enabling CCF will
mandate clock discovery that is all exposed SCMI clocks shall be
discovered at initialization. For this reason, sandbox SCMI clock
driver must emulate all clocks exposed by SCMI server, not only those
effectively consumed by some other U-Boot devices.

Therefore the sandbox SCMI test driver exposes 3 clocks (IDs 0, 1 and 2)
and sandbox SCMI clock consumer driver gets 2 of them.

Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02 17:42:06 -05:00
Etienne Carriere
6983710a31 scmi: change parameter dev in devm_scmi_process_msg
Changes devm_scmi_process_msg() first argument from target parent device
to current SCMI device and lookup the SCMI agent device among SCMI device
parents for find the SCMI agent operator needed for communication with
the firmware.

This change is needed in order to support CCF in clk_scmi driver unless
what CCF will fail to find the right udevice related to exposed SCMI
clocks.

This patch allows to simplify the caller sequence, using SCMI device
reference as parameter instead of knowing SCMI uclass topology. This
change also adds some protection in case devm_scmi_process_msg() API
function is called for an invalid device type.

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02 17:42:06 -05:00
Etienne Carriere
41d62e2f27 sandbox: scmi: test against a single scmi agent
As per DT bindings since Linux kernel v5.14, the device tree can define
only 1 SCMI agent node that is named scmi [1]. As a consequence, change
implementation of the SCMI driver test through sandbox architecture to
reflect that.

This change updates sandbox test DT and sandbox SCMI driver accordingly
since all these are impacted.

Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02 17:42:06 -05:00
Tom Rini
24b628a8f8 Xilinx changes for v2022.04-rc3
microblaze:
 - Fix exception handler
 
 zynqmp:
 - Show information about secure images
 - DT changes (som u-boot file removal)
 - Fix zynqmp_pm_cfg_obj_convert.py
 - Fix platform boot
 
 xilinx:
 - Fix bootm_size calculation
 - Remove GPIO_EXTRA_HEADER selection
 
 power:
 - Add zynqmp power management driver
 
 scsi:
 - Add phy support to ceva driver
 
 zynq qspi:
 - Fix unaligned accesses and check baudrate setup
 - Add support for spi memory operations
 
 net:
 - Fix 64bit calculation in axi_emac
 
 video:
 - Add missing gpio dependency for seps driver
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYhOKGwAKCRDKSWXLKUoM
 IQP/AJ9U6inecbFh6LWchwX1ByhHVB0NuQCeLExfpcscdJlVUtNBC8kaRrrdjVM=
 =nq1B
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver
2022-02-21 08:32:02 -05:00
Michal Simek
fac46bc446 arm64: zynqmp: Add command for disabling loading other overlays
Add command "zynqmp pmufw node close" to disable permission to load
additional pmufw config overlays. This command will make sure that any
other sw will ask for changing permission.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/cfa5cc7909eb8deb23eb0f11c26954cbaddeb861.1642163135.git.michal.simek@xilinx.com
2022-02-15 13:04:03 +01:00
Michal Simek
c750c6dbb2 xilinx: firmware: Introduce zynqmp_pmufw_node() for loading PMU fragments
Introduce zynqmp_pmufw_node() for loading PMU configuration fragment for
enabling IPs. Firmware driver has small overlay where NODE id is added and
config fragment is sent to PMUFW. There is a need to build PMUFW with
fragment support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/636e8150bd4e2b1f988d59795772c685ceeec083.1642163135.git.michal.simek@xilinx.com
2022-02-15 13:03:54 +01:00
Michal Simek
e0283cbdfd power: zynqmp: Add power domain driver for ZynqMP
Driver should be enabled by CONFIG_POWER_DOMAIN=y and
CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node
but it uses zynqmp firmware DT node that's why there is a need to bind
driver when firmware node is found.

Driver itself is simple. It is sending pmufw config object overlay for
enabling access to device which is done in ...domain_request().
In ...domain_on() capabilities are passed and node is requested.
This should be bare minimum of required to get power domain driver working.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/f4b9433b91c0b18c375b061c7a4e29d428f70547.1644226055.git.michal.simek@xilinx.com
2022-02-15 13:01:42 +01:00
David Huang
e00b1ac8c6 drivers: dma: Add support for J721S2
Add support for DMA in J721S2 SoC.

Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2022-02-08 09:41:27 -05:00
Tom Rini
068415eade Xilinx changes for v2022.04-rc1
gpio:
 - Add modepin driver
 
 net:
 - Save random mac addresses to eth variable
 
 zynqmp gem:
 - Add support for mdio bus DT description
 - Add support for reset and SGMII phy configuration
 - Reduce timeout for MDIO accesses
 
 zynqmp clk:
 - Fix clock handling for gem and usb
 
 phy:
 - Add zynqmp phy/serdes driver
 
 serial:
 - Add one missing compatible string
 
 microblaze:
 - Symbol alignement
 - SPL fixups
 - Code cleanups
 
 zynqmp:
 - Various dt changes, DP pre-reloc, gem resets, gem clocks
 - Switch SOM to shared psu configuration
 - Move dcache handling to firmware driver
 - Workaround gmii2rgmii DT description issue
 - Enable broadcasts again
 - Change firmware enablement logic
 - Small adjustement in firmware driver
 
 versal:
 - Support new mmc@ DT nodes
 - Fix run time variable handling
 - Add missing I2C_PMC ID for power domain
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYeg7sQAKCRDKSWXLKUoM
 IVhJAKCAiNx/joEeFBJ0XgThtJzFhCjdMwCfYKY9Ewz4L0n2I56lDgR3UJroct0=
 =HtB+
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2022.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc1

gpio:
- Add modepin driver

net:
- Save random mac addresses to eth variable

zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses

zynqmp clk:
- Fix clock handling for gem and usb

phy:
- Add zynqmp phy/serdes driver

serial:
- Add one missing compatible string

microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups

zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver

versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
2022-01-19 11:43:44 -05:00
Michal Simek
11c07719d5 firmware: zynqmp: Do not report error if node is already configured
Power domain driver sends PM fragment to PMUFW. It is sent for every node
which is listed in DT. But some nodes could be already enabled but driver
is not capable to find it out. That's why it blinly sents request for every
listed IP. When PMUFW response by XST_PM_ALREADY_CONFIGURED error code
there is no need to show any error message because node is already enabled.
That's why cover this case with message when DEBUG is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8c15ef0b68cf191f693d3d010f70ac24cfd8171f.1642163135.git.michal.simek@xilinx.com
2022-01-19 15:14:29 +01:00
Michal Simek
12662e7034 firmware: zynqmp: Move loading message to debug
Power domain driver is using this function for every IP which is PD listed.
This can end up with a lot of messages which end up in boot log. That's why
show it only in EL3 as was used in past.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d73fc8bc663110b6e8d5e70fdb6435d1199e9db8.1642163135.git.michal.simek@xilinx.com
2022-01-19 15:14:29 +01:00
Michal Simek
380bd08370 xilinx: firmware: Move dcache handling directly to pmufw load config
Core function should make sure that data is stored properly that's why move
cache operations directly to zynqmp_pmufw_load_config_object() to be able
to call it from other functions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8c92edd3650ce34a3cfd1c1e4e9103980830b1fa.1637236800.git.michal.simek@xilinx.com
2022-01-05 10:22:02 +01:00