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xilinx: firmware: Introduce zynqmp_pmufw_node() for loading PMU fragments

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Introduce zynqmp_pmufw_node() for loading PMU configuration fragment for
enabling IPs. Firmware driver has small overlay where NODE id is added and
config fragment is sent to PMUFW. There is a need to build PMUFW with
fragment support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/636e8150bd4e2b1f988d59795772c685ceeec083.1642163135.git.michal.simek@xilinx.com
This commit is contained in:
Michal Simek 2022-01-14 13:25:35 +01:00
parent e0283cbdfd
commit c750c6dbb2
2 changed files with 33 additions and 0 deletions
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32
drivers/firmware/firmware-zynqmp.c
View file

@ -28,6 +28,38 @@ struct zynqmp_power {
struct mbox_chan rx_chan;
} zynqmp_power;
#define NODE_ID_LOCATION 5
static unsigned int xpm_configobject[] = {
/**********************************************************************/
/* HEADER */
2, /* Number of remaining words in the header */
1, /* Number of sections included in config object */
PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay */
/**********************************************************************/
/* SLAVE SECTION */
PM_CONFIG_SLAVE_SECTION_ID, /* Section ID */
1, /* Number of slaves */
0, /* Node ID which will be changed below */
PM_SLAVE_FLAG_IS_SHAREABLE,
PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK |
PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
};
int zynqmp_pmufw_node(u32 id)
{
/* Record power domain id */
xpm_configobject[NODE_ID_LOCATION] = id;
zynqmp_pmufw_load_config_object(xpm_configobject,
sizeof(xpm_configobject));
return 0;
}
static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen)
{
struct zynqmp_ipi_msg msg;

1
include/zynqmp_firmware.h
View file

@ -367,6 +367,7 @@ enum pm_ioctl_id {
#define PAYLOAD_ARG_CNT 5U
unsigned int zynqmp_firmware_version(void);
int zynqmp_pmufw_node(u32 id);
void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size);
int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
u32 arg3, u32 *ret_payload);