Commit graph

75049 commits

Author SHA1 Message Date
Patrick Delaunay
c7f85e1f61 stm32f429: move CONFIG_BOOTCOMMAND in defconfig
Move CONFIG_BOOTCOMMAND defined in Kconfig in the board defconfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:25:57 +02:00
Patrick Delaunay
454994727d configs: Move some usb config in defconfig
Using the tools moveconfig.py to move the following config in the
defconfig files:
 CONFIG_USB_HOST_ETHER
 CONFIG_USB_ETHER_ASIX
 CONFIG_USB_ETHER_MCS7830
 CONFIG_USB_ETHER_SMSC95XX

These option are already migrated since the commit f58ad98a62 ("usb: net:
migrate USB Ethernet adapters to Kconfig") and the commit ae3584498b
("usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Ian Ray <ian.ray@ge.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:25:12 +02:00
Patrick Delaunay
cc30ea584e Convert CONFIG_STM32_FLASH to Kconfig
This converts the CONFIG_STM32_FLASH to Kconfig by using
tools/moveconfig.py

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:24:20 +02:00
Marek Vasut
2d0808161b Revert "configs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp"
This reverts commit d5d726d3cc,
which breaks boards which ship with multiple SD/eMMC sockets.

This stm32mp1.h config is not used only by the ST reference
boards, but all the other STM32MP1 based boards in U-Boot, so
changes to this stm32mp1.h cannot break the other boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-08 08:22:43 +02:00
Patrick Delaunay
5d81616fb8 phy: stm32-usbphyc: stm32: usbphyc: add protection on phy sub-node
Add protection on presence and order of the phy node sub node
by using the mandatory reg information.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:19:59 +02:00
Patrick Delaunay
5b4fa85d65 phy: stm32-usbphyc: use connector for vbus-supply with phy-stm32-usbphyc
The vbus-supply is an optional property of sub-node connector node.
and no more in the usb phyc node (in first proposed binding).

This regulator for USB VBUS may be needed for host mode.

See the latest kernel binding for details in
Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml.

  usbphyc_port0: usb-phy@0 {
      reg = <0>;
      phy-supply = <&vdd_usb>;
      #phy-cells = <0>;
      connector {
          compatible = "usb-a-connector";
          vbus-supply = <&vbus_sw>;
      };
  };

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-10-08 08:19:59 +02:00
Patrick Delaunay
e69c4143e8 board: stm32: Remove the bi_boot_params initialization
The stm32 platforms never had to support an ATAGs-based Linux Kernel,
so remove the bi_boot_params initialization.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 08:15:39 +02:00
Patrick Delaunay
b703dcb0fe arm: stm32: Disable ATAGs support
These platforms never had to support an ATAGs-based Linux Kernel, so
remove the options.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-08 08:15:39 +02:00
Tom Rini
d80bb749fa Prepare v2021.10
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-04 11:09:26 -04:00
Marek Vasut
c2e0363571 mtd: cqspi: Fix division by zero
Both dummy.nbytes and dummy.buswidth may be zero. By not checking
the later, it is possible to trigger division by zero and a crash.
This does happen with tiny SPI NOR framework in SPL. Fix this by
adding the check and returning zero dummy bytes in such a case.

Fixes: 38b0852b0e ("spi: cadence-qspi: Add support for octal DTR flashes")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
[trini: Drop Pratyush's RB as his requested changes weren't made as
        Marek disagreed]
2021-10-04 08:51:14 -04:00
Tom Rini
bf9fcc2000 Azure/GitLab CI: Update docker image
Rebuild our current docker image so that ca-certificates will be updated
and Let's Encrypt issued certificates will work again.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-30 12:33:46 -04:00
Tom Rini
67ae289723 - fix usb stopt; usb start; bug
- update Nicolas email address
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmFUbkgSHG1icnVnZ2Vy
 QHN1c2UuY29tAAoJEC9tfk32wqh+jWUQAIkce5475TgqcnrYfFzqnLrQwnocnsD4
 Z0mjq7gWrkt+dOy2whxY5ETXXqAJEqVdHYc5AJpmFWfgWlSryW+WVMbOCig8g5ce
 M2lXzWkGUufVlW8OBXYtSAAF6PWsFcPFgtY4XCFZYBpDbYaxOF6TeLTl9I3KsOGT
 tZk4rRkDFe0DpA5+aR2IDSK1w68QvobhSQgMPvQpH0r93qVkwDZBvpS0zK1ZvTrS
 T+UoJ3t2pR+Idj8bv/XneIfFdA7iO2vdq8AIIqndLNDHa0Xc5LboBSWjGk7QHmNn
 qmhbmCUkEdIEUZT1rGshXqXJmPw8/0UU40TfbcuvFBmBE99g0WJ+JK1yh8cEwFBM
 5efpmuwUFADRJyL5xhHmUh+h4ToG8kM/2LI2dhk42ce4Bb+sOFkgpnhdl+TbSjWy
 ysYD0BsynED+pBJN6NwoJnDXvPBEhJM5VOKCCOfh9GPLjPJTEZJM+0x11R+3Y9pc
 FxoInmgdh2I31AugPtq5jmMSkJRU5Z7hto6yotEG4WSc1F2BWPkyNzEiS28Wif3H
 3EFW3h68RtEbR+FmdFtEw9vaOWn1d8Noxn2rK9EC7lfF+YezUZCDHFg96lh6RlUk
 JLIYk8bO1nHOIGZCkBcHpvRrMlpI0X98cEj8RIW7S+rcPtFoHIZfFqESenBSIRse
 kqPpXzL3UlhL
 =yTvU
 -----END PGP SIGNATURE-----

Merge tag 'rpi-next-2021.10.2' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi

- fix usb stopt; usb start; bug
- update Nicolas email address
2021-09-29 15:13:35 -04:00
Tom Rini
94647e8920 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Armada8k: Fix CP0 eMMC/SDIO support (Robert)
2021-09-29 15:13:11 -04:00
Marek Szyprowski
33166054c7 arm: rpi: perform XHCI firmware upload only once
XHCI firmware upload must be performed only once after initializing the
PCI bridge. This fixes USB stack initialization after calling "usb stop;
usb start" on Raspberry Pi 4B.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-09-29 15:44:16 +02:00
Nicolas Saenz Julienne
6f3a9227cc mailmap: Update mail address for Nicolas Saenz julienne
The @suse.de address doesn't exist anymore. Update it to something not
dependent on my workplace.

Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-09-29 15:44:16 +02:00
Robert Marko
65513f3c18 arm: dts: armada8040: Fix CP0 eMMC/SDIO support
During the migration to a single DTSI for the CP110-s specific pinctrl
compatibles were moved to the SoC DTSI as CP0 and CP1 have some specifics.
Namely, CP0 eMMC/SDIO support depends on the mvebu-pinctrl driver setting
the BIT(0) in eMMC PHY IO Control 0 Register to 0 in order for the connect
the eMMC/SDIO PHY to the controller and not use it as a MPP pin multiplexor.

So, the mvebu-pinctrl driver check specifically for the
"marvell,armada-8k-cpm-pinctrl" compatible to clear the that bit.

Issue is that compatibles in the 8040 DTSI were set to "marvell,8k-cpm-pinctrl"
for CP0 and "marvell,8k-cps-pinctrl" for the CP1.
This is obviously incorrect as the pinctrl driver does not know about these.

So fix the regression by applying correct compatibles to the DTSI.
Regression found and tested on the Puzzle M801 board.

Fixes: a0ba97e5 ("arm: armada: dts: Use a single dtsi for cp110 die description")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-29 07:13:27 +02:00
Tom Rini
b5d7a200a8 Merge branch '2021-09-28-regression-fixes'
- Reintroduce creating internally the "nor%d" style names, in order to
  fix some use U-Boot use-cases involving the "mtd" command.
- Fix a regression over the default SPI bus mode shown by having the
  compiled default actually start being used.  The correct default here
  is 0.
- Fix ethernet on imx7d-sdb
- Fix a regression with MTD NAND devices when OF_LIVE is enabled
2021-09-28 13:57:56 -04:00
Rasmus Villemoes
24ea366add imx: imx7d-sdb: fix ethernet, sync .dts with linux
Commit 0d52bab46 (mx7dsabre: Enable DM_ETH) changed these flags from 0
(aka GPIO_ACTIVE_HIGH) to GPIO_ACTIVE_LOW. It claimed to "Also sync
device tree with v5.5-rc1", but in the linux tree, these gpios have
always been GPIO_ACTIVE_HIGH ever since this node was introduced
around v4.13 (linux commit 184f39b5).

I'm guessing that the reason for the GPIO_ACTIVE_LOW was to work
around the behaviour of the soft-spi driver back then, which
effectively defaulted to spi-mode 3 and not 0. That was arguably a bug
in the soft-spi driver, which then got fixed in 0e146993bb (spi: add
support for all spi modes with soft spi), but that commit then broke
ethernet on this board.

Fix it by setting the gpios as active high, which as a bonus actually
brings us in sync with the .dts in the linux source tree.

Without this, one gets

    Net:   Could not get PHY for FEC0: addr 0
    No ethernet found.

With this, ethernet (at least ping and tftp) works as expected from
the U-Boot shell.

Cc: Fabio Estevam <festevam@gmail.com>
Cc: Joris Offouga <offougajoris@gmail.com>
Cc: "Christian Bräuner Sørensen" <yocto@bsorensen.net>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2021-09-28 12:03:21 -04:00
Patrice Chotard
b8919eaa68 mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interface
nand_dt_init() is still using fdtdec_xx() interface.
If OF_LIVE flag is enabled, dt property can't be get anymore.
Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue.

For doing this, node parameter type must be ofnode.

First idea was to convert "node" parameter to ofnode type inside
nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode()
is not bijective, in case OF_LIVE flag is enabled, it performs an assert().

So, this leads to update nand_chip struct flash_node field from int to
ofnode and to update all nand_dt_init() callers.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-28 12:03:21 -04:00
Marek Vasut
b81ce79df0 mtd: spi: Set CONFIG_SF_DEFAULT_MODE default to 0
Before e2e95e5e25 ("spi: Update speed/mode on change") most systems
silently defaulted to SF bus mode 0. Now the mode is always updated,
which causes breakage. It seems most SF which are used as boot media
operate in bus mode 0, so switch that as the default.

This should fix booting at least on Altera SoCFPGA, ST STM32, Xilinx
ZynqMP, NXP iMX and Rockchip SoCs, which recently ran into trouble
with mode 3. Marvell Kirkwood and Xilinx microblaze need to be checked
as those might need mode 3.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Cc: Andreas Biessmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
2021-09-28 12:03:21 -04:00
Patrick Delaunay
a4f2d83414 mtd: spi: nor: force mtd name to "nor%d"
Force the mtd name of spi-nor to "nor" + the driver sequence number:
"nor0", "nor1"... beginning after the existing nor devices.

This patch is coherent with existing "nand" and "spi-nand"
mtd device names.

When CFI MTD NOR device are supported, the spi-nor index is chosen after
the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS.

When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config
is replaced by to cfi_flash_num_flash_banks in the include file
mtd/cfi_flash.h.

This generic name "nor%d" can be use to identify the mtd spi-nor device
without knowing the real device name or the DT path of the device,
used with API get_mtd_device_nm() and is used in mtdparts command.

This patch also avoids issue when the same NOR device is present 2 times,
for example on STM32MP15F-EV1:

STM32MP> mtd list
SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \
total 64 MiB

List of MTD devices:
* nand0
  - type: NAND flash
  - block size: 0x40000 bytes
  - min I/O: 0x1000 bytes
  - OOB size: 224 bytes
  - OOB available: 118 bytes
  - ECC strength: 8 bits
  - ECC step size: 512 bytes
  - bitflip threshold: 6 bits
  - 0x000000000000-0x000040000000 : "nand0"
* mx66l51235l
  - device: mx66l51235l@0
  - parent: spi@58003000
  - driver: jedec_spi_nor
  - path: /soc/spi@58003000/mx66l51235l@0
  - type: NOR flash
  - block size: 0x10000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "mx66l51235l"
* mx66l51235l
  - device: mx66l51235l@1
  - parent: spi@58003000
  - driver: jedec_spi_nor
  - path: /soc/spi@58003000/mx66l51235l@1
  - type: NOR flash
  - block size: 0x10000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "mx66l51235l"

The same mtd name "mx66l51235l" identify the 2 instances
mx66l51235l@0 and mx66l51235l@1.

This patch fixes a ST32CubeProgrammer / stm32prog command issue
with nor0 target on STM32MP157C-EV1 board introduced by
commit b7f060565e ("mtd: spi-nor: allow registering multiple MTDs when
DM is enabled").

Fixes: b7f060565e ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
[trini: Add <dm/device.h> to <mtd.h> for DM_MAX_SEQ_STR]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-28 12:03:20 -04:00
Patrick Delaunay
b218f865e8 mtd: cfi_flash: use cfi_flash_num_flash_banks only when supported
When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated,
CONFIG_SYS_MAX_FLASH_BANKS is replaced by cfi_flash_num_flash_banks,
but this variable is defined in drivers/mtd/cfi_flash.c, which is
compiled only when CONFIG_FLASH_CFI_DRIVER is activated, in U-Boot
or in SPL when CONFIG_SPL_MTD_SUPPORT is activated.

This patch deactivates this feature CONFIG_SYS_MAX_FLASH_BANKS_DETECT
when flash cfi driver is not activated to avoid compilation issue in
the next patch, when CONFIG_SYS_MAX_FLASH_BANKS is used in spi_nor_scan().

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-09-28 08:35:19 -04:00
Tom Rini
0b9bcf665c Prepare v2021.10-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 09:34:20 -04:00
Tom Rini
78c16a969f Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- turris_omnia: fix leaked mtd device (Marek)
- phy: marvell: cp110: Fix SATA invert polarity (Denis)
2021-09-27 07:41:03 -04:00
Denis Odintsov
ccee8ea1dd phy: marvell: cp110: Support SATA invert polarity
In commit b24bb99d cp110 configuration initially done in u-boot
was removed and delegated to atf firmware as smc call.
That commit didn't account for later introduced in d13b740c SATA invert polarity support.

This patch adds support of passing SATA invert polarity flags to atf
firmware during the smc call.

Signed-off-by: Denis Odintsov <shiva@mail.ru>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-27 07:46:13 +02:00
Marek Behún
0ef476e68e arm: mvebu: turris_omnia: fix leaked mtd device
After getting MTD device via get_mtd_device_nm(), we need to put it with
put_mtd_device(), otherwise we get

  Removing MTD device #0 (mx25l6405d) with use count 1

before booting kernel.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-27 07:41:45 +02:00
Tom Rini
76ad024683 Pull request for efi-2021-10-rc5
Documentation:
 
 * add /config bindings to HTML documentation
 
 UEFI
 
 * Fix number_of_algorithms field in TCG EFI Protocol
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEK7wKXt3/btL6/yA+hO4vgnE3U0sFAmFQCsEACgkQhO4vgnE3
 U0vPzA/9FShpcSFLmAhxCmKlo8SZ/hc1a3NpnJj9MfC1EAVfc+BGc3W8DDKniw1A
 Cl33Sdt7Vm3jKJ9wgUJ8P46SG3bJ6KZOZ9wGyW6WzgGsvxzxaEfX5WVRAQVMj949
 UO9uqjGhEW2gjVpe6B+LTWZ90ZA6e/m4X+17nkXWoOKThiDQCB2VVOxg4RrAPHXZ
 Z71J8vui0ZCxB7CXH2X3cu5XNZ9wI1edhth2oe+tr/Etp+EXO0ONF/cS+Kgfin7F
 F2K6+n7GVGUmeW/Cf2qXyHbH8IsugALFcZWOXDcz1p9YoLjMiN/XDyEESBBuNl74
 VlV4+FlgOX/UZ/PnjAtnWseZGehj3P2cXKPer+GNOPqnuQrnU6Upfl3GIOcTEnkp
 JGCttkkvIkwvmD7+4Wr6zBLmv+WQfodMjNCN4dE94bPhiosDJ6url6YNcIt5flS4
 OYbmOworo+NLoUWh6/FTE/dHwKdnkzccV9nR36ujMdhjh4RE2tejjleLiWOzsvoF
 sqsGY3VOc4II4KywLsjb9S39esRbI5BzuOV7XLIv7/XzvKPhYJy0MRRkLPowLGSR
 H0R7cFsaBGBtkD+7xP3Ew8hk7/S/KQO4dCjeG9YwBbGYSOeK+t/j8eZCVR+BdzXI
 MG6Xnv2LqTj8QiXQ3N8Ko5esBEh10cEQh+j4riZNWy9t0gCqctk=
 =3J1S
 -----END PGP SIGNATURE-----

Merge tag 'efi-2021-10-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2021-10-rc5

Documentation:

* add /config bindings to HTML documentation

UEFI

* Fix number_of_algorithms field in TCG EFI Protocol
2021-09-26 14:15:14 -04:00
Ruchika Gupta
346cee3ac5 efi_loader: Fix spec ID event creation
TCG EFI Protocol Specification defines the number_of_algorithms
field in spec ID event to be equal to the number of active
algorithms supported by the TPM device. In current implementation,
this field is populated with the count of all algorithms supported
by the TPM which leads to incorrect spec ID event creation.

Similarly, the algorithm array in spec ID event should be a variable
length array with length being equal to the number_of_algorithms field.
In current implementation this is defined as a fixed length array
which has been fixed.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
CC: Masahisa Kojima <masahisa.kojima@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-25 12:31:08 +02:00
Simon Glass
269d2d14d2 doc: Add mention of the /config binding
The devicetree binding files are in their own directory and use a simple
text format. Add a link for the binding for the /config node, since it
is otherwise hard to find.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-25 12:30:54 +02:00
Tom Rini
8284d6f838 Merge branch '2021-09-24-assorted-minor-updates'
- Assorted bugfixes, MAINTAINER updates and dead code removal
2021-09-24 14:28:54 -04:00
Simon Guinot
19de51f7a5 arm: orion5x: edminiv2: change maintainer
Since Albert Aribaud is not maintaining anymore the LaCie Ethernet Disk
mini V2 board, then I am taking over.

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-24 12:09:47 -04:00
Patrick Delaunay
b071431d52 mtd: remove SPEAr flash driver st_smi
Remove the driver st_smic.c used in SPEAr products and the associated
config CONFIG_ST_SMI; this driver is no more used in U-Boot after the
commit 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr
support").

Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-24 12:09:47 -04:00
Martyn Welch
cff383caa3 Taking over responsibility for GE boards from Sebastian
I am taking over responsibility for the GE board from Sebastian Reichel.
Updating the MAINTAINERS files to reflect this.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-09-24 12:09:47 -04:00
Patrick Delaunay
6941ff7619 MAINTAINERS: remove SPEAR entry
As the lastest spear directories are removed, delete the associated entry
in the MAINTAINERS file:
- arch/arm/cpu/arm926ejs/spear/
- arch/arm/include/asm/arch-spear/

Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-24 12:09:46 -04:00
Heinrich Schuchardt
3bd0e2caa9 fs: avoid superfluous messages
Output like the following is quite irritating:

    => bootefi hello
    Scanning disk mmc2.blk...
    No valid Btrfs found
    Bad magic number for SquashFS image.
    ** Unrecognized filesystem type **
    Scanning disk mmc1.blk...
    No valid Btrfs found
    Bad magic number for SquashFS image.
    ** Unrecognized filesystem type **
    Scanning disk mmc0.blk...
    No valid Btrfs found
    Bad magic number for SquashFS image.
    ** Unrecognized filesystem type **

Albeit a whole disk may be formatted with a filesystem in most cases
a partition table is used and the whole disk (partition number 0) doesn't
contain a filesytem. Some partitions may only contain a blob. Not seeing a
filesytem on the whole disk or on any partition is only worth a debug
message.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-24 12:09:46 -04:00
Heinrich Schuchardt
9aab28b6f2 scripts/mailmapper: enable running with Python 3
Our mailmapper script required Python 2 which is no longer maintained.
A main difference when converting to Python 3 is that byte strings are not
character strings. So add conversion and skip over conversion errors.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-24 12:09:46 -04:00
T Karthik Reddy
8870daaa25 test/py: tpm2: Skip tpm pytest based on env variable
Tpm test cases relies on tpm device setup. Provide an environment
variable "env__tpm_device_test_skip = True" to skip the test case
if tpm device is not present.
Only needed will have to add variable to the py-test framework.
Test runs successfully even this variable is absent.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-24 12:09:46 -04:00
Tom Rini
d7ac865b98 Merge git://source.denx.de/u-boot-socfpga
Bugfixes for this one socfpga platform
2021-09-23 08:30:45 -04:00
Tom Rini
014166c561 Merge branch 'master' of git://source.denx.de/u-boot-usb
Late bunch of USB fixes (incl. the xhci usb 3.1 support)
2021-09-23 08:30:22 -04:00
Marek Vasut
532010da67 ddr: altera: use KBUILD_BASENAME instead of __FILE__
The KBUILD_BASENAME contains just the name of the compiled module,
in this case 'sequencer', rather than a full path to the compiled
file. Use it to prevent pulling the full path into the U-Boot binary,
which is useless and annoying.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:31:05 +02:00
Marek Vasut
b207cc92a2 arm: socfpga: vining: Let DWMAC configure PHY reset GPIO
The DM DWMAC driver is perfectly capable of configuring the ethernet
PHY reset GPIO, let the driver do it instead of doing it in the board
file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
cb3ed86cf1 arm: socfpga: vining: Enable DW I2C driver
The Designware I2C IP is used to communicate with I2C peripherals on
SoCFPGA, and required to access I2C EEPROM on this board. Enable it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
c3880e6597 arm: socfpga: vining: Fix UDC controller phandle in DT
The USB peripheral controller is the DWC2 controller 1, not 0.
Update the phandle to fix UDC support on this board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
e21bbffa1d arm: socfpga: vining: Un-disable WDT in DT
The WDT on this system should be enabled, make it so.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
4e106ef9ef arm: socfpga: vining: Set default SPI NOR mode and frequency
The SPI NOR bus mode is 0 on this system, update it accordingly.
Increase frequency to 40 MHz and enable SFDP parsing, since the
flashes on this system support that and it is a huge performance
improvement.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
3cb04b895d arm: socfpga: vining: Set USB gadget manufacturer to Softing with capital S
This was configured in downstream, so it is likely that most of the
custom software used around the device depends on it. Make upstream
compatible.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
513f7d1c5d arm: socfpga: vining: Increase environment size
Increase the environment size from 4k to 16k to prevent
environment from becoming full.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
e984db0f9b arm: socfpga: vining: Drop meaningless comment
The comment is no longer meaningful due to DT conversion, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Mark Kettenis
53eed9adfa usb: xhci-dwc3: Add support for USB 3.1 controllers
This adds support for the DWC_sub31 controllers such as those
found on Apple's M1 SoC.  This version of the controller
seems to work fine with the existing driver.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-09-22 21:29:56 +02:00
Matthias Schiffer
0f513c5975 usb: ehci-mx6: use phy_type from device tree
Allow using different PHY interfaces for multiple USB controllers. When no
value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay
compatible with current board configurations.

This also adds support for the HSIC mode of the i.MX7.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22 21:29:56 +02:00