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Merge branch '2021-09-28-regression-fixes'

Browse source 
- Reintroduce creating internally the "nor%d" style names, in order to
  fix some use U-Boot use-cases involving the "mtd" command.
- Fix a regression over the default SPI bus mode shown by having the
  compiled default actually start being used.  The correct default here
  is 0.
- Fix ethernet on imx7d-sdb
- Fix a regression with MTD NAND devices when OF_LIVE is enabled
This commit is contained in:
Tom Rini 2021-09-28 13:57:56 -04:00
commit b5d7a200a8
13 changed files with 52 additions and 32 deletions
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6
arch/arm/dts/imx7d-sdb.dts
View file

@ -44,9 +44,9 @@
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi4>;
gpio-sck = <&gpio1 13 GPIO_ACTIVE_LOW>;
gpio-mosi = <&gpio1 9 GPIO_ACTIVE_LOW>;
cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
gpio-sck = <&gpio1 13 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio1 9 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;

2
drivers/mtd/nand/raw/denali.c
View file

@ -1246,7 +1246,7 @@ int denali_init(struct denali_nand_info *denali)
denali->active_bank = DENALI_INVALID_BANK;
chip->flash_node = dev_of_offset(denali->dev);
chip->flash_node = dev_ofnode(denali->dev);
/* Fallback to the default name if DT did not give "label" property */
if (!mtd->name)
mtd->name = "denali-nand";

2
drivers/mtd/nand/raw/mxs_nand.c
View file

@ -1379,7 +1379,7 @@ int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info)
nand->options |= NAND_NO_SUBPAGE_WRITE;
if (nand_info->dev)
nand->flash_node = dev_of_offset(nand_info->dev);
nand->flash_node = dev_ofnode(nand_info->dev);
nand->cmd_ctrl = mxs_nand_cmd_ctrl;

27
drivers/mtd/nand/raw/nand_base.c
View file

@ -29,9 +29,6 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <common.h>
#if CONFIG_IS_ENABLED(OF_CONTROL)
#include <fdtdec.h>
#endif
#include <log.h>
#include <malloc.h>
#include <watchdog.h>
@ -4576,23 +4573,20 @@ ident_done:
EXPORT_SYMBOL(nand_get_flash_type);
#if CONFIG_IS_ENABLED(OF_CONTROL)
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node)
{
int ret, ecc_mode = -1, ecc_strength, ecc_step;
const void *blob = gd->fdt_blob;
const char *str;
ret = fdtdec_get_int(blob, node, "nand-bus-width", -1);
ret = ofnode_read_s32_default(node, "nand-bus-width", -1);
if (ret == 16)
chip->options |= NAND_BUSWIDTH_16;
if (fdtdec_get_bool(blob, node, "nand-on-flash-bbt"))
if (ofnode_read_bool(node, "nand-on-flash-bbt"))
chip->bbt_options |= NAND_BBT_USE_FLASH;
str = fdt_getprop(blob, node, "nand-ecc-mode", NULL);
str = ofnode_read_string(node, "nand-ecc-mode");
if (str) {
if (!strcmp(str, "none"))
ecc_mode = NAND_ECC_NONE;
@ -4608,9 +4602,10 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
ecc_mode = NAND_ECC_SOFT_BCH;
}
ecc_strength = fdtdec_get_int(blob, node, "nand-ecc-strength", -1);
ecc_step = fdtdec_get_int(blob, node, "nand-ecc-step-size", -1);
ecc_strength = ofnode_read_s32_default(node,
"nand-ecc-strength", -1);
ecc_step = ofnode_read_s32_default(node,
"nand-ecc-step-size", -1);
if ((ecc_step >= 0 && !(ecc_strength >= 0)) ||
(!(ecc_step >= 0) && ecc_strength >= 0)) {
@ -4627,13 +4622,13 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
if (ecc_step > 0)
chip->ecc.size = ecc_step;
if (fdt_getprop(blob, node, "nand-ecc-maximize", NULL))
if (ofnode_read_bool(node, "nand-ecc-maximize"))
chip->ecc.options |= NAND_ECC_MAXIMIZE;
return 0;
}
#else
static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node)
{
return 0;
}
@ -4657,7 +4652,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
struct nand_flash_dev *type;
int ret;
if (chip->flash_node) {
if (ofnode_valid(chip->flash_node)) {
ret = nand_dt_init(mtd, chip, chip->flash_node);
if (ret)
return ret;

2
drivers/mtd/nand/raw/stm32_fmc2_nand.c
View file

@ -823,7 +823,7 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, ofnode node)
nand->cs_used[i] = cs[i];
}
nand->chip.flash_node = ofnode_to_offset(node);
nand->chip.flash_node = node;
return 0;
}

2
drivers/mtd/nand/raw/sunxi_nand.c
View file

@ -1711,7 +1711,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
* in the DT.
*/
nand->ecc.mode = NAND_ECC_HW;
nand->flash_node = node;
nand->flash_node = offset_to_ofnode(node);
nand->select_chip = sunxi_nfc_select_chip;
nand->cmd_ctrl = sunxi_nfc_cmd_ctrl;
nand->read_buf = sunxi_nfc_read_buf;

2
drivers/mtd/spi/Kconfig
View file

@ -57,7 +57,7 @@ config SF_DEFAULT_CS
config SF_DEFAULT_MODE
hex "SPI Flash default mode (see include/spi.h)"
depends on SPI_FLASH || DM_SPI_FLASH
default 3
default 0
help
The default mode may be provided by the platform
to handle the common case when only a single serial

17
drivers/mtd/spi/spi-nor-core.c
View file

@ -10,6 +10,7 @@
*/
#include <common.h>
#include <flash.h>
#include <log.h>
#include <watchdog.h>
#include <dm.h>
@ -26,6 +27,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/spi-nor.h>
#include <mtd/cfi_flash.h>
#include <spi-mem.h>
#include <spi.h>
@ -3664,6 +3666,11 @@ int spi_nor_scan(struct spi_nor *nor)
struct mtd_info *mtd = &nor->mtd;
struct spi_slave *spi = nor->spi;
int ret;
int cfi_mtd_nb = 0;
#ifdef CONFIG_SYS_MAX_FLASH_BANKS
cfi_mtd_nb = CONFIG_SYS_MAX_FLASH_BANKS;
#endif
/* Reset SPI protocol for all commands. */
nor->reg_proto = SNOR_PROTO_1_1_1;
@ -3715,8 +3722,12 @@ int spi_nor_scan(struct spi_nor *nor)
if (ret)
return ret;
if (!mtd->name)
mtd->name = info->name;
if (!mtd->name) {
sprintf(nor->mtd_name, "%s%d",
MTD_DEV_TYPE(MTD_DEV_TYPE_NOR),
cfi_mtd_nb + dev_seq(nor->dev));
mtd->name = nor->mtd_name;
}
mtd->dev = nor->dev;
mtd->priv = nor;
mtd->type = MTD_NORFLASH;
@ -3821,7 +3832,7 @@ int spi_nor_scan(struct spi_nor *nor)
nor->rdsr_dummy = params.rdsr_dummy;
nor->rdsr_addr_nbytes = params.rdsr_addr_nbytes;
nor->name = mtd->name;
nor->name = info->name;
nor->size = mtd->size;
nor->erase_size = mtd->erasesize;
nor->sector_size = mtd->erasesize;

3
include/dm/device.h
View file

@ -207,8 +207,9 @@ struct udevice_rt {
u32 flags_;
};
/* Maximum sequence number supported */
/* Maximum sequence number supported and associated string length */
#define DM_MAX_SEQ 999
#define DM_MAX_SEQ_STR 3
/* Returns the operations for a device */
#define device_get_ops(dev) (dev->driver->ops)

6
include/linux/mtd/rawnand.h
View file

@ -891,7 +891,7 @@ struct nand_chip {
void __iomem *IO_ADDR_R;
void __iomem *IO_ADDR_W;
int flash_node;
ofnode flash_node;
uint8_t (*read_byte)(struct mtd_info *mtd);
u16 (*read_word)(struct mtd_info *mtd);
@ -973,12 +973,12 @@ struct nand_chip {
static inline void nand_set_flash_node(struct nand_chip *chip,
ofnode node)
{
chip->flash_node = ofnode_to_offset(node);
chip->flash_node = node;
}
static inline ofnode nand_get_flash_node(struct nand_chip *chip)
{
return offset_to_ofnode(chip->flash_node);
return chip->flash_node;
}
static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)

2
include/linux/mtd/spi-nor.h
View file

@ -7,6 +7,7 @@
#ifndef __LINUX_MTD_SPI_NOR_H
#define __LINUX_MTD_SPI_NOR_H
#include <mtd.h>
#include <linux/bitops.h>
#include <linux/mtd/cfi.h>
#include <linux/mtd/mtd.h>
@ -561,6 +562,7 @@ struct spi_nor {
int (*ready)(struct spi_nor *nor);
void *priv;
char mtd_name[MTD_NAME_SIZE(MTD_DEV_TYPE_NOR)];
/* Compatibility for spi_flash, remove once sf layer is merged with mtd */
const char *name;
u32 size;

5
include/mtd.h
View file

@ -6,10 +6,15 @@
#ifndef _MTD_H_
#define _MTD_H_
#include <dm/device.h>
#include <jffs2/load_kernel.h>
#include <linux/mtd/mtd.h>
int mtd_probe_devices(void);
void board_mtdparts_default(const char **mtdids, const char **mtdparts);
/* compute the max size for the string associated to a dev type */
#define MTD_NAME_SIZE(type) (sizeof(MTD_DEV_TYPE(type)) + DM_MAX_SEQ_STR)
#endif /* _MTD_H_ */

8
include/mtd/cfi_flash.h
View file

@ -157,11 +157,17 @@ struct cfi_pri_hdr {
* Use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined
*/
#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
#define CONFIG_SYS_MAX_FLASH_BANKS (cfi_flash_num_flash_banks)
#define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
/* map to cfi_flash_num_flash_banks only when supported */
#if IS_ENABLED(CONFIG_FLASH_CFI_DRIVER) && \
(!IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_SPL_MTD_SUPPORT))
#define CONFIG_SYS_MAX_FLASH_BANKS (cfi_flash_num_flash_banks)
/* board code can update this variable before CFI detection */
extern int cfi_flash_num_flash_banks;
#else
#define CONFIG_SYS_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
#endif
#else
#define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
#endif