Add clock enable functionality in zynqmp clock driver to enable
clocks from peripheral drivers using clk_ops.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver
doesn't have enable function. Remove this checking from drivers and create
dummy enable function as was done for clk_fixed_rate driver by
commit 6bf6d81c11 ("clk: fixed_rate: add dummy enable() function").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to clear reset reason register because it is protected by
PMUFW already which is reported when verbose log is enabled as:
pm_core.c@733 APU> No write permission to 0xFF5E0220
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Due to pointer arithmetic, "sizeof(u32) * ARCH_DMA_MINALIGN" is
subtracted. It seems that the original intention was to just subtract
ARCH_DMA_MINALIGN. Fix it.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Currently support for the Samsung serial port driver is part
of CONFIG_S5P which controls selection of several drivers for
the S5P family. Give it its own config option such that we
can use it on other SoCs as well.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Remove pmic_max8997/8 files about no-DM.
There are already existed max8997/8 as driver-model.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Convert to driver model about power_key_pressed.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
After 401d1c4f5d ("common: Drop asm/global_data.h from common header")
build fails with :
drivers/button/button-uclass.c:13:5: error: conflicting types for 'button_get_by_label'
int button_get_by_label(const char *label, struct udevice **devp)
^~~~~~~~~~~~~~~~~~~
Adding struct udevice forward declaration in button.h solves the build error.
Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header")
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix the 'devivce' typo in arch/sandbox/include/asm/clk.h.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The commit 6337d53fdf ("arm: dts: sync am33xx with Linux 5.9-rc7")
synchronized the am33xx-clocks.dtsi file with Linux 5.9-rc7 with the
exception of two nodes. I think I was wrong and it is better to keep
the two files similar and possibly make changes to the *-u-boot.dtsi
files.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The previous version printed the same debug message for both the enable
and disable routines without highlighting whether you were enabling or
disabling the module. It is now clear whether you are enabling or
disabling the module.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
When trying to port our mpc8309-based board to DM_ETH, on top of
Heiko's patches, I found that nothing in mdio-uclass.c seems to
support the use of a fixed-link subnode of the ethernet DT node. That
is, the ethernet node looks like
enet0: ethernet@2000 {
device_type = "network";
compatible = "ucc_geth";
...
fixed-link {
reg = <0xffffffff>;
speed = <100>;
full-duplex;
};
but the current code expects there to be phy-handle property. Adding
that, i.e.
phy-handle = <&enet0phy>;
enet0phy: fixed-link {
just makes the code break a few lines later since a fixed-link node
doesn't have a reg property. Ignoring the dtc complaint and adding a
dummy reg property, we of course hit "can't find MDIO bus for node
ethernet@2000" since indeed, the parent node of the phy node does not
represent an MDIO bus. So that's obviously the wrong path.
Now, in linux, it seems that the fixed link case is treated specially;
in the of_phy_get_and_connect() which roughly corresponds to
dm_eth_connect_phy_handle() we have
if (of_phy_is_fixed_link(np)) {
ret = of_phy_register_fixed_link(np);
...
} else {
phy_np = of_parse_phandle(np, "phy-handle", 0);
...
}
phy = of_phy_connect(dev, phy_np, hndlr, 0, iface);
And U-Boot's phy_connect() does have support for fixed-link
subnodes. Calling phy_connect() directly with NULL bus and a dummy
address does seem to make the ethernet work.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
i2c changes for v2021.04
new feature:
- Allow disabling driver model for I2C in SPL
fixes:
- i2c-gpio: Fix GPIO output
- at91: fix crash when using 'i2c probe'
Our current implementation of
EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() truncates multi
part device paths after the first part. We should convert all parts.
Render device path instance ends as commas. This is not explicitly
described in the UEFI spec but mimics what EDK II does.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Test EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() for a multi
part device path.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
With the last update of conf.py the references to U-Boot where replaced by
references to Linux.
Fix the project references in the generated documentation.
Reported-by: Simon Glass <sjg@chromium.org>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Fixes: 98f01cf7a2 ("doc: update Kernel documentation build system")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The last block is of size media->block_size
Signed-off-by: Jesper Schmitz Mouridsen <jesper@schmitz.computer>
Simplify expression.
Apply same change to efi_disk_write_blocks().
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Use CONFIG_IS_ENABLED() macro, which provides more convenient
way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs
for both SPL and U-Boot proper.
CONFIG_IS_ENABLED(DM_I2C) expands to:
- 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y',
- 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y',
- 0 otherwise.
All occurences were replaced automatically using these bash cmds:
$ find . -type f -exec sed -i
's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Drop CONFIG_DM_I2C undefs from board header files, and make them
disabled on these boards in defconfigs instead.
Disabling on Kconfig symbol was done automatically with this script:
cd configs
files=(*ls1046a*)
files2=(*T104*RDB*)
files3=(ls1021atwr_*)
files4=("imx8mp_evk_defconfig phycore-imx8mp_defconfig")
combine=("${files[@]}" "${files2[@]}" "${files3[@]}" "${files4[@]}")
cd ..
for item in ${combine[*]}
do
echo "Adjusting $item"
echo "# CONFIG_SPL_DM_I2C is not set" >> configs/$item
make $item && make savedefconfig && cp defconfig configs/$item
done
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present if U-Boot proper uses driver model for I2C, then SPL has to
also. While this is desirable, it places a significant barrier to moving
to driver model in some cases. For example, with a space-constrained SPL
it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
adjusting some drivers.
This patch introduces a separate Kconfig symbols for enabling DM_I2C and
DM_I2C_GPIO support in SPL.
This will also help to get away from dirty workarounds to
achieve non-DM I2C support for SPL, which is currently used in some
board header files like:
ifdef CONFIG_SPL_BUILD
undef CONFIG_DM_I2C
endif
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
When issuing 'i2c probe', the driver was crashing, because at probe
there is a request with zero length buffer to write to i2c bus.
The xfer_msg function assumes the buffer is always there, and never
checks for the buffer length.
=> i2c dev 0
Setting bus to 0
=> i2c probe
Valid chip addresses:
data abort
pc : [<7ffa97dc>] lr : [<7ffa96f8>]
reloc pc : [<66f277dc>] lr : [<66f276f8>]
sp : 7fb7c110 ip : 7ff87a28 fp : 7ff99938
r10: 00000002 r9 : 7fb7dec0 r8 : 00000000
r7 : e181c600 r6 : 7fb88c20 r5 : 00000000 r4 : 7fb7c128
r3 : 00000000 r2 : 00000001 r1 : 00000000 r0 : 00000009
Flags: nZCv IRQs off FIQs off Mode SVC_32
Code: eb0092f4 e1a00005 e8bd81f0 e594300c (e5d33000)
Resetting CPU ...
Fixes: 8800e0fa20 ("i2c: atmel: add i2c driver")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The dm_gpio_set_dir_flags function cannot be used to update the
configuration of a GPIO pin because it does a bitwise OR with the
existing flags. Looks like commit 788ea83412 ("gpio: add function
_dm_gpio_set_dir_flags") has introduced this behaviour and the i2c-gpio
driver has been broken since.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Heiko Schocher <hs@denx.de>
CC: Patrick Delaunay <patrick.delaunay@st.com>
R-Car3 can have multiple regions of type memory in DT, enable
CONFIG_PCI_REGION_MULTI_ENTRY to handle those instead of using
just one of the memory regions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Because the first PCIExAR(n) register is configured with the mapping,
It is the second PCIExAR(n) register that must be written with 0, not
the last one. Update the n from 4 to 1 to select the correct register.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Both the map address and mask must be power of two per documentation,
adjust the code accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add code to access the PCIe root bus space and configure it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
