Commit graph

2951 commits

Author SHA1 Message Date
Tom Rini
260d4962e0 Merge tag v2023.07-rc4 into next
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-12 14:55:33 -04:00
Andre Przywara
db93db92b4 freescale: vsc3316_3308: fix header inclusion guard
It seems like the header inclusion guard for some Freescale crosspoint
switch header was misspelled.

Make the preprocessor symbol for the #ifndef and #define lines the
same, so that the double inclusion protection works as expected.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-05-31 12:17:00 -04:00
Peng Fan
8b0784ccbe imx9: imx93_evk: update ddr timing file
Update DDR timing file generated by DDR Config Tool
1. Dynamic refresh rate is set by default
2. The 3rd freq will be 625MTS based on power and performance better than 100MTS.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:41 +02:00
Peng Fan
d59b9c38c2 imx9: imx93_evk: add low drive mode support on 11x11 EVK
Add a static u-boot config for i.MX93 low drive mode support. When
low drive mode is enabled, VDD_SOC is set to 0.75V. Bus clocks,
A55 core clock (900Mhz), DDR clock (1866MTS), and some peripherals
clocks (USDHC/FLEXSPI/PDM/DISP_PIX/CAM_PIX) must decrease to meet
max frequencies in low drive mode.

Also set standby voltage for buck1

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:41 +02:00
Peng Fan
99ac6c769f imx: move imx8 sci header file to include/firmware/imx
Move imx8 sci header file to include/firmware/imx, then we could
use build macro to reuse some i.MX8 drivers for i.MX9, such as
drivers/cpu/imx8_cpu.c.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2023-05-21 16:54:32 +02:00
Troy Kisky
e7b03ee0fc freescale: common: pfuze: define pfuze_mode_init only if defined(CONFIG_DM_PMIC)
pfuze_mode_init calls pmic_reg_read which is only available from

obj-$(CONFIG_$(SPL_TPL_)DM_PMIC) += pmic-uclass.o

Prepare for conversion of defined(CONFIG_DM_PMIC) to
CONFIG_IS_ENABLED(DM_PMIC).

Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-10 16:45:42 -04:00
Marek Vasut
35d48ea8c0 arch: m68k: Use existing CONFIG_MCFTMR instead of CFG_MCFTMR
There is an existing CONFIG_MCFTMR Kconfig symbol,
use it and drop all other instances of CFG_MCFTMR.
This duality is likely a result of bogus conversion
to Kconfig.

Fixes: 7ff7b46e6c ("m68k: rename CONFIG_MCFTMR to CFG_MCFTMR")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-04-15 21:36:07 +02:00
Ioana Ciornei
8ac04e9062 board: freescale: lx2160a: remove the PL01X device instantiation
There is no need for the board file to instantiate a PL01X platform
device anymore. This is all taken care of by the DM code which now will
probe the device based on the DT node.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-04 17:31:47 +08:00
Marek Vasut
599474120a arm64: imx8mp: Drop EQoS GPR[1] board workaround
The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-03-30 13:51:33 +02:00
Fabio Estevam
0d29759776 mx51evk: Remove unused mx51evk_video.c file
Since commit 1fa43cad86 ("video: Drop references to CONFIG_VIDEO et al")
the mx51evk_video.c is no longer used.

Remove the unused file.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-03-30 08:40:27 +02:00
Fabio Estevam
7985968e0a mx53loco: Remove unused mx53loco_video.c file
Since commit 1fa43cad86 ("video: Drop references to CONFIG_VIDEO et al")
the mx53loco_video.c is no longer used.

Remove the unused file.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-03-30 08:40:27 +02:00
Fabio Estevam
e54882aefb mx6sabresd: Convert to DM_PMIC
The usage of DM_PMIC is preferred, so convert to it.

This also brings the benefit of causing a significant amount
of code removal.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:39 +02:00
Fabio Estevam
c90ba67c4c mx6sabreauto: Convert to DM_PMIC
The usage of DM_PMIC is preferred, so convert to it.

This also brings the benefit of causing a significant amount
of code removal.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:39 +02:00
Fabio Estevam
1071acf1b0 mx6sxsabreauto: Remove myself from MAINTAINERS
I don't have access to the mx6sxsabreauto board, so remove myself
from the MAINTAINERS entry and add Peng instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:39 +02:00
Fabio Estevam
ca038fc033 mx53loco: Add DM_I2C support
The conversion to DM_I2C is mandatory, so add support
for it.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-03-29 22:27:38 +02:00
Ye Li
4dfb2196cd imx8ulp_evk: Clear data at fdt_addr_r before booting kernel
When using dual boot mode, the DDR won't be reset when APD power off
or reboot. It has possibility that obsolete fdt data existing on
fdt_addr_r address. Then even nothing in EFI partitions, the distro boot
still continue to parse fdt and get uboot crashed.

Clear the data at fdt_addr_r, so the fdt header check in above case
will not pass.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:43 +02:00
Peng Fan
9b7e39b6c1 imx8ulp_evk: disable overflow of port0 for LPAV
Bit0: Port 0 behavior when bandwidth maximized. Set to 1 to allow overflow

With overflow set, we see some issue that A35 may not able to get enough
bandwidth and A35 will report hrtimer takes too much time, workqueue
lockup. With overflow cleared, the issues are gone.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:43 +02:00
Ye Li
6c01ca0a53 imx8ulp_evk: Update DDR ports arbitration for DCNANO underrun
To resolve DCNANO underrun issue, change the DDR Port 0 arbitration
from round robin fashion to fixed priority level 1, while other ports
are not assigned any priority, so they will be serviced in round robin
fashion if there is no active request from Port 0.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
74a39c15c3 imx8ulp_evk: Change to use DDR driver
Remove the DDR initialization codes from board and enable the iMX8ULP
DDR driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
2023-03-29 20:15:42 +02:00
Jacky Bai
fd3cb1d977 imx8ulp_evk: Update the DDR timing
Update the dram timing to support PLL bypass mode
for F1.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
cf35290258 imx: imx8ulp: Configure XRDC PDAC and MSC for DBD owner=S400 only
This patch is used to support DBD owner fuse changed to S400 only.
The XRDC PDAC2 for LPAV pbridge5 and MSC1/2/3 for GPIO and LPAV are not
configured by S400 default setting.  So these PDAC and MSC are invalid,
only DBD owner can access the corresponding resources.

We have to configure necessary PDAC and MSC for SPL before DDR
initialization.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
8b956bdddd imx: imx8ulp: Adjust handshake to sync TRDC and XRDC completion
To fit the DBD_EN fused part, we re-design the TRDC and XRDC assignment.
M33 will be the TRDC owner and needs to configure TRDC. A35 is the
XRDC owner, ATF will configure XRDC.

The handshake between U-boot and M33 image is used to sync TRDC and
XRDC configuration completion. Once the handshake is done, A35 and M33
can access the allowed resources in others domain.

The handshake is needed when M33 is booted or DBD_EN fused, because both
cases will enable the TRDC. If handshake is timeout, the boot will hang.
We use SIM GPR0 to pass the info from SPL to u-boot, because before the
handshake, u-boot can't access SEC SIM and FSB.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2023-03-29 20:15:42 +02:00
Ye Li
f3272355cd imx: imx8ulp: Get chip revision from Sentinel
In both SPL and u-boot, after probing the S400 MU, get the chip revision,
lifecycle and UID from Sentinel.
Update get_cpu_rev to use the chip revision not hard coded it for A0

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:41 +02:00
Tom Rini
605bc145f9 Merge branch 'master' into next 2023-03-27 15:19:57 -04:00
Angelo Dureghello
791840fdc4 board: m5253demo: remove floating point flash size calculation
This board is using floating point arithmetic to display
the SST39VF6401B flash size.

This actually generates errors with toolchains without
appropriate sw fp math functions available.

SST39VF6401B is the only flash for wich the size is displayed,
it's size is 8192KB and floating point calculation seems not
needed. Removing it.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-03-15 01:52:15 +01:00
Angelo Dureghello
7ff7b46e6c m68k: rename CONFIG_MCFTMR to CFG_MCFTMR
This is not a Kconfig option so changing to _CFG.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:41:57 +01:00
Ioana Ciornei
a33b8baf20 board: freescale: ls1088a: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Ioana Ciornei
6bd026d7f7 board: freescale: ls2080aqds: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Ioana Ciornei
c45e8fe3bf board: freescale: ls2080rdb: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Ioana Ciornei
6419072880 board: freescale: lx2160a: remove code under !CONFIG_DM_ETH
Now that DM_ETH is enabled by default, there is no point in keeping the
non-DM_ETH code which initialized the ethernet interfaces.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Ioana Ciornei
e083a47297 board: freescale: lx2160a: remove hardcoded ethernet initialization
The LX2160ARDB board has support for DM_ETH probed devices, which means
that we do not need to manually create an MDIO controller, register it,
create PHYs on it etc.

In order to cleanup the board file a bit, just remove this code entirely.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-03-14 18:56:27 +08:00
Simon Glass
762592cb5c Correct SPL uses of FEC_MXC
This converts 4 usages of this option to the non-SPL form, since there is
no SPL_FEC_MXC defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:41 -05:00
Simon Glass
ae05cf44a1 Correct SPL uses of TARGET_LX2160ARDB
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_TARGET_LX2160ARDB defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
299cca0e72 Correct SPL uses of DWC_ETH_QOS
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_DWC_ETH_QOS defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
7a9ec31f6f freescale: Drop unused zm7300 driver
This is not used anymore. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:50 -05:00
Simon Glass
f0ad69130c freescale: Drop unused vsc3316_3308 driver
This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:50 -05:00
Simon Glass
c67e0881ba imx: Drop CONFIG_USE_PLUGIN
This option is not defined anywhere. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:50 -05:00
Simon Glass
9f793da7f5 freescale: Drop CONFIG_TARGET_MPC8536DS et al
This option as well as CONFIG_TARGET_P1022DS and CONFIG_TARGET_P5020DS
are not defined anywhere. Drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
c6c4ad28aa freescale: Drop unused pq-mds-pib driver
This is not used. Drop the driver and Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
dc1756a4a9 ppc: Drop unused CONFIG_P2020DS
This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Simon Glass
4c7c97d1cf freescale: Drop unused pixis code
Drop this unused code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Tom Rini
1e1cd8eb2d Merge tag 'fsl-qoriq-2023-2-1' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
make QSPI clock selection optional during SoC init for ls102xa
Fix regulator name for ls2_sfp
Update NXP RCW github repo
2023-02-01 09:31:17 -05:00
Fabio Estevam
a25dad7459 ls1021atsn: Suggest the NXP RCW github repo
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/qoriq/qoriq-components/rcw:

"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."

Point to the NXP RCW github repo instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-02-01 14:13:28 +08:00
Fabio Estevam
f0f461287e imx: Suggest the NXP ATF github repo
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/imx/imx-atf:

"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."

Point to the NXP ATF github repo instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2023-01-31 16:02:05 +01:00
Peng Fan
1224dd8b15 imx: mx6sxsabreauto: select DM_SERIAL
Select DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
2108db6c92 imx: mx6sllevk: select DM_SERIAL
Select DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
59bae6f58d imx: mx6sllevk: correct pmic name
The prefix 0 has been dropped in dts, so correct in board file

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
3a6d7ef389 imx: mx6ull/z_14x14_evk: clean up UART iomux
After DM_SERIAL, and set pinctrl_uart1 as pre-reloc, no need initialize
iomux at board file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:33 +01:00
Marek Vasut
a20be24cd4 ARM: imx: Remove PMIC reset configuration from board files
The PCA9450 reset configuration can now be performed by the PCA9450 PMIC
driver itself, remove the hard-coded variant from board code and let the
PMIC driver perform this task using one-liner:

```
$ sed -i '/set WDOG_B_CFG to cold reset/,+2 d' $(git grep -l PCA9450_RESET_CTRL.*0xA1 board/)
```

Venice and i.MX93 EVK required slight manual fix up.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-01-30 23:23:01 +01:00
Tom Rini
6e7df1d151 global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20 12:27:24 -05:00