Commit graph

27486 commits

Author SHA1 Message Date
Masahiro Yamada
f6bab6710c bios_emulator: delete an unnecessary include path
-I$(TOPDIR)/include is defined in the top config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:54 -05:00
Masahiro Yamada
5310b8b2a8 nand_spl: trivial refactoring of makefiles
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:54 -05:00
Masahiro Yamada
ad420282e2 Makefile: descend into subdirectories only when CONFIG_API is defined
All objects under api/ and examples/api/ directories are selected
by CONFIG_API.
So we can move CONFIG_API switch to the top Makefile.

In order to use CONFIG_API, the definition of SUBDIR_EXAMPLES-y
must be moved after "sinlude $(obj)include/autoconf.mk".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:54 -05:00
Masahiro Yamada
017ce20f46 common: Delete unnecessary rules.
The directory tools/ is always built before common/.
So when envcrc tool is necessary in common/Makefile,
it already exists.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:54 -05:00
Masahiro Yamada
3c6dc17eae drivers: delete unnecessary HOSTCFLAGS
HOSTCFLAGS is meaningless because no host programs
are compiled there.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:54 -05:00
Masahiro Yamada
fdc36977b3 Makefile: move some libraries to lib/Makefile
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:54 -05:00
Masahiro Yamada
8a7e7d5697 Makefile: descend into subdirectories only when CONFIG_API is defined
All objects under api/ and examples/api/ directories are selected
by CONFIG_API.
So we can move CONFIG_API switch to the top Makefile.

In order to use CONFIG_API, the definition of SUBDIR_EXAMPLES-y
must be moved after "sinlude $(obj)include/autoconf.mk".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:53 -05:00
Masahiro Yamada
fdb87049d8 examples: delete unnecessary CPPFLAGS
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:53 -05:00
Masahiro Yamada
dbfb4cb52f board: tqm5200: delete its own object make rule
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:53 -05:00
Masahiro Yamada
72b97e4bc9 spieval: Remove remainders of dead board
Commit 69434e4c deleted spieval board support
but it missed to clean up include/configs/spieval.h file.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:53 -05:00
Masahiro Yamada
0e53691529 post: remove unnecessary include path settings
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:53 -05:00
Masahiro Yamada
1500389c2f board: h2200: Delete an unnecessary make rule
We have a generic rule to generate .o file from *.S
in $(TOPDIR)/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:53 -05:00
Masahiro Yamada
2e78e75e1f tools: updater: Remove remainders of dead board
tools/updater needs board/MAI/AmigaOneG3SE board
for compiling.
But AmigaOneG3SE board was already deleted
by Commit 953b7e6.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:53 -05:00
Masahiro Yamada
cfe19f917a tools: imls: Remove a broken and unused tool.
It looks like tools/imls/Makefile is invoked from nowhere.
And also it is broken.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-11-25 10:41:52 -05:00
Igor Grinberg
9dfdcdfed4 gpio_led: add support for inverted polarity
Some GPIO connected LEDs have inverted polarity.
Introduce new config option: CONFIG_GPIO_LED_INVERTED_TABLE for the
specifying the inverted GPIO LEDs list and add support for this in the
gpio_led driver.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Ilya Ledvich <ilya@compulab.co.il>
2013-11-25 10:41:52 -05:00
Igor Grinberg
6516f81b64 gpio_led: check gpio_request() return value
Add a check for the gpio_request() function return value and do not try
to configure the GPIO if the gpio_request() call fails.
Also, print an error message indicating the gpio_request() has failed.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Ilya Ledvich <ilya@compulab.co.il>
2013-11-25 10:41:52 -05:00
Igor Grinberg
1df7bbba24 README: document the CONFIG_GPIO_LED symbol
The CONFIG_GPIO_LED symbol does not have any documentation in the README
file. Document the CONFIG_GPIO_LED symbol.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2013-11-25 10:41:52 -05:00
Tom Rini
4b756b013a hash.c: Correct non-hash subcommand crc32 addr-save support
In the case of not having CONFIG_CMD_HASH but having CONFIG_CMD_CRC32
enabled (and not CONFIG_CRC32_VERIFY), we end up in this part of the
code path on hash_command().  However, we will only have exactly 3 args
here, and 3 > 3 is false, and we will not try and store the hash at the
address given as arg #3.  The next problem however is that we've been
moving argv around so the third value is now in argv[0] not argv[3].

Confirmed on AM335x Beaglebone White.

Signed-off-by: Tom Rini <trini@ti.com>
2013-11-25 10:41:51 -05:00
Thierry Reding
2287286be4 net: rtl8169: Add support for RTL8168d/8111d
This chip is compatible with the existing driver, except that it uses
BAR2 instead of BAR1 for the I/O memory region. Using this patch I can
use the PCIe ethernet interface on the CompuLab Trimslice to boot from
the network.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276477
2013-11-22 17:03:21 -06:00
Thierry Reding
22ece0e2e2 net: rtl8169: Improve cache maintenance
Instead of directly calling the low-level invalidate_dcache_range() and
flush_cache() functions, provide thin wrappers that take into account
alignment requirements.

While at it, fix a case where the cache was flushed but should have been
invalidated, two cases where the buffer data was flushed instead of the
descriptor and a missing cache invalidation before reading the packet
data that the NIC just wrote to memory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276474
2013-11-22 17:03:21 -06:00
Srikanth Thokala
a5144237ac net: zynq_gem: Add d-cache support
Added d-cache support for zynq_gem.c,
Observed a difference of +0.8 MiB/s when downloading
a file of size of 3007944Bytes.

With d-cache OFF:
----------------
Filename 'uImage'.
Load address: 0x800
Loading: #################################################################
         #################################################################
         #################################################################
         ##########
         1.3 MiB/s
done
Bytes transferred = 3007944 (2de5c8 hex)

With d-cache ON:
---------------
Filename 'uImage'.
Load address: 0x800
Loading: #################################################################
         #################################################################
         #################################################################
         ##########
         2.1 MiB/s
done
Bytes transferred = 3007944 (2de5c8 hex)

Changes on zynq_gem for d-cache support:
- Tx and Rx buffers are cache-aligned
- Updated logic for invalidating Rx buffers and flushing Tx buffers.
- Tx and Rx BD's are allocated from non-cacheable region.
  (When BDs are cached, we don't see a consistent link)
- Use TX BD status intead of txsr status checks.

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-11-22 17:03:20 -06:00
David Dueck
f27f3b5266 phy: Use general phy code for smsc lan8720a
Signed-off-by: David Dueck <davidcdueck@googlemail.com>
2013-11-22 17:03:20 -06:00
David Dueck
3a530d1b3e phy: Use supported field during autonegotiation
The current code incorrectly detects gigabit capabilities for some
100Mbit/s phys. (lan8720a)

Signed-off-by: David Dueck <davidcdueck@googlemail.com>
2013-11-22 17:03:20 -06:00
Andrew Ruder
c583ee16cb net: dm9000: random mac address support
When an unprogrammed EEPROM is attached to a dm9000, the dm9000 will
come up with a invalid MAC address of ff:ff:ff:ff:ff:ff.  Add code that
gets enabled if CONFIG_RANDOM_MACADDR is enabled that generates a random
(and valid) locally administered MAC address that allows the system to
network boot until a real MAC address can be configured.

Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
2013-11-22 17:03:19 -06:00
Rojhalat Ibrahim
8712adfd05 drivers/net/e1000: Introduce CONFIG_E1000_NO_NVM
The e1000 driver expects to always have some kind of non-volatile memory
attached directly to the ethernet controller chip. This means that I would
have to add an additional separate flash chip to my custom board just to
store essentially the MAC address. Since I don't want to do that, this patch
introduces a new config option CONFIG_E1000_NO_NVM. If defined it disables
all accesses to the NVM. I have tested the patch with a 82574 controller.

Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de>
2013-11-22 17:03:19 -06:00
Andrew Ruder
8e52533d10 net: tftpsrv: Get correct client MAC address
NetServerEther was not being cleared in the tftp server code, so the
destination MAC address would be whatever the last destination MAC
address was.

Scenario:
U-Boot:
	dhcp
	tftpsrv
Host:
	Send device WRQ
Device:
	Responds with ACK to dhcp server mac address with
	host ip address

By clearing NetServerEther, we force a lookup of the host MAC address
to go with the associated host IP.

Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
2013-11-22 17:03:18 -06:00
Fabio Estevam
e003ba5bfc net: phy: atheros: Fix masks for AR8035 and AR8021
The masks were ignoring the last 4 bits which didn't allow detection differences
between the ar8031 and ar8035.

Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Patch: 288018
2013-11-22 17:03:18 -06:00
Chunhe Lan
3177457853 net/phy: Fix the phy id mask of AR8031
The both AR8031 and AR8035 belong to Atheros 803x serial PHY.
So the phy id mask of AR8031 is the same to the phy id mask
of AR8035. The right mask value is 0x4fffff.

This patch has been tested on the P1010 and P1023.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Patch: 287748
2013-11-22 17:03:18 -06:00
Claudiu Manoil
b1690bc39c net: tsec: Fix mac addr setup portability, cleanup
Fix the 32-bit memory access that is not "endianess safe",
i.e. not giving the desired byte layout for LE cpus:
tempval = *((uint *) (tmpbuf + 4)), where 'char tmpbuf[]'.

Free the stack from rendundant local vars:
tmpbuf[] and i.

Use a portable type (u32) for the 32bit tsec register value
holder: tempval.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
2013-11-22 17:03:17 -06:00
Claudiu Manoil
82ef75ca5c net: tsec: Use portable regs type (uint->u32)
Use cross arch portable u32 instead of uint for the
tsec registers.  Remove the typedefs for the register
struct definitions in the process.  Fix long lines.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
2013-11-22 17:03:17 -06:00
Claudiu Manoil
9c9141fd04 net: tsec: Use portable types and accessors for BDs
Currently, the buffer descriptor (BD) fields cannot be
correctly accessed by a little endian processor.  This
patch fixes the issue by making the access of BDs to be
portable among different cpu architectures.

Use portable data types for the Rx/Tx buffer descriptor
fields.  Use portable I/O accessors to insure that the
big endian BDs are correctly accessed by little endian
cpus too, and to insure proper sync with the H/W.
Removed the redundant RTXBD "volatile" type, as proper
synchronization around BD data accesses is provided by
the I/O accessors now.
The "sparse" tool was also used to verify the correctness
of these changes.

Cc: Scott Wood <scottwood@freescale.com>

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
2013-11-22 17:03:16 -06:00
Claudiu Manoil
18b338fb34 net: tsec: Fix CamelCase issues around BD code
Fix bufPtr and the rxIdx/ txIdx occurrences to
solve the related checkpatch warnings for the
coming patches.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
2013-11-22 17:03:16 -06:00
Claudiu Manoil
5be00a0164 net: fsl_mdio: Fix warnings for __iomem pointers
Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers with
__iomem pointers for tsec. E.g.:

fsl_mdio.c:34:19: warning: incorrect type in argument 1 (different
address spaces)
fsl_mdio.c:34:19:    expected unsigned int volatile [noderef]
<asn:2>*addr
fsl_mdio.c:34:19:    got unsigned int *<noident>
[...]

tsec.c:91:35: warning: incorrect type in argument 1 (different address
spaces)
tsec.c:91:35:    expected struct tsec_mii_mng *phyregs
tsec.c:91:35:    got struct tsec_mii_mng [noderef] <asn:2>*phyregs_sgmii
[...]

tsec.c:680:19: warning: incorrect type in assignment (different address
spaces)
tsec.c:680:19:    expected struct tsec_mii_mng *regs
tsec.c:680:19:    got struct tsec_mii_mng [noderef] <asn:2>*<noident>
[...]

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
2013-11-22 17:03:15 -06:00
Claudiu Manoil
aec84bf671 net: tsec: Cleanup tsec regs init and fix __iomem warns
Remove tsec_t typedef.  Define macros as getters of
tsec and mdio register memory regions, for consistent
initialization of various 'regs' fields and also to
manage overly long initialization lines.
Use the __iomem address space marker to address sparse
warnings in tsec.c where IO accessors are used, like:

tsec.c:394:19: warning: incorrect type in argument 1 (different
address spaces)
tsec.c:394:19:    expected unsigned int volatile [noderef]
<asn:2>*addr
tsec.c:394:19:    got unsigned int *<noident>
[...]

Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers
with __iomem pointers for tsec.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
2013-11-22 17:03:15 -06:00
Claudiu Manoil
b200204e8e net: tsec: Fix priv pointer in tsec_mcast_addr()
Access to privlist[1] (hardcoded referece to the 2nd tsec's
priv area) is neither correct nor does it make sense in the
current context.  Each tsec dev has access to its own priv
instance only, and hence to its own set of group address
registers (GADDR) to filter multicast addresses.

This fix leads to removal of the unused (faulty) privlist[]
and related global static vars.  Note that mcast() can be
called only after eth_device allocation and init, and hence
after priv area allocation, so dev->priv is correctly
initialized upon mcast() call.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Patch: 278990
2013-11-22 17:02:56 -06:00
Claudiu Manoil
876d4515e3 net: tsec: Fix and cleanup tsec_mcast_addr()
There are several implementation issues for tsec_mcast_addr()
addressed by this patch:
* unmanaged, not portable r/w access to registers; fixed with
setbits_be32()/ clrbits_be32()
* use of volatile pointers
* unnecessary forced cast to u8 for the ether_crc() result
* removed redundant parens
* corrected some comment slips

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Patch: 279000
2013-11-22 16:57:47 -06:00
Claudiu Manoil
9c4cffacec net: Fix mcast function pointer prototype
This fixes the following compiler warnings when activating
CONFIG_MCAST_TFTP:

tsec.c: In function 'tsec_mcast_addr':
tsec.c:130:2: warning: passing argument 2 of 'ether_crc' makes pointer
from integer without a cast [enabled by default]
In file included from /work/u-boot-net/include/common.h:874:0,
                 from tsec.c:15:
/work/u-boot-net/include/net.h:189:5: note: expected 'const unsigned
char *' but argument is of type 'u8'
tsec.c: In function 'tsec_initialize':
tsec.c:646:13: warning: assignment from incompatible pointer type
[enabled by default]
eth.c: In function 'eth_mcast_join':
eth.c:358:2: warning: passing argument 2 of 'eth_current->mcast' makes
integer from pointer without a cast [enabled by default]
eth.c:358:2: note: expected 'u32' but argument is of type 'u8 *'

In the eth_mcast_join() implementation, eth_current->mcast()
takes a u8 pointer to the multicast mac address and not a ip
address value as implied by its prototype.

Fix parameter type mismatch for tsec_macst_addr() (tsec.c):
ether_crc() takes a u8 pointer not a u8 value.
mcast() is given a u8 pointer to the multicats mac address.
Update parameter type for the rest of mcast() instances.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Patch: 278989
2013-11-22 16:57:13 -06:00
Alexey Brodkin
ed102be70f net: designware: Fix alignment of buffer descriptors
It's important that buffer descriptors are aligned in accordance to GMAC
data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes)
for every bus width type.

If buffer descriptor is improperly aligned GMAC discards lower bits of
provided address and as a result reads from improper location that
doesn't match expected fields.

Commit ef76025a99 "net: Multiple
updates/enhancements to designware.c" introduced another structure
member "link_printed" right before buffer descriptors while "padding"
member was left untouched. This together with alignment of structure
itself to 16-byte boundary forces buffer descriptoprs always to be
4-byte aligned that causes driver complete disfunction if GMAC bus width
is 64 or 128-bit.

Proposed change makes sure all buffer descriptors are 16-byte (128-bit)
aligned.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Patch: 277902
2013-11-22 16:50:55 -06:00
Alexey Brodkin
227ad7b2b6 net: designware: Respect "bus mode" register contents on SW reset
"bus mode" register contains lots of fields and some of them don't
expect to be written with 0 (zero). So since we're only interested in
resetting MAC (which is done with setting the least significant bit of
this register with "0") I believe it's better to modify only 1 bit of
the register.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Vipin Kumar <vipin.kumar@st.com>
Patch: 277864
2013-11-22 16:50:54 -06:00
Nobuhiro Iwamatsu
47ce889048 net: sh-eth: Add support R8A7791
R8A7791 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7791.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Joe Hershberger <joe.hershberger@gmail.com>
2013-11-22 16:50:54 -06:00
Heiko Schocher
dfcaa61c33 net, phy: fix AR8031 phy_mask
AR8035 driver will be never applied because of wrong mask for
AR8031 driver. Fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reported-by: Pavel Nakonechny <pavel.nakonechny@skitlab.ru>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Patch: 276944
2013-11-22 16:50:54 -06:00
Thierry Reding
65a6691ed3 net: rtl8169: Add support for RTL8168evl/8111evl
This chip is compatible with other RTL8168 chips and can be found on the
NVIDIA Cardhu and Beaver boards.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276475
2013-11-22 16:50:53 -06:00
Thierry Reding
7a36b9c1ac net: rtl8169: Fix format string
currticks() is defined as get_timer(0), which returns an unsigned long,
so use %lu instead of %d to print the result.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276473
2013-11-22 16:50:53 -06:00
Stefano Babic
26b807c4f8 net: add support for extended registers to mdio command
Some phys (Micrel) have additional registers that can
be accessed using a special sequence. This patch allows
to use standard "mdio" command to accesss these registers.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-11-22 16:50:52 -06:00
Stefano Babic
9ced16fefa net: add function to read/write extended registers in Micrel Phy
Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-11-22 16:50:52 -06:00
Stefano Babic
b71841b978 net: add extended function to phy API
Some phys (Micrel) has extended registers that must be
accessed in a special way. Add pointers to the phy driver
structure to allow to use these functions with mdio command.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-11-22 16:50:52 -06:00
Stefano Babic
e8194d58bd net: fix mask for phy Micrel KSZ9031
Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-11-22 16:50:51 -06:00
Stefano Babic
71817a16f1 phy: add missing constants for Micrel KSZ9031
Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-11-22 16:50:51 -06:00
Bhupesh Sharma
4220504767 net/phy: realtek: Fix the PHY ID mask to ensure the correct Realtek PHY is detected
The 'get_phy_driver' code in 'drivers/net/phy/phy.c' uses the following
method to determine which driver is to be loaded for a particular PHY
module:

list_for_each(entry, &phy_drivers) {
	drv = list_entry(entry, struct phy_driver, list);
	if ((drv->uid & drv->mask) == (phy_id & drv->mask))
		return drv;
}

This means that a drv->mask of 0xfffff0 will return incorrect phy driver
for the logic above, even if the drv->uid is anything other than
something ending with a 0x0.

For e.g. if the RTL8211E drv->uid is 0x1cc915 and drv->mask is 0xffffff
and the RTL8211B drv->uid is 0x1cc910 and drv->mask is 0xffffff0, then
the phy driver selected will always be RTL8211B even though the
underlying phy connected on the board is a 8211E module.

This patch fixes this issue.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2013-11-22 16:50:51 -06:00
Arpit Goel
e97a78cfed net: phy/vitesse: Add support for VSC8514 phy module
This patch adds support for VSC8514 PHY module which can be
found on Freescale's T1040RDB boards.

Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2013-11-22 16:50:50 -06:00