On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.
This means we will need to move the stack & heap from OCSRAM to HSM RAM
and reduce the size of BSS and the SPL to allow it to fit properly.
To protect us from overflowing our ~256k of HSM SRAM, add limits and
check during the wakeup SPL build.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.
So, move scratch board area to HSM RAM.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
To make sure the panic and the reset messages will go out, console flush() should be used.
Sleep periods do not work in early u-boot phase when timer driver is not initialized yet.
Reference: https://lists.denx.de/pipermail/u-boot/2023-March/512233.html
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/qoriq/qoriq-yocto-sdk/boot-format:
"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."
Point to the NXP boot format github repo instead.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
- Fix for rockchip timer driver;
- Fix for rk3568 and rk3588 boot device and clock driver;
- Fix for rk3568 reset handler;
- Fix for rk3568 sdhci DLL at 52MHz;
The reset identifier must be processed via MOD_CLK_PACK() before it is
used to look up register and bit within reset_regs or reset_clear_regs
arrays, otherwise completely bogus register and bit is picked from the
arrays, one which may even be out of range.
Fixes: 326e05c5e2 ("clk: renesas: Add and enable CPG reset driver")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The Rockchip timer driver has been renamed after the fall back compatible.
There's no need to replace the timer compatible in rk3188-radxarock-u-boot.dtsi
anymore, so remove.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In the binding for the Rockchip timer the compatible string
consists of a SoC orientated string and a fall back string
"rockchip,rk3288-timer", so remove all unneeded ones and
fix driver name.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For Rockchip platform, DLL bypass bit and start bit need to be set if
DLL is not locked.
With this change applied eMMC in my NanoPi R5S can run at 52 MHz.
Based on linux commit b75a52b0dda3 ("mmc: sdhci-of-dwcmshc: Update DLL
and pre-change delay for rockchip platform")
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Device tree contains assigned-clock-rates property for these,
but default value will work just fine
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
This removes dangling comments that no longer serve a purpose and has
been left after conversion of defines to Kconfig option.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The get_mmc_clk ops is expected to set a clock rate and return the
configured rate as an unsigned value. However, if clk_set_rate fails,
e.g. using a fixed rate clock, a negative error value is returned.
The mmc core will treat this as a valid unsigned rate and tries to
configure a divider based on this bogus clock rate.
Use 0 as the return value when setting clock rate fails, the mmc core
will configure to use bypass mode instead of using a bogus divider.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Building U-Boot for Tinker Board with USB or NET Kconfig option disabled
result in the following build error:
In file included from include/configs/rk3288_common.h:29,
from include/configs/tinker_rk3288.h:14,
from include/config.h:3,
from include/common.h:16,
from env/common.c:10:
include/config_distro_bootcmd.h:302:9: error: expected '}' before 'BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB'
302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:302:9: note: in definition of macro 'BOOTENV_DEV_NAME_USB'
302 | BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/configs/tinker_rk3288.h:21:9: note: in expansion of macro 'BOOTENV_DEV_NAME'
21 | func(USB, usb, 0) \
| ^~~~
include/config_distro_bootcmd.h:454:25: note: in expansion of macro 'BOOT_TARGET_DEVICES'
454 | "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0"
| ^~~~~~~~~~~~~~~~~~~
include/config_distro_bootcmd.h:474:9: note: in expansion of macro 'BOOTENV_BOOT_TARGETS'
474 | BOOTENV_BOOT_TARGETS \
| ^~~~~~~~~~~~~~~~~~~~
include/configs/rk3288_common.h:40:9: note: in expansion of macro 'BOOTENV'
40 | BOOTENV
| ^~~~~~~
include/env_default.h:122:9: note: in expansion of macro 'CFG_EXTRA_ENV_SETTINGS'
122 | CFG_EXTRA_ENV_SETTINGS
| ^~~~~~~~~~~~~~~~~~~~~~
In file included from env/common.c:32:
include/env_default.h:29:36: note: to match this '{'
29 | const char default_environment[] = {
| ^
make[2]: *** [scripts/Makefile.build:256: env/common.o] Error 1
The BOOT_TARGET_DEVICES defined in rockchip-common.h include the same
devices as defined in tinker_rk3288.h, remove the board specific one to
fix building with USB or NET option disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable SPL on RK3588 to detect which device it was booted from.
Fixes use of same-as-spl in u-boot,spl-boot-order prop.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rate and error value is not returned for aux16m clocks, fix this.
Fixes: 7a474df740 ("clk: rockchip: Add rk3588 clk support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Running U-Boot from eMMC on a ROCK 3 Model A result in the following:
U-Boot SPL 2023.04-rc3 (Mar 11 2023 - 17:24:48 +0000)
Trying to boot from MMC1
Card did not respond to voltage select! : -110
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
The sdhci node is missing in board device tree, sync device tree from
linux v6.3-rc1 to fix booting from eMMC. Also disable sdmmc2 and uart1
nodes related to using a WiFi and BT module in the M2 slot.
Fixes: b44c54f600 ("arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The boot source node path for emmc is using the old sdhci name.
Replace with correct mmc name and also add same-as-spl to boot order.
Fixes: 0d61f8e5f1 ("rockchip: rk3568: add boot device detection")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Running U-Boot on a ROCK 3 Model A result in the following:
No serial driver found
resetting ...
no sysreset
### ERROR ### Please RESET the board ###
Replace bootph- props with u-boot,dm- props to fix this.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Per Andre:
[T]hese two patches containing just devicetree updates for
Allwinner boards.
I was still hoping for a review, since we cannot import the files from
the Linux tree verbatim, but managed to write some filter script that
convinced me that the changes are fine.
The files are from Linux v6.2-rc2, but are identical to the v6.2
release.
This board is using floating point arithmetic to display
the SST39VF6401B flash size.
This actually generates errors with toolchains without
appropriate sw fp math functions available.
SST39VF6401B is the only flash for wich the size is displayed,
it's size is 8192KB and floating point calculation seems not
needed. Removing it.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Remove CONFIG_ namespace options from .h, moving them to
defconfig, while changing non-defconfig options to CFG_ namespace.
Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
Fix error:
Invalid chip select 0:1 (err=-19)
update spi nor "compatible" property with "jedec,spi-nor"
to have spi nor properly bound as a child device.
Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
This patch fixes u-boot hanging on the first printf("%x", val).
Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.
Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.
Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
Fix totally blank console at boot, clock value must be decimal,
as for the 30Mhz external crystal.
Fixes: 26e5944ec9 ("stmark2: Migrate CONFIG_SYS_EXTRA_OPTIONS to Kconfig")
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The FSL eSDHC controller supports two reference clocks. They are
platform clock and periperhal clock. The global variable sdhc_clk
has already been used for platform clock.
ColdFire also uses eSHDC controller, as in arm and powerpc,
so adding sdhc_per_clk to arch_global_data.
Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
The Odroid Go Ultra has 2 chained PMICs RK818 and RK818, and needs
an adjustment on the BUCK and LDO values.
Add the initial regulators values in -u-boot.dtsi & run the initial
regulator setup in a new odroid-go-ultra board.
Proper OTG and BOOST regulators are still missing to have USB-A
host properly working.
Link: https://lore.kernel.org/r/20230210-u-boot-odroid-go-ultra-pmics-setup-v1-1-1f16d62b76af@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Documentation:
* man-page for panic command
UEFI:
* Correct parameter check for SetVariable()
Other:
* Provide unit test for crc8
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Merge tag 'efi-2023-04-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2023-04-rc4
Documentation:
* man-page for panic command
UEFI:
* Correct parameter check for SetVariable()
Other:
* Provide unit test for crc8
Add a function description.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
UEFI specification v2.10 says that
EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated and
EFI_UNSUPPORTED should be returned in SetVariable variable service.
Current implementation returns EFI_INVALID_PARAMETER,
let's fix the return value.
Together with above change, this commit also updates the SetVariable
attribute check to be aligned with the EDK2 reference implementation.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Provide a man-page for the panic command.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix a couple of links so that they are rendered correctly with sphinx.
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Add a unit test for the crc8() function.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable support for sysinfo on R-Car D3 Draak board. The sysinfo is used
e.g. to access and decode board-specific information and then in turn
used by board-info to print those information.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Drop compatible from I2C node, this is in r8a77995.dtsi already.
Drop status = "okay" from EEPROM node.
Add dts: tag.
Fix Kconfig EEPROM address to be 0x50 and match the DT, sync config.]
Add new sysinfo IDs for R-Car V3H Condor/Condor-I .
Enable support for sysinfo on R-Car V3H Condor/Condor-I. The sysinfo is
used e.g. to access and decode board-specific information and then in
turn used by board-info to print those information.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Drop compatible from I2C node, this is in r8a77980.dtsi already.
Drop status = "okay" from EEPROM node.
Add dts: tag.
Update the commit message, note the new sysinfo IDs.
Fix Kconfig EEPROM address to be 0x50 and match the DT, sync config.]
Correct the board code ID based on the hardware documentation
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
