Commit graph

15811 commits

Author SHA1 Message Date
Marcel Ziswiler
c21b61bff1 colibri-imx6ull/-emmc: synchronise device tree with linux
Synchronise device tree with linux v5.19-rc5.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device trees we are now using the
regular ones for the Colibri Evaluation (carrier) board V3 (e.g.
imx6ull-colibri-eval-v3.dtb rather than the previous imx6ull-colibri.dtb
and imx6ull-colibri-emmc-eval-v3.dtb rather than the previous
imx6ull-colibri-emmc.dtb).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
5d7a95f499 imx6ul/imx6ull: synchronise device trees with linux
Synchronise device trees with linux v5.19-rc5.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
091a03f8f3 imx: mx6ul_14x14_evk: prepare to synchronise device trees with linux
As a preparatory step remove the qspi node with its flash0 label as this
is already in the Linux upstream device tree.

This avoids the following error once synchronised:

+arch/arm/dts/imx6ul-14x14-evk.dtb: ERROR (duplicate_label):
 /soc/bus@2100000/spi@21e0000/n25q256a@0: Duplicate label 'flash0' on
 /soc/bus@2100000/spi@21e0000/n25q256a@0 and
 /soc/bus@2100000/spi@21e0000/flash@0

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
bd483b7a9f colibri_imx6: synchronise device tree with linux
Synchronise device tree with linux-next next-20220708.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Colibri Evaluation (carrier) board V3 (e.g.
imx6dl-colibri-eval-v3.dtb rather than the previous imx6-colibri.dtb).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
50ba171e2d apalis_imx6: synchronise device tree with linux
Synchronise device tree with linux-next 20220706.

Please note that this also means that instead of the previous "generic"
U-Boot specific carrier board agnostic device tree we are now using the
regular one for the Apalis Evaluation (carrier) board (e.g.
imx6q-apalis-eval.dtb rather than the previous imx6-apalis.dtb).

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
d0399a46e7 imx6dl/imx6qdl: synchronise device trees with linux
Synchronise device trees with linux-next next-20220708.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
50b229523b tbs2910: prepare to synchronise device trees with linux
As a preparatory step make sure to refer to absolute node paths where
labels were removed in Linux upstream.

This avoids the following error once synchronised:

+Error: arch/arm/dts/imx6q-tbs2910-u-boot.dtsi:3.1-7 Label or path aips1
 not found
+Error: arch/arm/dts/imx6q-tbs2910-u-boot.dtsi:11.1-5 Label or path soc
 not found

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
6f7db3a968 imx6: aristainetos: fix pwms property warnings
Fix the following build-time pwms property warnings:

w+arch/arm/dts/imx6dl-aristainetos2c_7.dtb: Warning (pwms_property):
 /backlight:pwms: property size (12) too small for cell size 3
w+arch/arm/dts/imx6dl-aristainetos2c_cslb_7.dtb: Warning (pwms_property):
 /backlight:pwms: property size (12) too small for cell size 3

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2022-07-25 16:12:00 +02:00
Marcel Ziswiler
398ae1dca1 board/BuR/brppt2: fix pwms property warning
Fix the following build-time pwms property warning:

w+arch/arm/dts/imx6dl-brppt2.dtb: Warning (pwms_property):
 /backlight:pwms: property size (12) too small for cell size 3

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00
Fabio Estevam
05996f350d imx8mm: Sync device tree with linux-next 20220711
Sync imx8mm.dtsi device tree with linux-next 20220711.

The main motivation for doing this sync is the sha256 regression
reported by Andrey Zhizhikin [1].

The linux-next kernel has the following commit, which disables
the job ring 0 and fixes the problem:

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20220715&id=dc9c1ceb555ff661e6fc1081434600771f29657c

[1] https://lore.kernel.org/u-boot/AM6PR06MB46912207D9460CD9924F35DAA68B9@AM6PR06MB4691.eurprd06.prod.outlook.com/T/#t

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-07-25 16:12:00 +02:00
Mamta Shukla
1c3a8e7753 configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m
The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and
`"XIP"` to determine the base address of u-boot.

For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset
of the flattened image tree blob.
Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in
multiple board header files for i.MX8MM, it is not specified.

Specify offset of flattened image tree blob (needs to be set to same
value as specified in 'binman' node), base address of QSPI0 and size of
FlexSPI configuration block.

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Andrey Zhizhikin  <andrey.zhizhikin@leica-geosystems.com>
2022-07-25 15:35:35 +02:00
Mamta Shukla
de99721c35 dts: imx8mm-uboot: Add support to pack FlexSPI Header using binman
Add definition for FSPI configuration block and subsequently new offsets for
u-boot-spl and u-boot-itb for CONFIG_FSPI_HEADER option.

Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@leica-geosystems.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
5809d764a9 imx8ulp: soc.c: use rom_api_query_boot_infor() wrapper
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
f963622f28 imx8m: soc.c: use rom_api_query_boot_infor() wrapper
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
f8001fdd2c imx8: use ROM API wrappers in spl_imx_romapi.c
Simplify the use of the ROM API by using the wrappers that take care
of saving/restoring gd and computing the xor value. This makes the
generated code smaller and the C code easier to read.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
748da8abb0 imx8: add rom api wrappers
The ROM API is thoroughly undocumented, but apparently passing the xor
of the real arguments as an extra argument is required [1]. Also, we
need to do the "save gd/restore gd" dance. These are both error-prone,
and lead to a lot of code duplication.

Since both imx8m[np] and imx8ulp SOCs have this, add a separate
translation unit which is included precisely when the new
CONFIG_IMX8_ROMAPI symbol is set, which provide convenience wrappers
that take care of computing the xor value as well as doing the gd
dance, and that thus have a more intuitive API. Subsequent patches
will make use of these to reduce boilerplate.

[1] One wonders, for example, if the check is only applied to the
lower 32 bits, or if we're implicitly relying on all 64-bit pointer
values we're passing effectively have 0 in the upper 32 bits.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
de20c5d405 imx8: sys_proto.h: change guard logic around ROM API
This exposes the struct rom_api, the g_rom_api variable declaration
and the associated #defines to slightly fewer boards: namely, those
IMX8M which are not IMX8MN or IMX8MP. But the latter two are the only
IMX8M* ones where the g_rom_api variable is defined (in imx8m/soc.c),
so that should be fine.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Rasmus Villemoes
8e290150e3 imx8: add hidden IMX8_ROMAPI Kconfig symbol
In order not to repeat the IMX8MN || IMX8MP || IMX8ULP logic in
multiple places where we need to know if the SOC exposes the ROM API,
add a "def_bool y" Kconfig symbol.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-07-25 15:35:34 +02:00
Tim Harvey
408349acbf arm: dts: imx8mm-venice-gw700x: add support for GPY111 phy
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy
due to part availability. Add support for it:
 - increase post-reset time to 300ms per datasheet
 - leave tx-delay/rx-delay undefined in dt defaulting to 2.0ns

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-07-25 15:08:23 +02:00
Pali Rohár
ca85b5a146 arm: mvebu: turris_omnia: Set ETHPRIME to DT alias
CONFIG_ETHPRIME can be set to DT node name or alias which refers to DT
node. Define ethernet aliases and set ETHPRIME to eth2 which refers to WAN
ethernet port. This removes hardcoded DT node name from U-Boot
configuration file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Pali Rohár
3308933d2f arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times
Change detection of platform/cpu from runtime to compile time via config
define. This completely eliminates compiling code which is not going to run
on selected platform. Code which parses and prints device / revision id
still reads device id from MVEBU_REG_PCIE_DEVID register, but only once.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Marek Behún
61143f741e treewide: Fix Marek's name and change my e-mail address
Fix diacritics in some instances of my name and change my e-mail address
to kabel@kernel.org.

Add corresponding .mailmap entries.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Robert Marko
b4108f3fd3 arm: mvebu: add support for Methode eDPU
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.

They feature the same CPU, RAM, and storage as well as the form factor.

However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.

In order to reduce duplication, split the uDPU DTS into a common one.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 10:14:04 +02:00
Robert Marko
58b39652bb arm: mvebu: dts: sync DTS
Update the uDPU DTS to the version that is pending upstream [1][2][3][4].

[1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-4-robert.marko@sartura.hr/
[2] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-5-robert.marko@sartura.hr/
[3] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.marko@sartura.hr/
[4] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.marko@sartura.hr/

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 07:46:10 +02:00
Chris Packham
8fd3cf2940 arm64: mvebu: handle non-zero base address for RAM
board_get_usable_ram_top() conflated the RAM size with the top address
of RAM. On systems where RAM starts at address 0 these numbers are the
same so it went unnoticed. Update board_get_usable_ram_top() to take
CONFIG_SYS_SDRAM_BASE into account when determining the top address.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-21 07:46:10 +02:00
Samuel Holland
a35628ec33 sunxi: Move INITIAL_USB_SCAN_DELAY to driver Kconfig
This option is used only by the phy-sun4i-usb driver, which does not
inherently depend on the ARM architecture.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 23:48:09 +01:00
Michal Suchanek
e038c7a201 sunxi: lcd: Move range from kconfig description to definition.
KConfig has range option, use it instead of notice in the option
descrition.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-18 11:34:26 +01:00
Tom Rini
54f683dbfb Merge https://source.denx.de/u-boot/custodians/u-boot-usb 2022-07-14 11:10:49 -04:00
Tom Rini
357fa8bb4d - Alignment with Linux kernel device tree v5.19 for stm32mp15 and stm32mp13
- Add OP-TEE nodes for stm32mp13x, alligned with upstreamed OP-TEE
 - Introduce of_to_plat ops in stm32_sdmmc2 driver
 - Activate more features in stm32mp13 defconfig and support of STM32MP13x Rev.Y
 - Drop fastboot and stm32prog trigger gpios on STM32MP15x DHCOM board
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Merge tag 'u-boot-stm32-20220712' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Alignment with Linux kernel device tree v5.19 for stm32mp15 and stm32mp13
- Add OP-TEE nodes for stm32mp13x, alligned with upstreamed OP-TEE
- Introduce of_to_plat ops in stm32_sdmmc2 driver
- Activate more features in stm32mp13 defconfig and support of STM32MP13x Rev.Y
- Drop fastboot and stm32prog trigger gpios on STM32MP15x DHCOM board
2022-07-13 08:09:20 -04:00
Michal Simek
f36479e302 ti: keystone: Don't select GPIO_EXTRA_HEADER
keystone doesn't have custom gpio.h that's why don't select
GPIO_EXTRA_HEADER which points to it.

Logic in arch/arm/include/asm/gpio.h is very clear

 #ifdef CONFIG_GPIO_EXTRA_HEADER
 #include <asm/arch/gpio.h>
 #endif
 #include <asm-generic/gpio.h>

Where it is visible that there is no gpio.h in platform headers:
$ ls arch/arm/mach-keystone/include/mach/
clock_defs.h  clock-k2e.h  clock-k2hk.h  ddr3.h      hardware-k2e.h
hardware-k2hk.h  i2c_defs.h      mon.h   mux-k2g.h   xhci-keystone.h
clock.h       clock-k2g.h  clock-k2l.h   hardware.h  hardware-k2g.h
hardware-k2l.h   mmc_host_def.h  msmc.h  psc_defs.h

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-07-12 21:59:54 +02:00
Johann Neuhauser
48d9eaf682 arm: dts: stm32mp1: Drop fastboot and stm32prog trigger gpios on DHCOM
PA13 and PA14 are used for USB power control and can't be used
to enforce fastboot or stm32prog mode by pressing a button.

Defining CONFIG_FASTBOOT/CONFIG_CMD_STM32PROG without this patch applied
results in fastboot/stm32prog always starting, because PA13/PA14 are always
low during boot. So drop the wrong trigger gpios definitions.

Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
6d647676ea ARM: dts: stm32mp13: activate led on STM32MP13F-DK
Activate the led managed in stm32mp1 board for U-Boot indication
in STM32MP13F-DK device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:15 +02:00
Patrick Delaunay
12d5a0626c ARM: dts: stm32mp13: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1 with:
- ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
- ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
- ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
- ARM: dts: stm32: enable RTC support on stm32mp135f-dk
- ARM: dts: stm32: add RTC node on stm32mp131
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:48:09 +02:00
Patrick Delaunay
50b371fd68 stm32mp: add support of STM32MP13x Rev.Y
Add support of STM32MP13x Rev.Y for the Silicon revision REV_ID = 0x1003.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:47:34 +02:00
Patrick Delaunay
6cccc8d396 ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
Add a "secure" version of STM32 boards based on SCMI when RCC_TZCR.TZEN=1.

Only boards provided by STMicroelectronics are concerned:
-STM32MP157A-DK1
-STM32MP157C-DK2
-STM32MP157C-ED1
-STM32MP157C-EV1

The resources secured by RCC_TZCR.TZEN=1 are managed by OP-TEE
and the associated SCMI services, reset and clock.

These device trees are only supported with stm32mp15_defconfig,
with OP-TEE, SCMI and without SPL support.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:32 +02:00
Patrick Delaunay
69ef98b209 ARM: dts: stm32mp15: alignment with v5.19
Device tree alignment with Linux kernel v5.19-rc1

- ARM: dts: stm32: Add alternate pinmux for ethernet0 pins
- ARM: dts: stm32: Add alternate pinmux for mco2 pins
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
- ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
- dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
- dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
- dt-bindings: clock: stm32mp15: rename CK_SCMI define
- dt-bindings: reset: stm32mp15: rename RST_SCMI define
- dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains
  on stm32mp15
- dt-bindings: clk: cleanup comments
- ARM: dts: align SPI NOR node name with dtschema
- ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
- ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15

+ patch from stm32-dt-for-v5.19-fixes-2

- ARM: dts: stm32: move SCMI related nodes in a dedicated file for
  stm32mp15
- ARM: dts: stm32: fix pwr regulators references to use scmi
- ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
- ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
- ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
- ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:31 +02:00
Patrick Delaunay
44db098ae1 ARM: dts: stm32mp13: add SCMI nodes
Add the node for SCMI firmware with the associated reserved memory nodes

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:30 +02:00
Patrick Delaunay
0b69ce6a81 ARM: dts: stm32mp13: add OP-TEE nodes
Add the node for OP-TEE firmware with the associated reserved memory nodes

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-07-12 11:46:18 +02:00
Tom Rini
36b661dc91 Merge branch 'next' 2022-07-11 14:58:57 -04:00
Tom Rini
cb42c1f9b1 i2c: Remove non-DM_I2C support from davinci_i2c.c
As the migration deadline has passed, and all platforms have been
migrated, remove the non-DM code here.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:34 -04:00
Tom Rini
edcbd6e388 omap3: emif4: More clearly hard-code cs0 size
We have a single platform that is both in the OMAP3 family of parts, but
has an EMIF4 memory controller.  Currently we hard-code the size of
chip select 0.  Make this more clear by putting the value in the
function rather than a CONFIG option.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:34 -04:00
Tom Rini
95cc3efcc1 arm: Remove strongarm support
There are no platforms using this architecture anymore, remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 17:57:33 -04:00
Tom Rini
9ff4ce8abc nman external-symbol improvements
Driver model memory-usage reporting
 patman test-reporting improvements
 Add bloblist design goals
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Merge tag 'dm-pull-28jun22' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

nman external-symbol improvements
Driver model memory-usage reporting
patman test-reporting improvements
Add bloblist design goals
2022-07-08 14:39:07 -04:00
Tom Rini
bb20a105e9 Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOT_RAMDISK_HIGH

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 14:01:09 -04:00
Tom Rini
a457ebd786 arm: Remove PXA architecture support
With the last platform for this architecture removed, remove the rest of
the architecture support as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-07 09:29:08 -04:00
Tom Rini
d9d4978143 thunerx_88xx: Clean up config slightly.
We don't use CONFIG_SYS_64BIT anywhere and can use
CONFIG_TARGET_THUNDERX_88XX to build the device trees.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
2bb9d7c65a Convert CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
   CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
   CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
f1c6dfa426 layerscape: Remove some unused CONFIG symbols
All of these symbols are not referenced anywhere else in the code, so
remove them.

Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
cd6a45a41f Convert CONFIG_USB_OHCI_NEW et al to Kconfig
This converts the following to Kconfig:
    CONFIG_SYS_OHCI_SWAP_REG_ACCESS
    CONFIG_SYS_USB_OHCI_CPU_INIT
    CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
    CONFIG_SYS_USB_OHCI_SLOT_NAME
    CONFIG_USB_ATMEL
    CONFIG_USB_ATMEL_CLK_SEL_PLLB
    CONFIG_USB_ATMEL_CLK_SEL_UPLL
    CONFIG_USB_OHCI_LPC32XX
    CONFIG_USB_OHCI_NEW

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00
Tom Rini
b340199f82 spl: Ensure all SPL symbols in Kconfig have some SPL dependency
Tighten up symbol dependencies in a number of places.  Ensure that a SPL
specific option has at least a direct dependency on SPL.  In places
where it's clear that we depend on something more specific, use that
dependency instead.  This means in a very small number of places we can
drop redundant dependencies.

Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-07 09:29:08 -04:00