Commit graph

18 commits

Author SHA1 Message Date
Peter Tyser
2f21ce4d54 fsl/85xx, 86xx: Sync up DMA code
The following changes were made to sync up the DMA code between the 85xx
and 86xx architectures which will make it easier to break out common
8xxx DMA code:

85xx:
- Don't set STRANSINT and SPCIORDER fields in SATR register.  These bits
  only have an affect when the SBPATMU bit is set.
- Write 0xffffffff instead of 0xfffffff to clear errors in the DMA
  status register.  We may as well clear all 32 bits of the register...

86xx:
- Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers
- Add clearing of errors in the DMA status register when initializing
  the controller
- Clear the channel start bit in the DMA mode register after a transfer

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:58 -05:00
Peter Tyser
b1f12650d3 fsl: Create common fsl_dma.h for 85xx and 86xx cpus
Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to
reduce a large amount of code duplication

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:45 -05:00
Peter Tyser
22c00f8d7d 86xx: Update Global Utilities structure
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-02-16 18:05:57 -06:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Jason Jin
3473ab7372 Feed the watchdog in u-boot for 8610 board.
The watchdog on 8610 board is enabled by setting sw[6]
to on. Once enabled, the watchdog can not be disabled
by software. So feed the dog in u-boot is necessary for
normal operation.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2008-07-07 11:29:48 -05:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Kumar Gala
45239cf415 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs
All the 85xx and 86xx UM describe the register as timing_cfg_3
not as ext_refrec.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 11:44:29 -05:00
Kumar Gala
ef7d30b143 85xx/86xx: Rename DDR init address and init extended address register
Rename init_addr and init_ext_addr to match the docs between
85xx and 86xx.  Both now use 'init_addr' and 'init_ext_addr'.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 11:42:05 -05:00
Jon Loeliger
a551cee99a 86xx: Fix GUR PCI config registers properly.
Back in commit 975a083a5e where
I tried to "8610HPCD: Fix typos in two PCI setup registers", I
botched it due to not realizing that 8610 and 8641 had different
Global Utility Register defintions, one of which was like 85xx,
and the other wasn't.  Correct this problem by introducing two
symbols, one for each 86xx SoC, but neither of which is named
anything like 85xx.

My bad.  Lovely Wednesday with git bisect.  You know.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-20 14:45:09 -06:00
Jon Loeliger
975a083a5e 8610HPCD: Fix typos in two PCI setup registers.
The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA
were erroneously present as 85xx names and values, leftover from
the clone wars.  Fix this by removing the 85xx cruft from the
86xx codebase.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-19 12:31:08 -06:00
Jon Loeliger
ccd6e1464e Add CFG_MPC86xx_DDR_ADDR and CFG_MPC86xx_DDR2_ADDR symbols
These replace direct structure references for IMMR sections.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-13 16:03:49 -06:00
Jon Loeliger
cfc7a7f5bb cpu/86xx fixes.
Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.

Include MSSSR0 in error message.

Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-08-10 11:02:32 -05:00
Haiying Wang
9964a4dd0d Set Rev 2.x 86xx PIC in mixed mode.
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.

Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-03-22 11:02:35 -05:00
Jon Loeliger
3dfa9cfdce Use generic I2C register block on 85xx and 86xx.
Replace private IMMAP I2C structures with generic reg block
and allow 86xx to have multiple I2C device busses.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-20 17:16:35 -05:00
Jon Loeliger
8b283dbb3a Fix whitespace issues. 2006-10-10 17:16:04 -05:00
Jin Zhengxiong-R64188
fa7db9c377 Enable PCIE1 for MPC8641HPCN board
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2006-06-27 09:17:59 -05:00
Jon Loeliger
586d1d5abd Update 86xx address map and LAWBARs. 2006-05-19 13:54:02 -05:00
Jon Loeliger
debb7354d1 Initial support for MPC8641 HPCN board. 2006-04-26 17:58:56 -05:00