Commit graph

13060 commits

Author SHA1 Message Date
Timur Tabi
bb682001f1 fdt: introduce fdt_verify_alias_address() and fdt_get_base_address()
Introduce two functions, fdt_verify_alias_address() and
fdt_get_base_address(), which can be used to verify the physical address
of a device in a device tree.

fdt_get_base_address() returns the base address of an SOC or PCI node.

fdt_verify_alias_address() prints a message if the address of a node
specified by an alias does not match the given physical address.

Signed-off-by: Timur Tabi <timur@freescale.com>
2011-07-14 21:43:36 -04:00
David Gibson
d1c6314887 libfdt: Implement property iteration functions
For ages, we've been talking about adding functions to libfdt to allow
iteration through properties.  So, finally, here are some.

I got bogged down on this for a long time because I didn't want to
expose offsets directly to properties to the callers.  But without
that, attempting to make reasonable iteration functions just became
horrible.  So eventually, I settled on an interface which does now
expose property offsets.  fdt_first_property_offset() and
fdt_next_property_offset() are used to step through the offsets of the
properties starting from a particularly node offset.  The details of
the property at each offset can then be retrieved with either
fdt_get_property_by_offset() or fdt_getprop_by_offset() which have
interfaces similar to fdt_get_property() and fdt_getprop()
respectively.

No explicit testcases are included, but we do use the new functions to
reimplement the existing fdt_get_property() function.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

This was extracted from the DTC commit:
73dca9ae0b9abe6924ba640164ecce9f8df69c5a Mon Sep 17 00:00:00 2001

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2011-07-14 21:10:34 -04:00
David Gibson
05a22ba096 Support ePAPR compliant phandle properties
Currently, the Linux kernel, libfdt and dtc, when using flattened
device trees encode a node's phandle into a property named
"linux,phandle".  The ePAPR specification, however - aiming as it is
to not be a Linux specific spec - requires that phandles be encoded in
a property named simply "phandle".

This patch adds support for this newer approach to dtc and libfdt.
Specifically:

	- fdt_get_phandle() will now return the correct phandle if it
          is supplied in either of these properties

	- fdt_node_offset_by_phandle() will correctly find a node with
          the given phandle encoded in either property.

	- By default, when auto-generating phandles, dtc will encode
          it into both properties for maximum compatibility.  A new -H
          option allows either only old-style or only new-style
          properties to be generated.

	- If phandle properties are explicitly supplied in the dts
	  file, dtc will not auto-generate ones in the alternate format.

	- If both properties are supplied, dtc will check that they
          have the same value.

	- Some existing testcases are updated to use a mix of old and
          new-style phandles, partially testing the changes.

	- A new phandle_format test further tests the libfdt support,
          and the -H option.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

This was extracted from the DTC commit:
d75b33af676d0beac8398651a7f09037555a550b Mon Sep 17 00:00:00 2001

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2011-07-14 21:03:53 -04:00
Ramneek Mehresh
68d4230c3c powerpc/85xx: Add default usb mode and phy type to hwconfig
Move to use hwconfig for usb mode & phy type instead of magic
'usb_phy_type' environment variable on the following platforms:

MPC8536DS, P1020RDB, P1020RDB-PC, P1010RDB, P2020RDB, P2020RDB-PC,
P2020RDB, P3041DS, P4080DS, & P5020DS.

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:21 -05:00
York Sun
80e5c83a7e powerpc/corenet_ds: add back buffer write for NOR flash
Enable buffer write for better performance. This platform uses a NOR flash
chip which supports write buffer programming. CFI driver can query the
buffer size and use it to program the flash for best performance.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:21 -05:00
Timur Tabi
26002826c7 powerpc/85xx: remove SERDES4 soft-reset work-around
Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a
bank soft-reset after the bank was configured and enabled, even though
enabling a bank causes it to reset.  Because the reset was required for
multiple errata, it was not properly enclosed in an #ifdef, and so was
not removed with all the other rev1 errata work-arounds.

Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if
bank 2 is enabled, but this was not being done for SERDES protocols 0xF
and 0x10.  The bank reset also happened to enable bank 3 (apparently an
undocumented feature).  Simply removing the reset breaks these two
protocols.

It turns out that every time we call enable_bank(), we do want at least
one lane of the bank enabled, either because the bank is supposed to be
enabled, or because we need the clock from that bank enabled.

For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we
call enable_bank(), because that array is used elsewhere to determine if
the bank is available.

Note that the side effect of these changes is that the work-arounds for
these two errata are now linked.  Specifically, if SERDES-A001 is
enabled, then we need SERDES-8 enabled as well.

Because this was the only SERDES bank soft-reset, there is no need to
implement a work-around for erratum SERDES-A003.

Also fix an off-by-one error in a printf().

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Ed Swarthout <swarthou@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:21 -05:00
York Sun
23f9670f1a powerpc/mpc8xxx: Allow override DDR read-to-write turnaround time
Add this option to allow boards to override the default read-to-write
turnaround time for better performance.

Signed-off-by: York Sun <yorksun@freescale.com>
2011-07-11 13:24:20 -05:00
Ramneek Mehresh
86dda50484 qoriq/p1_p2_rdb: USB device-tree fixups for P1020
Resolve P1020 second USB controller multiplexing with eLBC
	- mandatory to mention USB2 in hwconfig string to select it
	  over eLBC, otherwise USB2 node is removed
	- works only for SPI and SD boot

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
Ramneek Mehresh
636c316f9b powerpc/85xx: Specify hwconfig usage for USB controller
Specify hwconfig usage for USB mode and phy change

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
Ramneek Mehresh
72f4980b40 powerpc/8xxx: Update USB mode device tree fixup
Modify support for USB mode fixup:
        - Add common support for USB mode and phy type
          device tree fix-up for all USB controllers
          mentioned in hwconfig string
        - Fetch USB mode and phy type via hwconfig; if not
          defined in hwconfig, then fetch them from env

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
Roy Zang
3f7f6b8592 powerpc/85xx: Add basic support for P1023RDS board
The P1023RDS board is the reference board for the P1023 SoC.

Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
UART, I2C, etc.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
939e5bf9b3 powerpc/mpc85xx: Display a warning for unsupported DDR data rates
If DDR initialziation uses a speed table and the speed is not matched,
print a warning message instead of silently ignoring.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
79fa00af5d powerpc/corenet_ds: Fix RCW overriding for RDIMM
Allow overriding RCW for all RDIMM, not only quad-rank ones.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
4c99cb9190 powerpc/mpc8xxx: fix DDR data width checking
Checking width before setting DDR controller. SPD for DDR1 and DDR2 has
data width and primary sdram width. The latter one has different meaning
for DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
f2d264b660 powerpc/mpc8xxx: Adding fallback to raw timing on supported boards
In case of empty SPD or checksum error, fallback to raw timing on
supported boards.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
1b3e3c4f26 powerpc/mpc8xxx: Enable calculation for fixed DDR chips
We used to have fixed parameters for soldered DDR chips. This patch
introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing
data from DDR chip datasheet, implemneted in board-specific files or header
files.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
Felix Radensky
aeb6716a12 powerpc/85xx: Fix pin muxing for second USB controller
On P1022/P1013 second USB controller is muxed with second
Ethernet controller. The current code to enable second USB
fails to properly clear pinmux bits used by ethernet. As a
result, Linux freezes when this controller is used. This
patch fixes the problem.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
c49290cd19 Adding more SPD registers
Adding byte 32 and 33

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
51d498f175 powerpc/mpc8xxx: Add 16-bit support for DDR3
Add support for 16-bit DDR bus. Also deal with system using 64- and 32-bit
DDR devices.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
d2246549c7 powerpc/mpc8xxx: check SPD length before using part number
Only use DDR DIMM part number if SPD has valid length, to prevent from
display garbage in case SPD doesn't cover these fields.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
York Sun
e090aa7cf0 powerpc/mpc8xxx: adjust DDR burst length and chop accroding to sdram width
If the bus width is 32-bit, burst chop should be disabled and burst length
should be 8. Read from SPD or other source to determine the width.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Timur Tabi
26fd33b9be powerpc/86xx: display boot device and bank on the MPC8610 HPCD
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Shaohui Xie
374a235d42 powerpc/85xx: Add NAND boot support for P3041/P5020DS
When booting from NAND we get the environment and FMan ucode from NAND.

Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Kumar Gala
1f97987a51 powerpc/85xx: Add P2041 processor support
The P2041 is similar to P2040, however has a 10G port and backside L2

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Mingkai Hu
526cbff292 powerpc/p2040: Add various p2040 specific information
Add P2040 SoC specific information:
* LIODN setup
* Portal configuration
* etc

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Kumar Gala
58b2f96e38 powerpc/85xx: Fix compile errors if CONFIG_SYS_DPAA_QBMAN isn't set
Add ifdef protection for qp_info and liodn associated with Q/BMan.  Also
rearrange setting of _tbl_sz variables to utilize existing ifdef
protection for things like FMAN.

Also add protection around setup_portals() call in corenet_ds board
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Ramneek Mehresh
eb51f63c02 qoriq/p1_p2_rdb: Add Dual Role USB support macro for P1020RDB
Add CONFIG_HAS_FSL_DR_USB macro for P1020RDB

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Kumar Gala
9829feffec powerpc/85xx: Fix compile errors if CONFIG_SYS_{BR,OR}0_PRELIM aren't set
Add ifdef protection in LBC code to handle the case in which
CONFIG_SYS_BR0_PRELIM and CONFIG_SYS_OR0_PRELIM arent defined for a
build.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Kumar Gala
be1ff615ea powerpc/85xx: Fix compile errors if CONFIG_SYS_{B,Q}MAN_MEM_PHYS aren't set
Add ifdef protection in LAW & TLB code to handle the case in which
CONFIG_SYS_BMAN_MEM_PHYS or CONFIG_SYS_QMAN_MEM_PHYS arent defined for a
build.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Bill Cook
810cb19003 MPC83XX: Fix PCI express clock setup
On a 8308 based board it was found that the PEX_GLK_RATIO register
(programmed in arch/powerpc/cpu/mpc83xx/pcie.c) was getting set to 0, This
was tracked to the fact that the pci express clock frequency was not being
assigned to the pciexp1_clk entry in the global data structure in file
arch/powerpc/cpu/mpc83xx/speed.c. Fix this and a similiar issue in
'do_clocks' command.

Signed-off-by: Bill Cook <cook@isgchips.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:28 -05:00
Timur Tabi
f5f30dea2a powerpc/83xx: remove empty board_early_init_f()
Remove an empty board_early_init_f() from the MPC8323ERD and MPC360ERDK boards.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:28 -05:00
Andre Schwarz
7fb3e7a2d6 mpc83xx: Add support for MergerBox board
Includes board config file, documentation, maintainer and boards.cfg
entries, and board specific files in vendor dir.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
Andre Schwarz
03c0a92440 MPC83xx: add config options for memory setup.
CPO value and driver strength settings are board specifc.
Also allow SPD data fetch from any accessible I2C EEPROM.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
Andre Schwarz
a7b8126ecd MPC83xx: add define for global half-strength enable (HSE)
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
Andre Schwarz
1bda1624b0 MPC837x: set i2c1_clk
Running on mpc837x without CONFIG_FSL_ESDHC leads to
 i2c1_clk not being set at all. It is bound to clock
 of encryption module. fix this.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
Ira W. Snyder
9a865fff15 fsl_dma: fix support for 83xx DMA engine
Commit 359ec49319 broke support for the
Freescale DMA engine on the 83xx parts. This is due to using registers
which do not exist on 83xx. Remove the attribute register accesses from
the 83xx build.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Cc: York Sun <yorksun@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-07-06 19:09:27 -05:00
Simon Guinot
79642098a8 Add support for Network Space v2 and parents
This patch add support for the Network Space v2 board and parents, based
on the Marvell Kirkwood 6281 SoC. This include Network Space (Max) v2
and Internet Space v2.

Additional information is available at:
http://lacie-nas.org/doku.php?id=network_space_v2

Signed-off-by: Simon Guinot <sguinot@lacie.com>
2011-07-04 10:55:28 +02:00
Valentin Longchamp
01fa4e8cde arm/km: add support for portl2 board
This adds support for the keymile Kirkwood BEC portl2 board. This board
relies on the km_arm (km_kirkwood) BEC.

The egiga driver is configured for a 100M full-duplex, A/N off connnection
to the backplane. This board has always ethernet present, because it is
connected to the marvell switch similar to mgcoge3un. The reset_phy
functionality is also the same to mgcoge3un.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
Holger Brunck
83b40c3146 arm/km: replace suenx targets with km_kirkwood
suen3 and suen8 were in first HW version quite different, but
now they are from a u-boot point of view similar. So these
two boards can use the same header file. Other keymile boards
differ only in the usage of the PCI interface. Therefore
a target km_kirkwood_pci was introduced. All targets use
the same header file.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
Valentin Longchamp
8f2827fc43 arm/km: ethernet support for mgcoge3un
The phy is also configured with "RGMII clock transitions when data
stable" and "Class A driver for the direct backplane connection".

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
Valentin Longchamp
680cfaf805 arm/km: use board KM_ENV_BUS for CONFIG_I2C_ENV_EEPROM_BUS
This is defined for all km_kirkwood boards and was not used up to now.
This value was the same for all boards but it could be changed for some
boards (and thus needs to be defined for every board).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
Holger Brunck
288f99b064 arm/km: remove unneeded define
CONFIG_ENV_SIZE for NAND was later in this file overwritten
because we have the environment in i2c eeprom, so remove
this define.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
Holger Brunck
b5befd8211 arm/km: fix u-boot.kwb build breakage
commit 010a958b
(arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h)
breaks building keymile arm targets, when u-boot.kwb tries to
generate the binary with mkimage. A simple make <board> or MAKEALL
succeeded because it don't try to build the kirwood binary at the end.

Due this commit we use the CONFIG_SYS_KWD_CONFIG from the
arch-kirkwood/config.h and it was removed from the board config.
But it was forgotten to include the header. Now the header is included
in km_arm.h. Some other defines were obsolete due to this include,
these are also removed in this commit.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
Holger Brunck
b31a82e95f arm/kirkwood: if CONFIG_SOFT_I2C is set don't set CONFIG_I2C_MVTWSI
Some boards e.g. keymile arm boards have CONFIG_CMD_I2C switched on
but they use soft i2c on kirkwood. So don't switch CONFIG_I2C_MVTWSI
on in this case.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
2011-07-04 10:55:28 +02:00
Jens Scharsig
24e50461c0 Fix compiler error for cpu at91sam9, if lowlevel init is enabled
* Fix compiler error for cpu at91sam9, if lowlevel init is enabled
* use correct ATMEL_ name scheme to define ATMEL_BASE_SDRAMC

Signed-off-by: Jens Scharsig
2011-07-04 10:55:28 +02:00
Andreas Bießmann
221786525f atstk100x: switch to common cfi driver
This patch removes the board implemenatation for flash driver which can now
safely switched to the common cfi driver.

Compile tested for all atstk100x boards, runtime tested on atstk1002.

Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-07-04 10:55:27 +02:00
Andreas Bießmann
18ed5e9550 driver/serial: delete at91rm9200_usart
The at91rm9200_usart driver could be fully replaced by atmel_usart driver.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-07-04 10:55:27 +02:00
Andreas Bießmann
dbbf13ba7b cpuat91: use atmel_usart
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Eric Bénard <eric@eukrea.com>
2011-07-04 10:55:27 +02:00
Andreas Bießmann
5a05cb7356 eb_cpux9k2: use atmel_usart
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Jens Scharsig <js_at_ng@scharsoft.de>
Acked-by: Jens Scharsig<js_at_ng@scharsoft.de>
Tested-by: Jens Scharsig<js_at_ng@scharsoft.de> (for eb_cpux9k2 board)
2011-07-04 10:55:27 +02:00
Andreas Bießmann
3432a93bcd at91rm9200ek: use atmel_usart
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-07-04 10:55:27 +02:00