Commit graph

89 commits

Author SHA1 Message Date
Simon Glass
fb5cfbe17d x86: Update cbmem driver
This driver is not actually built since a Kconfig was never created for
it.

Add a Kconfig (which is already implied by COREBOOT) and update the
implementation to avoid using unnecessary memory. Drop the #ifdef at the
top since we can rely on Kconfig to get that right.

To enable it (in addition to serial and video), use:

   setenv stdout serial,vidconsole,cbmem

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Modified the comment about overflow a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Tom Rini
a077ac13d0 Kconfigs: Correct default of "0" on hex type entries
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0".  However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-09 09:21:42 -04:00
Peng Fan
d3ee9dbd59 imx: use generic name ele(EdgeLockSecure Enclave)
Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave
code including comment, folder and API name to ELE to align.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Vladimir Zapolskiy
1b15483deb misc: add Qualcomm GENI SE QUP device driver
This change adds a Qualcomm GENI SE QUP device driver as a wrapper for
actually enabled and used serial devices found on a board.

At the moment the driver is pretty simple, its intention is to populate
childred devices and provide I/O mem read interface to them as clients,
this is needed for GENI UART driver to set up a proper clock divider
and provide the actually asked baud rate.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Jean-Marie Lemetayer
251a3053b1 misc: imx: remove DM dependency for ocotp driver in SPL
The ocotp driver is available for regular and SPL builds using the
(SPL_)MXC_OCOTP configuration. Also, the ocotp driver does not support
the driver model (DM) configuration.

But, for SPL builds, the SPL_MXC_OCOTP configuration depends on
SPL_MISC which implies on SPL_DM.

This commit replaces the dependency on SPL_MISC with SPL_DRIVERS_MISC.
So the only requirement is to have enabled miscellaneous drivers for
the SPL.

Signed-off-by: Jean-Marie Lemetayer <j.lemetayer@kerlink.fr>
2023-03-30 08:40:27 +02:00
Jonas Karlman
6f95b3e103 rockchip: efuse: Add support for RK3288 and more
Add support for rk3066a, rk3188, rk322x and rk3288 compatible.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Tom Rini
d91365203c Convert CONFIG_SMSC_LPC47M et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SMSC_LPC47M
   CONFIG_SMSC_SIO1007

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:08:37 -05:00
Tom Rini
6c03a65275 Convert CONFIG_MXS_OCOTP to Kconfig
This converts the following to Kconfig:
   CONFIG_MXS_OCOTP

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
060613f119 Convert CONFIG_FSL_IIM to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_IIM

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:06:43 -05:00
Ye Li
03fcf96651 misc: imx: S400_API: Move S400 MU and API to a common place
Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400
MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-07-26 11:29:00 +02:00
Jim Liu
847505a3ee misc: nuvoton: Add host interface configuration driver
add nuvoton BMC npcm750 host configuration driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-07-06 18:34:16 -04:00
Tom Rini
c9f85187e2 Convert CONFIG_SYS_FSL_SEC_MON et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_SEC_MON
   CONFIG_SYS_FSL_SEC_MON_BE
   CONFIG_SYS_FSL_SEC_MON_LE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-05 17:04:00 -04:00
Jim Liu
0ae1c77199 misc: nuvoton: Add NPCM7xx otp controller driver
Add Nuvoton BMC npcm750 otp driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-06-22 21:30:05 -04:00
Tom Rini
52af0101be Merge branch 'master' into next
Merge in v2022.07-rc5.
2022-06-20 14:40:59 -04:00
Sean Anderson
2645bc0e12 arm: layerscape: Add sfp driver
This adds a driver for the Security Fuse Processor (SFP) present on
LS1012A, LS1021A, LS1043A, and LS1046A processors. It holds the
Super-Root Key (SRK), One-Time-Programmable Master Key (OTPMK), and
other "security" related fuses. Similar devices (sharing the same name)
are present on other processors, but for the moment this just supports
the LS2 variants.

The mirror registers are loaded during power-on reset. All mirror
registers must be programmed or read at once. Because of this, `fuse
prog` will program all fuses, even though only one might be specified.
To prevent accidentally burning through all your fuse programming cycles
with something like `fuse prog 0 0 A B C D`, we limit ourselves to one
programming cycle per reset. Fuses are numbered based on their address.
The fuse at 0x1e80200 is 0, the fuse at 0x1e80204 is 1, etc.

The TA_PROG_SFP supply must be enabled when programming fuses, but must
be disabled when reading them. Typically this supply is enabled by
inserting a jumper or by setting a register in the board's FPGA. I've
also added support for using a regulator. This could be helpful for
automatically issuing the FPGA write, or for toggling a GPIO controlling
the supply.

I suggest using the following procedure for programming:

1. Override the fuses you wish to program
   => fuse override 0 2 A B C D
2. Inspect the values and ensure that they are what you expect
   => fuse sense 0 2 4
3. Enable TA_PROG_SFP
4. Issue a program command using OSPR0 as a dummy. Since it contains the
   write-protect bit you will usually want to write it last anyway.
   => fuse prog 0 0 0
5. Disable TA_PROG_SFP
6. Read back the fuses and ensure they are correct
   => fuse read 0 2 4

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-20 09:18:25 +08:00
Sean Anderson
c8ce7ba87d misc: Add support for nvmem cells
This adds support for "nvmem cells" as seen in Linux. The nvmem device
class in Linux is used for various assorted ROMs and EEPROMs. In this
sense, it is similar to UCLASS_MISC, but also includes
UCLASS_I2C_EEPROM, UCLASS_RTC, and UCLASS_MTD. New drivers corresponding
to a Linux-style nvmem device should be implemented as one of the
previously-mentioned uclasses. The nvmem API acts as a compatibility
layer to adapt the (slightly different) APIs of these uclasses. It also
handles the lookup of nvmem cells.

While nvmem devices can be accessed directly, they are most often used
by reading/writing contiguous values called "cells". Cells typically
hold information like calibration, versions, or configuration (such as
mac addresses).

nvmem devices can specify "cells" in their device tree:

	qfprom: eeprom@700000 {
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x00700000 0x100000>;

		/* ... */

		tsens_calibration: calib@404 {
			reg = <0x404 0x10>;
		};
	};

which can then be referenced like:

	tsens {
		/* ... */
		nvmem-cells = <&tsens_calibration>;
		nvmem-cell-names = "calibration";
	};

The tsens driver could then read the calibration value like:

	struct nvmem_cell cal_cell;
	u8 cal[16];
	nvmem_cell_get_by_name(dev, "calibration", &cal_cell);
	nvmem_cell_read(&cal_cell, cal, sizeof(cal));

Because nvmem devices are not all of the same uclass, supported uclasses
must register a nvmem_interface struct. This allows CONFIG_NVMEM to be
enabled without depending on specific uclasses. At the moment,
nvmem_interface is very bare-bones, and assumes that no initialization
is necessary. However, this could be amended in the future.

Although I2C_EEPROM and MISC are quite similar (and could likely be
unified), they present different read/write function signatures. To
abstract over this, NVMEM uses the same read/write signature as Linux.
In particular, short read/writes are not allowed, which is allowed by
MISC.

The functionality implemented by nvmem cells is very similar to that
provided by i2c_eeprom_partition. "fixed-partition"s for eeproms does
not seem to have made its way into Linux or into any device tree other
than sandbox. It is possible that with the introduction of this API it
would be possible to remove it.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-06-08 14:00:22 -04:00
Marek Vasut
02544db9a7 misc: Port USB251xB/xBi Hi-Speed Hub Controller Driver from Linux
This patch adds a driver for configuration of the Microchip USB251xB/xBi
USB 2.0 hub controller series with USB 2.0 upstream connectivity, SMBus
configuration interface and two to four USB 2.0 downstream ports.

This is ported from Linux as of Linux kernel commit
5c2b9c61ae5d8 ("usb: usb251xb: add boost-up property support")

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
2022-06-07 16:14:20 +02:00
Tom Rini
8a1ab5e811 misc: Correct Kconfig dependencies for a number of options
We have many cases of SPL (or TPL or VPL) drivers that don't depend on
SPL_MISC (and so on) but rather just MISC.

Cc: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2022-06-06 17:47:17 -04:00
Sean Anderson
381277410d misc: Fix always compiling MISC even for SPL/TPL
We should only build support for misc if the appropriate SPL/TPL symbol
is defined. To ease the transition, make SPL/TPL_MISC default to MISC.
This is necessary because many drivers don't specify their dependencies
properly. These defaults can be removed once all drivers depend on the
appropriate config.

Fixes: aaba703fd0 ("spl: misc: Allow misc drivers in SPL and TPL")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add VPL_MISC symbol, handle like SPL/TPL_MISC]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-10 09:51:50 -04:00
Simon Glass
747093dd40 vpl: Add Kconfig options for VPL
Add VPL versions of commonly used Kconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-05-02 09:58:13 -04:00
Pali Rohár
467f0c4dc2 misc: atsha204a: Remove duplicate CRC-16 implementation
ATSHA204A uses bit-reversed checksum of standard CRC-16 with polynomial
x^16 + x^15 + x^2 + 1.

This ATSHA204A specific checksum can be calculated just by using common
U-Boot functions bitrev16() and crc16().

So replace custom driver CRC-16 implementation by common U-Boot functions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-04-21 14:32:40 -04:00
Tim Harvey
8479b9e6c9 drivers: misc: add Gateworks System Controller driver
Add a driver for the Gateworks System Controller used on Gateworks boards
which provides a boot watchdog, power control, temperature monitor,
and voltage ADCs.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-12 15:36:17 +02:00
Michael Walle
42595eb706 misc: add sl28cpld base driver
Add a multi-function device driver which will probe its children and
provides methods to access the device.

Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28 11:59:35 +05:30
Keerthy
b071a07743 drivers: misc: Makefile: Enable fs_loader compilation at SPL Level
Enable fs_loader compilation at SPL Level.

Signed-off-by: Keerthy <j-keerthy@ti.com>
[Amjad: fix compilation failures for J721e platform]
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2022-02-08 11:00:02 -05:00
Tom Rini
98ab831da7 Convert CONFIG_FSL_IFC to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_IFC

This is done via select statements to match previous logic.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Tom Rini
5fd4a7ed0c Clarify CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW in Kconfig
This is a "hex" prompt but the default value was given as an int.
Switch the default to hex (0x0) and remove the defconfigs that were
using the default, but as hex before.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Michael Scott
33e9a69560 misc: ocotp: Allow disabling ocotp driver in SPL
This allows removal of the OCOTP driver when SPL is enabled.
Disabling OCOTP reduces SPL size efficiently.

Signed-off-by: Michael Scott <mike@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-10-07 16:53:50 +02:00
Tom Rini
88cd7d0ea9 Convert CONFIG_SYS_I2C_EEPROM_ADDR et al to Kconfig
- Rename usages of CONFIG_SYS_DEF_EEPROM_ADDR to CONFIG_SYS_I2C_EEPROM_ADDR
  based on current usage.
- Convert CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
  CONFIG_SYS_I2C_EEPROM_BUS, CONFIG_CONFIG_SYS_EEPROM_SIZE
  CONFIG_SYS_EEPROM_PAGE_WRITE_BITS and CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
  to Kconfig.  We move these symbols around a bit and add appropriate
  dependencies to them.  In some cases, we now add a correct default value
  as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 14:10:06 -04:00
Wasim Khan
182c5f1efb misc: make CONFIG_IRQ selectable for all platforms
UCLASS_IRQ driver is not Intel specific. Make CONFIG_IRQ
selectable for all platforms.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-20 07:31:12 -04:00
Asherah Connor
5830b57bf9 qemu: add MMIO driver for QFW
Add MMIO driver for QFW.

Note that there is no consumer as of this patch.

Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-12 17:45:40 -04:00
Asherah Connor
5b0b43e0e2 x86: qemu: move QFW to its own uclass
We move qfw into its own uclass and split the PIO functions into a
specific driver for that uclass.  The PIO driver is selected in the
qemu-x86 board config (this covers x86 and x86_64).

include/qfw.h is cleaned up and documentation added.

Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-12 17:44:55 -04:00
Simon Glass
079ac59586 test: Move some test drivers into their own file
At present several test drivers are part of the test file itself. Some of
these are useful for of-platdata tests. Separate them out so we can use
them for other things also.

A few adjustments are needed so this driver can build for sandbox_spl as
well.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Michal Simek
83594f3c01 xilinx: common: Move ZYNQ_GEM_I2C_MAC_OFFSET to board Kconfig
There is no reason to have ZYNQ specific Kconfig macro in generic location
to be visible for all other SoCs. That's why move it to Xilinx common
location to be visible only for us.
Also introduce new bool entry ZYNQ_MAC_IN_EEPROM to have also an option to
disable it or enable. This has connection to code which is reading the
whole content of i2c and also work with the rest of date not just with MAC
address.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Wolfgang Wallner
d872e7da7a drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge
In Intel's documentation the term P2SB stands for "Primary to Sideband
Bridge".

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00
Pragnesh Patel
05307213c6 misc: add driver for the SiFive otp controller
Added a misc driver to handle OTP memory in SiFive SoCs.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
Trevor Woerner
71f6354b0e rename symbol: CONFIG_STM32 -> CONFIG_ARCH_STM32
Have this symbol follow the pattern of all other such symbols.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15 14:47:35 -04:00
Tero Kristo
3b36b38f50 misc: pmic_esm: Add support for PMIC ESM driver
The ESM (Error Signal Monitor) is used on certain PMIC versions to
handle error signals propagating from rest of the system. If these
reach the PMIC, it is typically a last resort fatal error which
requires a system reset. The ESM driver does the proper configuration
for the ESM module to reach this end goal. Initially, only TPS65941
PMIC is supported for this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
344eb6d572 misc: k3_esm: Add support for Texas Instruments K3 ESM driver
The ESM (Error Signaling Module) is used to route error signals within
the K3 SoCs somewhat similar to interrupts. The handling for these is
different though, and can be routed for hardware error handling, to
be handled by safety processor or just as error interrupts handled
by the main processor. The u-boot level ESM driver is just used to
configure the ESM signals so that they get routed to proper destination.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Simon Glass
79d66a6ac1 x86: Move UCLASS_IRQ into a separate file
Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:12 +08:00
Simon Glass
5bee27aa41 pci: Add support for p2sb uclass
The Primary-to-Sideband bus (P2SB) is used to access various peripherals
through memory-mapped I/O in a large chunk of PCI space. The space is
segmented into different channels and peripherals are accessed by
device-specific means within those channels. Devices should be added in
the device tree as subnodes of the p2sb.

This adds a uclass and enables it for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:11 +08:00
Finley Xiao
a907dc3f25 misc: add driver for the Rockchip otp controller
Newer Rockchip socs like the px30 use a different ip block to handle
one-time-programmable memory, so add a misc driver for it as well.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17 17:23:15 +08:00
Tero Kristo
9d233b4e3e misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07 18:39:16 -05:00
Eugen Hristev
f81649586d misc: microchip_flexcom: introduce microchip_flexcom driver
The Microchip Flexcom is just a wrapper which embeds a SPI controller,
an I2C controller and an USART.
Only one function can be used at a time and is chosen at boot time according
to the device tree.
The bindings are kept as in Linux.
The driver registers to MISC_UCLASS.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-24 13:01:57 +03:00
Peng Fan
994ab731b3 misc: Kconfig: make i.MX7ULP could use MXC_OCOTP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Adam Ford
a074667d52 Kconfig: Varios: Fix more SPL, TPL dependencies
Several options are presenting themselves on a various boards
where the options are clearly not used.  (ie, SPL/TPL options
when SPL or TPL are not defined)

This patch is not attempting to be a complete list of items, but
more like low hanging fruit.  In some instances, I wasn't sure
of DM was required, so I simply made them SPL or TPL.

This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-26 11:46:29 -04:00
Simon Glass
aaba703fd0 spl: misc: Allow misc drivers in SPL and TPL
In some cases it is necessary to read the keyboard in early phases of
U-Boot. The cros_ec keyboard is kept in the misc directory. Update the
config to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-05-21 17:33:23 -06:00
Marcel Ziswiler
0a6f625d65 configs: move CONFIG_MXC_OCOTP to Kconfig
While commit 3e020f03e9 ("driver: misc: add MXC_OCOTP Kconfig entry")
introduced a Kconfig entry it did not actually migrate all
configurations to using it.

As CONFIG_MXC_OCOTP was in mx{6/7}_common.h enable it by default on
those architectures. Additionally, also enable it on ARCH_IMX8M and
ARCH_VF610 where all current members enabled it through their legacy
configuration header files.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-13 20:30:09 +02:00
Michal Simek
027b1134b2 xilinx: common: Remove !DM_i2C code for reading mac from eeprom
All platforms are converted to DM_I2C that's why there is no reason to
keep this code here.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-14 14:31:10 +01:00
Paul Burton
b5392c50bd misc: Add JZ47xx efuse driver
Add driver for the efuse block in the JZ47xx SOC.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2018-12-19 15:23:01 +01:00
Mario Six
ab88bd2b6a misc: Add IHS FPGA driver
Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which
supports initialization of the FPGA, as well as information gathering.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-11-14 09:16:27 -08:00