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configs: move CONFIG_MXC_OCOTP to Kconfig
While commit 3e020f03e9
("driver: misc: add MXC_OCOTP Kconfig entry")
introduced a Kconfig entry it did not actually migrate all
configurations to using it.
As CONFIG_MXC_OCOTP was in mx{6/7}_common.h enable it by default on
those architectures. Additionally, also enable it on ARCH_IMX8M and
ARCH_VF610 where all current members enabled it through their legacy
configuration header files.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
This commit is contained in:
parent
34db6e8717
commit
0a6f625d65
14 changed files with 2 additions and 41 deletions
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@ -49,7 +49,6 @@ CONFIG_SYS_I2C_MXC_I2C4=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_MISC=y
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CONFIG_MXC_OCOTP=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_SYS_I2C_EEPROM_BUS=2
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@ -36,7 +36,6 @@ CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_SYS_I2C_MXC_I2C4=y
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CONFIG_MISC=y
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CONFIG_MXC_OCOTP=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_SYS_I2C_EEPROM_BUS=2
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@ -128,6 +128,8 @@ config JZ4780_EFUSE
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config MXC_OCOTP
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bool "Enable MXC OCOTP Driver"
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depends on ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_VF610
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default y
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help
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If you say Y here, you will get support for the One Time
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Programmable memory pages that are stored on the some
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@ -34,8 +34,6 @@
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_OCOTP
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/* SATA Configs */
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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@ -41,11 +41,6 @@
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_MXC_I2C3_SPEED 400000
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/* OCOTP Configs */
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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/* MMC Configs */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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@ -39,11 +39,6 @@
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_MXC_I2C3_SPEED 400000
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/* OCOTP Configs */
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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/* MMC Configs */
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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@ -17,10 +17,6 @@
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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#ifdef CONFIG_VIDEO_FSL_DCU_FB
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_VIDEO_LOGO
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@ -48,11 +48,6 @@
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_ARP_TIMEOUT 200UL
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/* Fuses */
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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@ -35,8 +35,6 @@
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_OCOTP
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/* SATA Configs */
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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@ -230,7 +230,6 @@
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_OCOTP
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#define CONFIG_CMD_FUSE
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/* I2C Configs */
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@ -31,11 +31,6 @@
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_ARP_TIMEOUT 200UL
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/* Fuses */
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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@ -57,9 +57,6 @@
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/* MMC */
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#define CONFIG_FSL_USDHC
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/* Fuses */
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#define CONFIG_MXC_OCOTP
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/* Secure boot (HAB) support */
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#ifdef CONFIG_SECURE_BOOT
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#define CONFIG_CSF_SIZE 0x2000
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@ -42,9 +42,6 @@
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/* MMC */
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#define CONFIG_FSL_USDHC
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/* Fuses */
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#define CONFIG_MXC_OCOTP
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#define CONFIG_ARMV7_SECURE_BASE 0x00900000
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#define CONFIG_ARMV7_PSCI_1_0
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@ -19,10 +19,6 @@
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/* Enable passing of ATAGs */
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#define CONFIG_CMDLINE_TAG
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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