With the boot0-hook inserting the additional padding to receive our
SPL magic, the SPL_TEXT_BASE can be aligned again.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
After we use boot0 hook, we can use offset '000' instead of '004' as
SPL_TEXT_BASE.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated tag in commit summary:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Enable the spl_boot0 in SPL and use the pre-padding TAG memory,
the mkimage do not need to pad it but only need to replace the value
with correct TAG value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Rockchip SoCs bootrom design is like this:
- First 2KB or 4KB internal memory is for bootrom stack and heap;
- Then the first 4-byte suppose to be a TAG like 'RK33';
- The the following memory address end with '0004' is the first
instruction load and running by bootrom;
Let's use the boot0 hook to reserve the first 4-byte tag for all
the Rockchip SoCs.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Commit message taken from an older patch by:]
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated to current code base:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The boot0 hook on ARM does not insert its payload before the vector
table. This is both a mismatch with thec comment above it and
contradict usage of the boot0 hook on ARM64.
To fix this (and unify the semantics for ARM and ARM64), we change the
boot0-hook semantics on ARM to match those on ARM64:
(1) if a boot0-hook is present it is inserted at the start of
the image
(2) if a boot0-hook is present, emitting the ARM vector table
(and the _start) symbol are suppressed in vectors.S and
the boot0-hook has full control over where and when it
wants to emit these
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Configure thermal configs to remain set by default for dra7xx and am57xx
devices.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark bandgap node as uboot,dm-spl so that it can be accessed in spl
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The dra7xx series of SOCs contain a temperature sensor and an
associated analog-to-digital converter (ADC) which produces
an output which is proportional to the SOC temperature.
Add support for this temperature sensor.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Old url currently returns 403; modify to url that actually works
with current state of the list server
Signed-off-by: S. Lockwood-Childs <sjl@vctlabs.com>
With commit 84d46e7e89 ("tools: env: allow to print U-Boot version")
the fw_env utilities need the version.h header file. Building only
the envtools in a pristine build directory will fail due to missing
header files.
Make sure the header files are a dependency of the envtools target.
Fixes: 84d46e7e89 ("tools: env: allow to print U-Boot version")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building on a multi-core machine for an SPL-enabled board that
also uses CONFIG_OF_EMBED, the following error can be encountered
due to a race condition:
make[3]: *** No rule to make target 'spl/dts/dt.dtb.o', needed by
'spl/dts/built-in.o'. Stop.
../scripts/Makefile.spl:364: recipe for target 'spl/dts' failed
make[2]: *** [spl/dts] Error 2
make[2]: *** Waiting for unfinished jobs....
A reliable way to trigger this race condition is to add "sleep 60" to
the end of the "arch-dtbs" rule's recipe in "dts/Makefile" and to build
U-Boot against a board which uses the CONFIG_OF_EMBED and CONFIG_SPL
options using "make -j8" or a similar command.
This commit corrects this race condition via the use of CONFIG_OF_EMBED
in the same way that commit 3c00a2c8b5 ("Makefile: Correct dependency
race condition with TPL") and commit 054b3a1e80 ("dm: Makefile: Build
of-platdata before SPL") use CONFIG_OF_SEPARATE.
Signed-off-by: M. Vefa Bicakci <m.v.b@runbox.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
0 is not a pointer. So do not compare pointers to 0.
Do not return 0 from functions with a pointer return
type.
Problem identified with Coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add some useful static code analysis scripts for coccinelle
copied from the Linux kernel v4.14-rc8:
Warn on check against NULL before calling free.
scripts/coccinelle/free/ifnullfree.cocci
Detect superfluous NULL check for list iterator.
scripts/coccinelle/iterators/itnull.cocci
Check if list iterator is reassigned.
scripts/coccinelle/iterators/list_entry_update.cocci
Check if list iterator is used after loop.
scripts/coccinelle/iterators/use_after_iter.cocci
Find wrong argument of sizeof in allocation function:
scripts/coccinelle/misc/badty.cocci
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Coccinelle is a program for static code analysis.
For details on Coccinelle see
http://coccinelle.lip6.fr/
Add scripts/coccicheck copied from Linux kernel v4.14.
The coccicheck script executes the tests *.cocci in
directory scripts/coccinelle by calling spatch.
In Makefile add a coccicheck target. You can use it with
make coccicheck MODE=<mode>
where mode in patch, report, context, org.
Add a copy of Linux v4.14 file Documentation/dev-tools/coccinelle.rst
as doc/README.coccinelle.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The iterator variable of list_for_each is never NULL.
if (1 || A) is always true.
Use break if entry found.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
As per current android recommendation
https://source.android.com/devices/architecture/kernel/modular-kernels
1. Android recovery mode should contain both SOC and ODM
kernel modules in the recovery partition.
2. If a kernel module is required both in recovery and normal boot
mode, the module has to be located in recovery and vendor
partition seperately.
3. Kernel modules used in recovery mode should be independent
of vendor and odm partition
4. Recovery image should contain atleast
storage, display, keypad, battery and pmic modules.
Due to these requirements, recovery image size has increased
to >10MB.
This patch is to increase recovery partition size for TI devices
so that we dont see such flashing error
log:
sending 'recovery' (12560 KB)...
OKAY [ 0.436s]
writing 'recovery'...
FAILED (remote: too large for partition)
finished. total time: 0.458s
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
ld --version | scripts/ld-version.sh
fails with
awk: scripts/ld-version.sh:
line 4: regular expression compile failed (missing '(')
.*)
So let's refresh the script from Linux kernel v4.14-rc8.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
sym_arr is of type struct symbol **.
So in malloc we need sizeof(struct symbol *).
The problem was indicated by coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add a driver for the I2C controller available on Amlogic Meson SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
We first introduce CONFIG_USE_BOOTCOMMAND, similar to
CONFIG_USE_BOOTARGS. We then migrate CONFIG_BOOTCOMMAND for most
CONFIG_DISTRO_DEFAULT users. In some cases platforms have a complex
scheme around this usage, and these have been defered for the moment so
that platform maintainers can work on a migration plan.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Since CONFIG_DEFAULT_CONSOLE is already started with "console=",
the console argument in CONFIG_EXTRA_ENV_SETTINGS is expanded to
"console=console=ttySAC1,115200n8" and this causes the wrong
console device.
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
...
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=" CONFIG_DEFAULT_CONSOLE
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
UARTs 1 through 5 were missing in the code - added.
Also pick the default according to the configuration setting for the
console index.
Signed-off-by: Ronald Landheer-Cieslak <ronaldlandheercieslak@eaton.com>
This patch is to change U-Boot PCI bus assignement compliant with Linux.
It means each PCIe controller's bus number is 0, not the current maximum
PCI bus number, when start to scan this controller.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tag CPU with dm-pre-reloc to enable driver before
relocation.
Signed-off-by: Gan, Yau Wai <yau.wai.gan@intel.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
While commit 36d35345b1 ("tpm: add missing va_end") added
some missing calls to va_end(), it missed a few places.
Signed-off-by: André Draszik <adraszik@tycoint.com>
Acked-by: Simon Glass <sjg@chromium.org>
TPM_NV_PER_PPREAD: physical presence needed for reading
TPM_NV_PER_WRITEDEFINE: persistent write lock by writing size 0
TPM_NV_PER_WRITEALL: write in one go
Signed-off-by: André Draszik <adraszik@tycoint.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add a function to obtain random data from the TPM.
Signed-off-by: André Draszik <adraszik@tycoint.com>
Added commit message, add cast to min()
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Allow the platform to define a partition by name at the end of which
the environment data will be located.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
In U-boot, serial_tstc was use to determine is there have a character in
serial console that pending for read. If there is no "pending" function
implemented in serial driver, the serial-uclass will return "true(1)"
to indicate there have a character pending to read.
Thus, read a character from nulldev serial will result in continuous
getting -EAGAIN return which might lead system to hang.
This commit is to fix a bug in nulldev serial which implement "pending"
function in nulldev serial to always indicate there is no character in
console that pending for read.
Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
We need to update gd in assamble code after relocate,
this is a fix to:
adc421e arm: move gd handling outside of C code
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This is required in the case where U-Boot is typically loaded and run at
a particular address, but for some reason the RAM at that location is not
available, e.g. due to memory fragmentation loading other boot binaries or
firmware, splitting an SMP complex between various different OSs without
using e.g. the EL2 second-stage page tables to hide the memory asignments,
or due to known ECC failures.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
It can be useful to record how long tests take; this can help debug slow
running test systems or track changes in performance over time. Enhance
the test system to record timestamps while running test:
- Whenever a new log file section is started.
- After U-Boot is started and communication has been established.
- After each host or U-Boot command is executed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Fix clock division factor initialization for RCC_PLLCFGR
registers.
PLLR bits (bit 31-28) in RCC_PLLCFGR must not be cleared,
it's a forbidden value. So update RCC_PLLCFGR using
clrsetbits_le32() to set only necessary bits fields.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert this driver to driver model.
This driver is also used by VEXPRESS platforms which doesn't
use driver model.
Tested on STM32F746 and STM32F769 platforms.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
