Commit graph

1878 commits

Author SHA1 Message Date
Shengzhou Liu
0c028a0328 arm: ls102x: add get_svr and IS_SVR_REV helper
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-12-13 18:27:28 -08:00
Jens Kuske
bb3654629a sunxi: Fix H3 DRAM DQ read delay configuration
The read delays were set incorrectly, leading to reliability
issues at higher DRAM clock speeds. This commit adjusts this
to match the vendor boot0 behaviour.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-12-10 15:45:48 +01:00
Olliver Schinagl
23baf66f25 sun4i: clock: Cleanup some whitespace errors
Add some spaces around operators.

Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-12-10 15:45:48 +01:00
Olliver Schinagl
887e2fd9da sunxi: twi: Enable clocks on sun7i
Commit 6c739c5d added code to enable i2c bus 4 and 5 on the sun7i SoC
but forgot to extend the range check in clock_twi_onoff, resulting in
the clock not getting enabled.

The range-check is not needed at all, since clock_twi_onoff only gets
called with such high indexes when CONFIG_I2C3_ENABLE / CONFIG_I2C4_ENABLE
is set and Kconfig already only allows these on sun6i / sun7i.

This commit removes the range-check all together fixing i2c bus 4 and 5
not working on sun7i.

Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
[hdegoede@redhat.com] Remove range check instead of extending it
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-12-10 15:45:48 +01:00
vishnupatekar
81f50d93cb sunxi: Add support for Allwinner A83T DRAM
Add support for A83T dram. Register are different from sun8i A33.
init code is similar to A33 dram init.
hope we'll shift duplicate code in dram_sun8i_*
to dram helper in future.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-12-10 15:45:47 +01:00
vishnupatekar
f542948b1e sunxi: clk: add basic clocks for A83T
Add basic clocks pll1, pll5, and some default values from allwinner u-boot.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
[hdegoede@redhat.com] Fix PLL6 init to run at 600 MHz instead of 288 MHz,
fixing the mmc support not working
[hdegoede@redhat.com] Fix PLL init code to properly wait for the PLL-s to
stabilize, fixing cold-booting directly from sdcard not working
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-12-10 15:45:47 +01:00
vishnupatekar
95ab8fee8a sunxi: power: enabled support for axp818
Enabled support for AXP818 in SPL and u-boot.
DCDC1, DCDC2, DCDC3 and DCSC5 are enabled.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-12-10 11:14:22 +01:00
vishnupatekar
d5a3357f1b sunxi: Add support for UART0 in PB pin group on A83T
On A83T, PB9,PB10 are UART0 pins.
On allwinner A83T Dev board(h8homlet), this uart0 serial connector
is exposed.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-12-10 11:14:21 +01:00
vishnupatekar
762e24a078 sunxi: Add Machine Support for A83T SOC
Allwinner A83T is octa-core cortex-a7 SOC.
This enables support for A83T.

SMP is not yet supported.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-12-10 11:14:21 +01:00
Tom Rini
75507d5d54 am33xx: Update serial pdata
We now want to make sure that we have the platform data for NS16550 when
we do not have OF_CONTROL set.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-12-06 16:38:05 -05:00
Tom Rini
a85670e40d Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-12-04 08:21:28 -05:00
Tom Rini
1670c8c219 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2015-11-30 15:18:30 -05:00
Alison Wang
a1399534f1 arm: ls1021a: Ensure Generic Timer disabled before jumping into the OS
This patch addresses a problem mentioned recently on this mailing list:
[1].

In that posting a LS1021 based system was locking up at about 5 minutes
after boot,but the problem was mysteriously related to the toolchain
used for building u-boot.Debugging the problem reveals a stuck
interrupt 29 on the GIC.

It appears Freescale's LS1021 support in u-boot erroneously sets the
64-bit ARM generic PL1 physical time CompareValue register to all-ones
with a 32-bit value.This causes the timer compare to fire 344 seconds
after u-boot configures it.Depending on how fast u-boot gets the
kernel booted,this amounts to about 5-minutes of Linux uptime before
locking up.

Apparently the bug is masked by some toolchains. Perhaps this is
explained by default compiler options, word sizes, or binutils versions.

To fix the above issue, the generic physical timer is disabled
before jumping to the OS.

[1]
https://lists.yoctoproject.org/pipermail/meta-freescale/2015-June/014400.html

Signed-off-by: Chris Kilgour <techie@whiterocker.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30 08:53:01 -08:00
Alison Wang
2b714cfad4 arm: ls1021a: Ensure LS1021 ARM Generic Timer CompareValue Set 64-bit
This patch addresses a problem mentioned recently on this mailing list:
[1].

In that posting a LS1021 based system was locking up at about 5 minutes
after boot, but the problem was mysteriously related to the toolchain
used for building u-boot.  Debugging the problem reveals a stuck
interrupt 29 on the GIC.

It appears Freescale's LS1021 support in u-boot erroneously sets the
64-bit ARM generic PL1 physical time CompareValue register to all-ones
with a 32-bit value.  This causes the timer compare to fire 344 seconds
after u-boot configures it.  Depending on how fast u-boot gets the
kernel booted, this amounts to about 5-minutes of Linux uptime before
locking up.

Apparently the bug is masked by some toolchains.  Perhaps this is
explained by default compiler options, word sizes, or binutils versions.
At any rate this patch makes the manipulation explicitly 64-bit which
alleviates the issue.

[1]
https://lists.yoctoproject.org/pipermail/meta-freescale/2015-June/014400.html

Signed-off-by: Chris Kilgour <techie@whiterocker.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-30 08:53:01 -08:00
Minkyu Kang
225f5eeccd arm: s5pc1xx: move SoC to mach-s5pc1xx
move arm/arm/cpu/armv7/s5pc1xx to arch/arm/mach-s5pc1xx

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-30 17:17:01 +09:00
Ye.Li
90447ef03c mx6: clock: Modify GPMI clock to support mx6sx
On mx6sx, the CCM register bits for GPMI are different as other
mx6 platforms. Modify the GPMI clock function to support mx6sx.

Signed-off-by: Ye.Li <B37916@freescale.com>
2015-11-25 11:40:04 +01:00
Otavio Salvador
d7140351c2 cgtqmx6eval: Add SPL support
Congatec has several MX6 boards based on quad, dual, dual-lite and solo.

Add SPL support so that all the variants can be supported

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-11-25 09:41:29 +01:00
Vignesh R
71cbed31f4 am33xx: Remove serial_init in s_init for QSPI/NOR XIP boot
serial_init() reads global_data, since global_data is not yet
initialized, this can cause unwanted behaviour leading to QSPI XIP boot
hang. Also, since serial_init() is anyways called later from
boar_init_f(), it does not make sense to do the same in s_init().

Tested on AM437x IDK EVM with QSPI XIP boot.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-23 11:01:53 -05:00
Siarhei Siamashka
52d093112a sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3
The 3.4 kernel from the Allwinner SDK is clocking AHB1 at 200MHz
on Allwinner H3 and using PLL6 as the clock source (PLL6/3).
This can be verified by reading the value of the AHB1_APB1_CFG_REG
register via /dev/mem. It always reads as 0x3180 regardless of
the current cpufreq operating point. So this configuration should
be safe for use in U-Boot too.

PLL6 also needs to be configured before it is used as the clock
source, according to the "CCU / Programming Guidelines" section
of the Allwinner manual.

The current low AHB1 clock speed is limiting the USB transfer
speed when booting via FEL. This patch can increase the FEL USB
transfer speed from ~510 KB/s to ~950 KB/s.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:31:00 +01:00
Jens Kuske
0404d53f2f sunxi: Add H3 DRAM initialization support
Based on existing A23/A33 code and the original H3 boot0.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:31:00 +01:00
Jens Kuske
1c27b7dcd0 sunxi: Add basic H3 support
Add initial sun8i H3 support, only uart + mmc are supported for now.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:30:59 +01:00
Nikita Kiryanov
a1e56cf6d4 spl: mmc: add support for BOOT_DEVICE_MMC2
Currently the mmc device that SPL looks at is always mmc0, regardless
of the BOOT_DEVICE_MMCx value. This forces some boards to
implement hacks in order to boot from other mmc devices.

Make SPL take into account the correct mmc device.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-18 14:50:05 -05:00
Nikita Kiryanov
36afd45136 spl: change return values of spl_*_load_image()
Make spl_*_load_image() functions return a value instead of
hanging if a problem is encountered. This enables main spl code
to make the decision whether to hang or not, thus preparing
it to support alternative boot devices.

Some boot devices (namely nand and spi) do not hang on error.
Instead, they return normally and SPL proceeds to boot the
contents of the load address. This is considered a bug and
is rectified by hanging on error for these devices as well.

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Hans De Goede <hdegoede@redhat.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Jagan Teki <jteki@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-18 14:50:02 -05:00
Kipisz, Steven
74cc8b097d board: ti: beagle_x15: Rename to indicate support for TI am57xx evms
BeagleBoard X15 (http://beagleboard.org/x15) support in u-boot does
actually support two different platform configuration offered by
TI. In addition to BeagleBoard X15, it also supports the TMDXEVM5728
(or more commonly known as AM5728-evm).

Information about the TI AM57xx EVM can be found here
http://www.ti.com/tool/tmdxevm5728

The EVM configuration is 1-1 compatible with BeagleBoard X15 with the
additional support for mPCIe, mSATA, LCD, touchscreen, Camera, push
button and TI's wlink8 offering.

Hence, we rename the beagle_x15 directory to am57xx to support TI
EVMs that use the AM57xx processor. By doing this we have common code
reuse. This sets the stage to have a common u-boot image solution for
multiple TI EVMs such as that already done for am335x and am437x. This
sets the stage for upcoming multiple TI EVMs that share the same code
base.

NOTE: Commit eae7ae1853 ("am437x: Add am57xx_evm_defconfig using
CONFIG_DM") introduced DT support for beagle_x15 under am57xx_evm
platform name. However, this ignored the potential confusion arising for
users as a result. To prevent this, existing beagle_x15_defconfig is
renamed as am57xx_evm_nodt_defconfig to denote that this is the "non
device tree" configuration for the same platform. We still retain
am57xx-beagle-x15.dts at this point, since we just require the common
minimum dts.

As a result of this change, users should expect changes in build
procedures('make am57xx_evm_nodt_defconfig' instead of 'make
beagle_x15_defconfig'). Hopefully, this would be a one-time change.

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Schuyler Patton <spatton@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-11-18 08:47:03 -05:00
Peng Fan
eb111bb31d imx: mx6: implement reset_misc
We need to power down lcdif before uboot reset to make reset can pass
stress test.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-11-12 17:40:53 +01:00
Peng Fan
ad153782e0 imx: mx6: add clock api for lcdif
Implement mxs_set_lcdclk, enable_lcdif_clock and enable_pll_video.
The three API can be used to configure lcdif related clock when
CONFIG_VIDEO_MXS enabled.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-11-12 17:40:53 +01:00
Peng Fan
7de4703691 mx7: psci: add basic psci support
1. add basic psci support for imx7 chip.
2. support cpu_on and cpu_off.
3. switch to non-secure mode when boot linux kernel.
4. set csu allow accessing all peripherial register in non-secure mode.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2015-11-12 17:31:16 +01:00
Stefano Babic
5f5620ab26 Merge git://git.denx.de/u-boot 2015-11-12 17:13:26 +01:00
Przemyslaw Marczak
fdbb740d7c s5p: cpu_info: print "cpu-model" if exists in dts
The CPU name for Exynos was concatenated with cpu id,
but for new Exynos platforms, like Chromebook Peach Pi
based on Exynos5800, the name of SoC variant does not
include the real SoC cpu id (0x5422).

For such case, the CPU name should be defined in device tree.

This commit introduces new device-tree property for Exynos:
- "cpu-model" - with cpu name string
If defined, then the cpu id is not printed.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-02 10:37:59 +09:00
Adrian Alonso
bb955146f0 arm: imx: add secure boot fuse details for imx7 SoC
Add secure boot fuse details (location) bank = 1, word = 3;
for imx7 SoC platforms.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30 15:22:36 +01:00
Adrian Alonso
6b50bfe56d arm: imx: add secure boot fuse details for imx6 SoC
Add secure boot fuse details (location) bank = 0, word = 6;
for imx6 SoC platforms.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30 15:22:36 +01:00
Adrian Alonso
6d846c726b imx: hab: rework unified rom section for mx7
Rework unified section macro select via Kconfig option
instead of macro definition in mx7_common header file.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30 15:22:36 +01:00
Adrian Alonso
a89729c9ca imx: hab: use unified rom section for mx6sx and mx6ul
Add CONFIG_ROM_UNIFIED_SECTIONS for mx6sx and mx6ul target
platforms to resolve corresponding HAB_RVT_BASE base address,
the RVT table contains pointers to the HAB API functions in
ROM code.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30 15:20:57 +01:00
Adrian Alonso
7a7281a91c imx: hab: rework secure boot support for imx6
Rework secure boot support for imx6, move existing hab support
for imx6 into imx-common for SoC reuse.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30 15:20:57 +01:00
tang yuantian
4632ad773e arm: ls1021a: Add sata support on qds and twr board
Freescale ARM-based Layerscape LS102xA contain a SATA controller
which comply with the serial ATA 3.0 specification and the
AHCI 1.3 specification.
This patch adds SATA feature on ls1021aqds and ls1021atwr boards.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29 10:34:02 -07:00
horia.geanta@freescale.com
5757e06c69 arm: ls102xa: enable snooping for CAAM transactions
Enable snooping for CAAM read & write transactions by
programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP]
SCFG_SNPCNFGCR[SECWRSNP]

Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29 10:33:58 -07:00
Alison Wang
0cbba8e953 ls102xa: fdt: Disable IFC in SD boot for QSPI
As QSPI/DSPI and IFC are pin multiplexed, IFC is disabled
in SD boot for QSPI. This patch will add fdt support for
this rule.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29 10:33:56 -07:00
Paul Kocialkowski
2da87ab353 omap-common: Common get_board_serial function to pass serial through ATAG
Since there is a common function to grab the serial number from the die id bits,
it makes sense have one to parse that serial number and feed it to the serial
ATAG.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22 14:18:31 -04:00
Paul Kocialkowski
679f82c349 omap-common: Common function to display die id, replacing omap3-specific version
This introduces omap_die_id_display to display the full die id.
There is no need to store it in an environment variable, that no boot script
is using anyway.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22 14:18:30 -04:00
Paul Kocialkowski
07815eb9f3 omap-common: Common serial and usbethaddr functions based on die id
Now that we have a common prototype to grab the omap die id, functions to figure
out a serial number and usb ethernet address can use it directly.
Those also get an omap_die_id prefix for better consistency.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22 14:17:22 -04:00
Paul Kocialkowski
9fd5401659 omap5: omap_die_id support
This introduces omap5 support for omap_die_id, which matches the common
omap_die_id definition. It replaces board-specific code to grab the die id bits.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22 14:17:21 -04:00
Paul Kocialkowski
987a40d52e omap4: omap_die_id support
This introduces omap4 support for omap_die_id, which matches the common
omap_die_id definition. It replaces board-specific code to grab the die id bits.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22 14:17:20 -04:00
Paul Kocialkowski
b50a768528 omap3: omap_die_id support
This replaces the previous get_dieid definition with omap_die_id, that matches
the common omap_die_id definition.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22 14:17:18 -04:00
Paul Kocialkowski
72931b15e7 omap-common: Common omap_die_id definition
This introduces a common definition for omap_die_id, that aims at providing a
common interface for accessing omap platform's die id bits.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22 14:17:17 -04:00
Maxime Ripard
f7d6b3cc16 sunxi: board: Only try to use the MMC related functions if enabled
So far, even if CONFIG_MMC was not enabled the board code was trying to use
the MMC-related functions, resulting in linker errors.

Protect those calls by an ifdef.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-10-20 22:48:28 +02:00
Hans de Goede
6944aff1ca sunxi: power: Unify axp pmic function names
Stop prefixing the axp functions for setting voltages, etc. with the
model number, there ever is only one pmic driver built into u-boot,
this allows simplifying the callers.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-10-20 18:40:27 +02:00
Hans de Goede
6d0bdfdde5 sunxi: Switch to using malloc_simple for the spl
common/dlmalloc.c is quite big, both in .text and .data usage. E.g. for a
Mele_M9 sun6i board build this reduces .text from 0x4214 to 0x3b94 bytes,
and .data from 0x54c to 0x144 bytes.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-20 18:40:27 +02:00
Fabio Estevam
f861f51c46 ls102xa: Fix reset hang
Since commit 623d96e89aca6("imx: wdog: correct wcr register settings")
issuing a 'reset' command causes the system to hang.

Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.

This means that the watchdog on LS1021 has been working by accident as
it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c.
Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only
revelead the endianness problem on LS102x.

In order to fix the reset hang, introduce a reset_cpu() implementation that
is specific for ls102x, which accesses the watchdog WCR register in big-endian
format. All that is required to reset LS102x is to clear the SRS bit.

This approach is a temporary workaround to avoid a regression for LS102x
in the 2015.10 release. The proper fix is to make the watchdog driver
endian-aware, so that it can work for i.MX, Vybrid and LS102x.

Reported-by: Sinan Akman <sinan@writeme.com>
Tested-by: Sinan Akman <sinan@writeme.com>
Reviewed-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-12 12:56:32 -04:00
Ian Campbell
e392b923ed arndale: Apply Cortex-A15 errata #773022 and #774769
We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.

However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.

Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.

This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.

The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.

Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.

I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.

Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
2015-10-11 17:12:11 -04:00
Tom Rini
b8d242121d Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-10-02 09:38:44 -04:00