Commit graph

89098 commits

Author SHA1 Message Date
Laurent Pinchart
b0c000b661 arm64: dts: zynqmp: zcu106a: Describe DisplayPort connector
Add a device tree node to describe the DisplayPort connector, and
connect it to the DPSUB output.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fe037c93ed41bc5ca97887964037520d449ca98c.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
7469befcd5 arm64: xilinx: Remove address/size-cells from gem nodes
Some boards are using one mdio bus which holds multiple phys and also
boards are using mdio node for bus description. That's why there are cases
where address/size-cells are unnecessary which is also reported by make W=1
dtbs. That's why remove them from zynqmp.dtsi and let board DTSes to handle
it based on used description.

Error log:
/axi/ethernet@ff0e0000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/02f308c774d4f2a798a9a8c066824114a19841a7.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
5c214bac46 arm64: xilinx: Put ethernet phys to mdio node
All zynqmp boards have been already described via mdio node that's why also
convert the rest of the boards. With using mdio node there is an option to
add reset property for the whole mdio bus which is reflected by
's/phy-reset-gpios/reset-gpios/g' for some boards.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ff165281a70a38e2b76fee91e6255ce95ce8021b.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
2036621a61 arm64: zynqmp: Fix Siva's email address format
Some patches didn't have his full name and also there was one more ">" at
the end of email address. That's why correct both of these issues.

Fixes: 174d728471 ("arm64: zynqmp: Switch to amd.com emails")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e970cc0dfabe293c2baf6b231d34f3af0386f1eb.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
1b273a960a arm64: zynqmp: Describe bus-width for SD card on KV260
SD card is connected with 4 data lines which should be described properly.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/065cb9f1c6706eb4d70066e25cfc30d17b9f875d.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
1aa867094b arm64: xilinx: Use lower case for partition address
Lower case should be used for register address.
Issue is reported as:
flash@0: partitions: Unevaluated properties are not allowed
('partition@22A0000' was unexpected)

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/66b3361df883ecab4f36ce3b4196fb606c802598.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
0ece85e452 arm64: xilinx: Remove address/size-cells from flash node
Partitions are described via fixed-partitions that's why there is no need
to have address/size-cells in flash node.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c704be9d9f3d09c1cc55b092efeb9c73fcda6451.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Tanmay Shah
f4681b1e8c arm64: dts: xilinx: zynqmp: Add RPU subsystem device node
RPU subsystem can be configured in cluster-mode or split mode.
Also each r5 core has separate power domains.

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dde364939b4fbe3f7be7b6f5dff42e7d8b2f5c46.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
6b049190c9 arm64: zynqmp: Describe interrupts by using macros
Use arm-gic.h and irq.h for interrupt description. It helps to improve
readability of device tree file.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e0db567e1eb4e4e90e59270f41708919682dacf4.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
0a965b10e2 arm64: zynqmp: Remove resetin/out from K24 psu_init
The code is not called that's why remove it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7b207e90f68028ab36fcc22df4127492f174793d.1695046281.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
ec38d95f75 arm64: zynqmp: Rename dt overlay file names from dts to dtso
Use dtso suffix instead of dts. Build option was introduced by
commit a0f9a77912 ("kbuild: Allow DTB overlays to built from .dtso named
source files").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1dce37e72428c14a3ccbb5dc674b90dfe56b75ac.1695046155.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Michal Simek
2e495fb537 arm64: zynqmp: Describe assigned-clocks for uarts
Describe assigned-clocks for both uarts. SOM is using this functionality.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bddbb81209a4567b0939c5d2d0ecb42fdfcd71ea.1695036114.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Venkatesh Yadav Abbarapu
9898d1056d pinctrl: zynqmp: Display the tristate configuration for all pins
Read the tristate config for all the pins and display it.

ZynqMP> pinmux status MIO1
MIO1: slew:fast	bias:enabled pull:up input:cmos	drive:12mA
      volt:1.8	tri_state:enabled

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230914100620.26346-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-10-09 10:25:32 +02:00
Venkatesh Yadav Abbarapu
d053583064 pinctrl: Increase size of pinmux status buffer
For Xilinx ZynqMP SOC new parameter was added and now it can
set 7 parameters for its pins. Pinmux status command will
print the status of these parameters for each pin. But
current print buffer length is only 80 characters long, increase it
to 90 to print all the parameters without truncation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230920030006.6488-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-10-09 10:25:32 +02:00
Venkatesh Yadav Abbarapu
ecba4380ad net: zynq_gem: Update the MDC clock divisor in the probe function
MDC clock change needs to be done when the driver probe function
is called as mdio is enabled at probe and not when the ethernet starts.
Setup the MDC clock at the probe itself.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230922045010.22852-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-10-09 10:25:32 +02:00
Tom Rini
83aa0ed1e9 Merge branch '2023-10-06-spl-prepare-for-universal-payload'
To quote the author:
This series tidies up SPL a little and adds some core ofnode functions
needed to support Universal Payload. It also includes a few minor
fix-ups for sandbox.

For SPL the changes include CONFIG naming, removing various #ifdefs and
tidying up the FIT code.

One notable piece of the ofnode improvements is support for flattening a
livetree. This should be useful in future as we move FDT fixups to use
the ofnode API.
2023-10-06 17:23:47 -04:00
Simon Glass
f69d3d6d10 pci: serial: Support reading PCI-register size with base
The PCI helpers read only the base address for a PCI region. In some cases
the size is needed as well, e.g. to pass along to a driver which needs to
know the size of its register area.

Update the functions to allow the size to be returned. For serial, record
the information and provided it with the serial_info() call.

A limitation still exists in that the size is not available when OF_LIVE
is enabled, so take account of that in the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
61fc132051 dm: core: Tweak device_is_on_pci_bus() for code size
This function cannot return true if PCI is not enabled, since no PCI
devices will have been bound. Add a check for this to reduce code size
where it is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
7f5ff034c3 serial: Drop ns16550 serial_getinfo() in SPL
This is typically not needed in SPL/TPL and increases the code size.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
9031ba8242 spl: Add C-based runtime detection of SPL
The spl_phase() function indicates whether U-Boot is in SPL and before
or after relocation. But sometimes it is useful to check for SPL with
zero code-size impact. Since spl_phase() checks the global_data flags,
it does add a few bytes.

Add a new spl_in_proper() function to check if U-Boot proper is
running, regardless of the relocation status.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
be5951461c command: Include a required header in command.h
This uses ARRAY_SIZE() but does not include the header file which declares
it. Fix this, so that command.h can be included without common.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-10-06 14:38:13 -04:00
Simon Glass
14d9f63dcf bloblist: Add missing name
Add a missing bloblist name.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
3d6531803e bloblist: Support initing from multiple places
Typically the bloblist is set up after the devicetree is present. This
makes sense because bloblist may use malloc() to allocate the space it
needs.

However sometimes the devicetree itself may be present in the bloblist.
In that case it is at a known location in memory so we can init the
bloblist very early, before devicetree.

Add a flag to indicate whether the bloblist has been inited. Add a
function to init it only if needed. Use that in the init sequence.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
ff6c708b99 sandbox: Move the bloblist down a little in memory
Move this down by 4KB so that it is large enough to hold the devicetree.

Also fix up the devicetree address in the documetation while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
97192937bf sandbox: Only read the state if we have a state file
We should not read this unless requested. Make it conditional on the
option being provided.

Add some debugging to show the state being written.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
a64fec9f17 sandbox: Init the EC properly even if no state file is available
This currently relies on sandbox attempting to read a state file. At
present it always does, even when there is no state file, in which case it
fails, but still inits the EC.

That is a bug, so update this driver to set the current image always, even
if no state is read.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
d02c6f57ab sandbox: Move reading the RAM buffer into a better place
This should not happen in the argument-parsing function. Move it to the
main program.

Add some debugging for reading/writing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
5fe8bc3cf2 dm: core: Add tests for oftree_path()
Add a few simple tests for getting the root node, since this is handled
as a special case in the implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
7071c82bdc dm: core: Support writing a 64-bit value
Add support for writing a single 64-bit value into a property.

Repurpose the existing tests to handle this case too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
d9216c8683 dm: core: Support writing a boolean
Add functions to write a boolean property. This involves deleting it if
the value is false.

Add a new ofnode_has_property() as well. Add a comment about the behaviour
of of_read_property() when the property value is empty.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
62b1db3377 dm: core: Add a way to convert a devicetree to a dtb
Add a way to flatten a devicetree into binary form. For livetree this
involves generating the devicetree using fdt_property() and other calls.
For flattree it simply involves providing the buffer containing the tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
67fb2159fb dm: core: Add a way to delete a node
Add a function to delete a node in an existing tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
c15862ffdd dm: core: Add a way to copy a node
Add a function to copy a node to another place under a new name. This is
useful at least for testing, since copying a test node with existing
properties is easier than writing the code to generate it all afresh.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
e0c3c21d8b dm: core: Add a function to create an empty tree
Provide a function to create a new, empty tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
9bf78a5add dm: core: Tidy up comments in the ofnode tests
Add comments to the functions where the test name does not indicate what
is being tested. Rename functions in a few cases, so that a search for the
function will also file its test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
3a1fc17a01 dm: core: Ensure we run flattree tests on ofnode
We need the UT_TESTF_SCAN_FDT flag set for these tests to run with flat
tree. In some cases it is missing, so add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
247970978d dm: core: Reverse the argument order in ofnode_copy_props()
Follow the order used by memcpy() as it may be less confusing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
a17e1e76c8 spl: Move bloblist writing until the image is known
The bloblist should not be finalised until the image is fully set up.
This allows any final handoff information to be included in the bloblist.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
2354daaf39 spl: Use the correct FIT_..._PROP constants
Rather than open-coding the property names, use the existing constants
provided for this purpose. This better aligns the simple-FIT code with
the full FIT implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
035ab46e39 spl: Move the full FIT code to spl_fit.c
For some reason this code was put in the main spl.c file. Move it out
to the FIT implementation where it belongs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
d7c232e6b5 spl: Rename spl_load_fit_image() to load_simple_fit()
We have two functions called spl_load_fit_image(), one in spl.c and one in
spl_fit.c

Rename the second one, to indicate that it relates to simple FIT parsing,
rather than the full version.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
17ba50106e spl: Remove #ifdefs with BOOTSTAGE
This feature has some helpers in its header file so that its functions
resolve to nothing when the feature is disabled. Add a few more and use
these to simplify the code.

With this there are no more #ifdefs in board_init_r()

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
2003a83cc8 spl: Avoid an #ifdef when printing gd->malloc_ptr
Use an accessor in the header file to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
7907a7b99a dm: core: Correct help in TPL_DM and VPL_DM
There are copying errors in the help. Fix these.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
5bcacd1ad5 doc: Clean up SYS_MALLOC_SIMPLE
Move the useful help to Kconfig.

Drop mention of CONFIG_SYS_MALLOC_SIMPLE since it doesn't exist.

Correct a 'CONFIGSYS_MALLOC_F_LEN' typo

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
34bacebd0a Tidy up uses of CONFIG_SYS_MALLOC_F_LEN
Use CONFIG_SYS_MALLOC_F instead to of CONFIG_SYS_MALLOC_F_LEN to
determine whether pre-relocation malloc() is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
3d6d507514 spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN
Use the new SPL/TPL/VPL_SYS_MALLOC_F symbols to determine whether the
malloc pool exists.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-10-06 14:38:12 -04:00
Simon Glass
a572041807 tpl: Enable CONFIG_TPL_SYS_MALLOC_F where needed
Enable CONFIG_TPL_SYS_MALLOC_F for boards which have a non-zero value
for CONFIG_TPL_SYS_MALLOC_F_LEN

Note that the default is yes in most cases, so no changes are needed to
board defconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
7431b0ad54 spl: Enable CONFIG_SPL_SYS_MALLOC_F where needed
Enable CONFIG_SPL_SYS_MALLOC_F for boards which have a non-zero value
for CONFIG_SPL_SYS_MALLOC_F_LEN

Note that the default is yes in most cases, so no changes are needed to
board defconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
fd8497dae5 spl: Create proper symbols for enabling the malloc() pool
For U-Boot proper we have CONFIG_SYS_MALLOC_F which indicates that a
malloc() pool is available before relocation.

For SPL we only have CONFIG_SPL_SYS_MALLOC_F_LEN which indicates the
size of the pool.

In various places we use CONFIG_SPL_SYS_MALLOC_F_LEN == 0 to indicate
that there is no pool.

This differing approach is confusing. Add a new CONFIG_SPL_SYS_MALLOC_F
symbol for SPL (and similarly for TPL and VPL). Tidy up the Kconfig
help for clarity.

For now these symbols are not used. That is cleaned up in the following
patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00