AES encryption in CBC mode, in most cases, must be used with random
initialization vector. Using the same key and initialization vector several
times is weak and must be avoided.
Added iv parameter to the aes_cbc_encrypt_blocks and aes_cbc_decrypt_blocks
functions for passing initialization vector.
Command 'aes' now also require the initialization vector parameter.
Signed-off-by: Andrey Mozzhuhin <amozzhuhin@yandex.ru>
Since 'commit af2f44267 ("fdc spl: use different BOARD_INIT MACRO for spl and tpl")'
board stm32f746-disco can't boot.
The macro CONFIG_IS_ENABLED() can't evaluate the value of
CONFIG_SPL_BOARD_INIT as it was defined in include/configs/stm32f746-disco.h
without attributed value.
Moving CONFIG_SPL_BOARD_INIT from stm32f746-disco.h to mach-stm32/Kconfig
fixes this issue.
Fixes: af2f44267 ("fdc spl: use different BOARD_INIT MACRO for spl and tpl")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Commit 608b0c4ad4 ("serial: Use next serial device if probing fails")
added code to search for more serial devices if the default one was not
probed correctly.
Unfortunately, that breaks omap3_evm. So while investigating why that is
the case, let's disable the full search for everyone but bcm283x where it
is needed.
Fixes: 608b0c4ad4 ("serial: Use next serial device if probing fails")
Reported-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
The serial drivers now depend on the pinctrl driver to determine whether
they are enabled. That means if a serial device wants to be used pre-reloc,
we also need the pinctrl device pre-reloc.
Adapt the pinctrl driver as well as dts overlay accordingly.
Signed-off-by: Alexander Graf <agraf@suse.de>
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.
This round goes to pl01x.
Signed-off-by: Alexander Graf <agraf@suse.de>
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.
This round goes to pl011.
Signed-off-by: Alexander Graf <agraf@suse.de>
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.
This round goes to pl010.
Signed-off-by: Alexander Graf <agraf@suse.de>
With driver model enabled in SPL, sdram_init() requires device tree
and malloc to be initialized.
Therefore call spl_early_init() in early_system_init().
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.
This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.
That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.
Signed-off-by: Alexander Graf <agraf@suse.de>
CONFIG_WALNUT was dropped in June 2017 in:
commit 98f705c9ce ("powerpc: remove 4xx support")
While at it, the related CONFIG_MACH_SPECIFIC and the have_of
and _machine variables are unused as well, so drop them too.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Rockchip Rockusb driver already merged. So we enable rockusb
support on rk3036 based device.
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The backlight pwm-cell is 3.
This remove the warning in buildman:
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Property 'pwms', cell 3 is not a phandle reference in /backlight
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Missing property '#pwm-cells' in node /sram@10080400 or bad phandle (referred from /backlight:pwms[3])
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Implement the setting parent for gmac clock, and add internal
pll div set for mac clk.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The LCDC assigned rate is 0, it will make boot error,
error log:"pll_para_config: the frequency can not be
0 Hz". Remove them, and the lcdc driver will do the
correct clock rate setting.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Clean the iomux definitions at grf_rk322x.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.
After that, define the uart2 iomux at rk322x-board file.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add basic dts configuration for rk3328 gmac2io.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2
and bit10 at com iomux register. After that, set rgmii m1 tx
pins to 12ma drive-strength, and clean others to 2ma.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Clean the iomux definitions at grf_rk3328.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the
conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h,
and move them into pinctrl-driver.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The last 4 grf registers offset of rv1108 are wrong, fix them
for correct usage.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Give the mac controller the correct tx-delay and rx-delay value
for the rgmii mode transmission. If they are not matched, there
would be Ethernet packets lost, the net feature may not work.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Move SYSCFG clock setup into configure_clocks() instead of calling
clock_setup() from board file.
As this clock is only needed in case of ethernet enabled and as
both stm32f4 and stm32f7 are using the Designware ethernet IP,
we use CONFIG_ETH_DESIGNWARE to only enable this clock if needed.
Move the RMII setup from board_early_init_f() to board_init()
to insure that RMII bit is set only when clock driver is initialized.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Thanks to 'commit ba1f966725 ("net: designware: add clock support")'
we don't need anymore to setup the STMMAC clock in board.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
This DT file comes from kernel v4.15, this board offers :
_ STM32F429NIH6 microcontroller
_ 4.3” color TFT LCD with resistive touchscreen (480 x 272 pixels)
_ Six 5 V power supply options:
Power jack
ST-LINK/V2 USB connector
User USB HS connector
User USB FS1 connector
User USB FS2 connector
Daughterboard
_ SAI Audio DAC, stereo audio jack which supports headset with
microphone
_ Stereo digital microphone, audio terminal connector used to connect
external speakers
_ 2 GBytes (or more) SDIO interface MicroSD card
_ RF EEPROM on I2 C compatible serial interface
_ RS-232 communication
_ IrDA transceiver
_ JTAG/SWD and ETM trace debug support, ST-LINK/V2 embedded
_ IEEE-802.3-2002 compliant Ethernet connector
_ Camera module
_ 8M x 32-bit SDRAM, 1M x 16-bit SRAM and 8M x 16-bit NOR Flash
_ Joystick with 4-directional control and selector
_ Reset, Wakeup and Tamper buttons
_ 4 color user LEDs
_ Extension connectors & memory connectors for daughterboard or
wrapping board
_ USB OTG HS and FS with Micro-AB connectors
_ RTC with backup battery
_ CAN2.0A/B compliant connection
_ Potentiometer
_ Motor control connector
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
In order to retrieve the clk_hse fixed clock phandle in clk_stm32f driver,
add "u-boot,dm-pre-reloc" property in Uboot specific DT file.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
compiling U-Boot with bosch_mpcxxxxd_sd_defconfig
drops warning:
arch/arm/lib/bootm-fdt.c: In function ‘arch_fixup_fdt’:
arch/arm/lib/bootm-fdt.c:37:6: warning: unused variable ‘ret’ [-Wunused-variable]
int ret = 0;
^~~
Fix it.
Signed-off-by: Heiko Schocher <hs@denx.de>
When in early SPL we make some secure ROM calls that can effect
DRAM, due to this it is more stable to store the args for these
calls in SRAM, but uninitialized and zero'd globals are placed
in BSS, located in DRAM. Force our args into the data section
which is in SRAM during SPL.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Rename the Kconfig option, structures (and their members), as well as
functions of the mpc85xx driver to include mpc8xxx to reflect the more
generic usage.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Add U-Boot DT extras for each SoC and board. This marks the required
nodes with u-boot,dm-pre-reloc to start clock and PRR early on while
avoiding modification of the DTs imported from Linux.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The Stout board is not supported in Linux, so add a rudimentary DTS
for H2 Stout as a placeholder for when a proper DTS is available.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: The Stout is already being shipped over, so proper DTS for both
U-Boot and Linux will happen once it's delivered :-)
Import the Renesas R8A7794 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7793 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7792 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7791 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Import the Renesas R8A7790 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Now that we have and use wait_for_bit_le32() available, the callers of
cm_write_with_phase() should not be casting values to u32 and instead we
expect a const void *, so provide that directly.
Fixes: 48263504c8 ("wait_bit: use wait_for_bit_le32 and remove wait_for_bit")
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
fdt overlay support is useful for all sunxi boards, enable per default
and remove it from sunxi defconfigs.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
