Commit graph

7 commits

Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Dirk Behme
80c40b765b ARM: Davinci: Fix DM644x timer overflow handling and cleanup
Fix ARM based DaVinci DM644x timer overflow handling and cleanup timer code.

Changes:

- Remove *_masked() functions as noted by Wolfgang

- Adapt register naming to recent TI spec (sprue26, March 2007)

- Fix reset_timer() handling

- As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this.

[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179

- Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV).

Many thanks to Troy Kisky <troy.kisky@boundarydevices.com> and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for the hints & testing!

Patch is compile tested with davinci_dvevm & sonata & schmoogie configuration and tested by Pieter on DaVinci EVM hardware.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
2008-04-22 23:12:01 +02:00
Wolfgang Denk
950a392464 Revert merge of git://www.denx.de/git/u-boot-arm, commit 62479b18:
Reverting became necessary after it turned out that the patches in
the u-boot-arm repo were modified, and in some cases corrupted.

This reverts the following commits:

	066bebd635
	7a837b7310
	c88ae20580
	a147e56f03
	d6674e0e2a
	8c8463cce4
	c98b47ad24
	8bf69d8178
	8c16cb0d3b
	a574a73852
	1377b5583a
	1704dc2091

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-11 15:11:26 +02:00
Dirk Behme
1704dc2091 - Remove *_masked() functions as noted by Wolfgang
- Adapt register naming to recent TI spec (sprue26, March 2007)
- Fix reset_timer() handling
- As reported by Pieter [1] the overflow fix introduced a
delay of factor 16 (e.g 2 seconds became 32). While the
overflow fix is basically okay, it missed to divide udelay by
16, too. Fix this.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
- Remove software division of timer count value (DIV(x)
macro) and do it in hardware (TIM_CLK_DIV).
Many thanks to Troy Kisky <troy.kisky@boundarydevices.com>
and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for
the hints & testing!

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>

Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
2008-03-30 11:09:01 +01:00
Wolfgang Denk
b29661fc11 Coding style cleanup. Prepare v1.3.2-rc2 release candidate
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-02-24 15:21:36 +01:00
Peter Pearse
ea686f52e4 Fix timer overflow in DaVinci
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
2008-02-14 09:37:42 +00:00
Sergey Kubushyn
c74b2108e3 [ARM] TI DaVinci support, hopefully final
Add support for the following DaVinci boards:
- DV_EVM
- SCHMOOGIE
- SONATA

Changes:

- Split into separate board directories
- Removed changes to MTD_DEBUG (or whatever it's called)
- New CONFIG_CMD party line followed
- Some cosmetic fixes, cleanup etc.
- Patches against the latest U-Boot tree as of now.
- Fixed CONFIG_CMD_NET in net files.
- Fixed CONFIG_CMD_EEPROM for schmoogie.
- Made sure it compiles and works (forceenv() link problem) on SCHMOOGIE and
   DV_EVM. Can't check if it works on SONATA, don't have a board any more,
   but it at least compiles.

Here is an excerpt from session log on SCHMOOGIE...

U-Boot 1.2.0-g6c33c785-dirty (Aug  7 2007 - 13:07:17)

DRAM:  128 MB
NAND:  128 MiB
In:    serial
Out:   serial
Err:   serial
ARM Clock : 297MHz
DDR Clock : 162MHz
ETH PHY   : DP83848 @ 0x01
U-Boot > iprobe
Valid chip addresses: 1B 38 3A 3D 3F 50 5D 6F
U-Boot > ping 192.168.253.10
host 192.168.253.10 is alive
U-Boot >

Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
Acked-by: Stefan Roese <sr@denx.de>
2007-08-10 20:26:18 +02:00