Commit graph

67993 commits

Author SHA1 Message Date
Wasim Khan
c63edbc750 board: freescale: emc2305: Pass chip_addr to set_fan_speed
emc2305 is a common driver. It should not use platform specific
i2c address for slave device.
Pass chip_addr as agrument to emc2305_init() and set_fan_speed()
so that emc2305 driver can be used with different platforms.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Martin Kaistra
ada19fd2d2 board/freescale/lsch3: Correct entry for 0.9v
According to the reference manual of LS2088A, for a VDD voltage of
0.9V, the entry should be at 01000b.

Fixes: 4911948ec7 ("board/freescale,lsch3: Add entry for 0.9v")
Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Hou Zhiqiang
af288cb291 arm64: Layerscape: Survive LPI one-way reset workaround
The workaround of LPI one-way reset issue is broken by the series:
https://patchwork.ozlabs.org/project/uboot/list/?series=192398

This patch is to add DT node for GIC RD tables and create corresponding
reserved-memory node in kernel DT to fix it.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Ran Wang
223c19076f fsl-layerscape: enable dwc3 snooping feature
Configure DWC3’s cache type to ‘cacheable’ for better
performance. Actually related register definition and values are SoC
specific, which means this setting is only applicable to Layerscape SoC,
not generic for all platforms which have integrated DWC3 IP.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 20:57:32 +05:30
Tom Rini
1da91d9bcd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Enable NET_RANDOM_ETHADDR on Espressobin (Acked-by Kosta)
- Espressobin & Clearfog: fdtfile enhancements
- A37xx PCI: Disable link training when unloading driver
- A37xx: increase CONFIG_SYS_BOOTM_LEN to 64MB
- Add Macronix mx25u12835f support, used on uDPU and ESPRESSObin v7
- dns325: Correct CONFIG_NR_DRAM_BANKS parameter
2020-09-24 08:34:54 -04:00
Pali Rohár
5f50b88ab6 arm64: a37xx: pci: Disable link training when unloading driver
As required by PCI Express spec a delay for at least 100ms after
de-asserting PERST# signal is needed before link training is enabled.

Linux kernels prior to 5.8 version do not automatically disable link
training before de-asserting PERST# signal, therefore this requirement is
not fulfilled.

Above requirement is needed for proper detection of some Compex PCIe WiFi
cards. Otherwise Linux kernel cannot detect it.

To allow using those PCIe cards with older Linux kernel versions booted by
U-Boot compiled with U-Boot a37xx pci driver, disable link training in
U-Boot when unloading this pci driver.

Thanks to DM_FLAG_OS_PREPARE flag, U-Boot automatically unload this driver
when booting Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-24 10:14:06 +02:00
Tom Rini
e7e650e8bd arm: kirkwood: dns325: Correct CONFIG_NR_DRAM_BANKS parameter
Testing on a DNS-325 NAS has shown that in order for the device to work
we need to set CONFIG_NR_DRAM_BANKS to 1 and not 2.

Tested-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com>
Reported-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-24 10:13:59 +02:00
Andre Heider
68e32e3443 arm: mvebu: Espressobin: Set environment variable fdtfile
Required for the generic distro mechanism.

Linux ships with 4 variants:
marvell/armada-3720-espressobin-v7-emmc.dtb
marvell/armada-3720-espressobin-v7.dtb
marvell/armada-3720-espressobin-emmc.dtb
marvell/armada-3720-espressobin.dtb

Use available information to determine the appropriate filename.

Fixes booting GRUB EFI arm64 on Fedora.

Reported-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:42 +02:00
Baruch Siach
5a3f5e61ca arm: mvebu: clearfog: don't override set fdtfile env
Only set the fdtfile environment variable when not already set.

Fixes: 867572f09e ("ARM: mvebu: clearfog: run-time selection of DT file")
Cc: Joel Johnson <mrjoel@lixil.net>
Reported-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:39 +02:00
Andre Heider
073ccfab5f arm: mvebu: defconfig: espressobin: enable NET_RANDOM_ETHADDR
The hardware does not provide a MAC address. Enable this so that
network access works with just the default environment.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Konstantin Porotchkin <kostap@marvell.com>
2020-09-24 10:13:34 +02:00
Vladimir Vid
6728da5ce9 arm64: a37xx: increase CONFIG_SYS_BOOTM_LEN to 64MB
Increase max gunzip size, required for booting itb recovery images on
uDPU.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:22 +02:00
Vladimir Vid
2781c71873 mtd: spi-nor-ids: add support for Macronix mx25u12835f flash
Some of Marvell A3700 boards use mx25u12835f, specifically uDPU
and ESPRESSObin v7.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt commit message to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:22 +02:00
Michael Walle
b7585aa9b1 pci: layerscape: Fix spurious writes and panic
The fdt_fixup_pcie_ls() scans all PCI devices and assumes that all PCI
root devices are layerscape PCIe controllers. Unfortunately, this is not
true for the LS1028A. There is one additional static PCI root complex
(this contains the networking devices) which has nothing to do with the
layerscape PCIe controllers. On recent U-Boot versions this results in
the following panic:

"Synchronous Abort" handler, esr 0x96000044
elr: 000000009602fa04 lr : 000000009602f9f4 (reloc)
elr: 00000000fbd73a04 lr : 00000000fbd739f4
x0 : 0080000002000101 x1 : 0000000000000000
x2 : 00000000fbde9000 x3 : 0000000000000001
x4 : 0000000000000000 x5 : 0000000000000030
x6 : 00000000fbdbd460 x7 : 00000000fbb3d3a0
x8 : 0000000000000002 x9 : 000000000000000c
x10: 00000000ffffffe8 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000a2c
x14: 00000000fbb3d2cc x15: 00000000ffffffff
x16: 0000000000010000 x17: 0000000000000000
x18: 00000000fbb3fda0 x19: 0000000000000800
x20: 0000000000000000 x21: 00000001f0000000
x22: 0000000000000800 x23: 0000000000000009
x24: 00000000fbdc3c1b x25: 00000000fbdc28e5
x26: 00000000fbdcc008 x27: 00000000fbdc16e2
x28: 000000000f000000 x29: 00000000fbb3d3a0

Code: 394072a1 f94006a0 34000041 5ac00a94 (b8336814)
Resetting CPU ...

This bug already existed in former versions, but the spurious write was
never trapped, because the destination address was a valid address (by
pure luck).

Make sure the PCI root is actually one of the expected PCIe layerscape
controllers by matching its compatible string.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23 19:33:44 +05:30
Kuldeep Singh
7679afbfe3 configs: ls1012a/ls1046a: Add CONFIG_ENV_OVERWRITE in defconfig
CONFIG_ENV_OVERWRITE disables write protection on various environment
variables like "ethaddr" and "serial".

Enable this config in LS1046A and LS1012A defconfigs. This resolves an
error while setting multiple values of "ethaddr" variable.

Before the change:
=> setenv ethaddr 00:E0:0C:00:06:0
=> setenv ethaddr 00:E0:0C:00:06:1
Error: Can't overwrite "ethaddr"
Error inserting "ethaddr" variable, errno=1

After the change:
=> setenv ethaddr 00:E0:0C:00:06:0
=> setenv ethaddr 00:E0:0C:00:06:1

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23 19:33:44 +05:30
Mian Yousaf Kaukab
120e92d969 ls1028a: use default scan_dev_for_boot
scan_dev_for_efi is supposed to be called from scan_dev_for_boot.
However this call is missing for ls1028ardb and ls1028aqds boards. As
a result EFI boot doesn’t work. Fix this issue by removing custom
definition of scan_dev_for_boot and use the default definition
instead.

Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: andy.tang@nxp.com
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23 19:33:43 +05:30
Tom Rini
55004fa433 - mips: vocore2: fix SPL image generation
- mips: vocore2: fix LZMA decompression errors
 - mips: vocore2: fix console output
 - mips: pic32mzda: fix DTC warnings and GPIO nodes
 - mips: pic32mzda: make GPIO and MMC working again
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Merge tag 'mips-fixes-for-2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips

- mips: vocore2: fix SPL image generation
- mips: vocore2: fix LZMA decompression errors
- mips: vocore2: fix console output
- mips: pic32mzda: fix DTC warnings and GPIO nodes
- mips: pic32mzda: make GPIO and MMC working again
2020-09-22 22:08:16 -04:00
Mauro Condarelli
7d1538cc9b mips: vocore2: fix various issues
- fix SPL image generation
- fix incorrect console output
- increase malloc_f and malloc_r space to fix LZMA decompression errors
- increase SPI flash clock

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
[squashed to one patch, fix commit subject and description]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-09-23 00:14:56 +02:00
John Robertson
bd25f9a69f mips: dts: Fix PIC32MZDA GPIO register definitions
The GPIO bank name for banks J and K are not correct when using the
'gpio' command from the console.

The driver derives the bank name from the device tree instance string by
using the instance value and adding 'A': gpio0@xxaddrxx is Bank A,
gpio1@yyaddryy is Bank B and so on.

On the PIC32, there is no Bank I so instances 8 and 9 need to be
incremented as a minimum change.

An alternative (less opaque) implementation would be to use a bank-name
property instead but this would require modifying the driver code too.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:29 +02:00
John Robertson
81b543a4e6 mips: dts: Fix PIC32MZDA GPIO register definitions
GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or
using the 'gpio' command from the console.

The root cause is a discrepancy between the driver and the device tree:
the driver code expects an absolute I/O address in the <reg> property,
while the device tree defines the address relative to a declaration in
the parent pinctrl node.

Changing the device tree to fix a driver issue would normally be wrong,
however:
- I have run the first version of U-Boot in which this driver appears
  (v2016.03) and the same problem exists, so this is not a regression;
- There is no code that references a parent device tree node that might
  suggest the intent of the author was to parse the DT as it exists now;
- The equivalent Linux PIC32 GPIO driver also uses absolute addresses
  for the GPIO <reg> property. This change brings the U-Boot DT more
  into line with Linux.

Additionally, the data sheet (Microchip ref. 60001361H) shows that the
register set to control a GPIO bank spans 0xE0 bytes, but the device
tree specified size is only 0x48 bytes.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
0723c2ddeb mips: dts: Fix device tree warnings for PIC32MZDA
Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:28 +02:00
John Robertson
95e7141294 mips: pic32mzdask: enable CONFIG_BLK
CONFIG_BLK needs to be enabled by default to allow U-Boot to
compile after a 'make pic32mzdask_defconfig'.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:21 +02:00
John Robertson
69af033fb9 mips: pic32mzdask: disable SDHCI SDCD signal workaround
The PIC32MZ DA Starter Kit does not need the card detect workaround
because the SDCD signal line is connected properly. Disable the
workaround in this case.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:14:14 +02:00
John Robertson
10d65bf00b pinmux: pic32: add SDHCI pin config
The GPIO pins used by the SDHCI controller need to be configured to
allow the interface to work.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:08:52 +02:00
John Robertson
6978db36aa mmc: pic32: Refresh PIC32 MMC driver
The existing driver is not compatible with the Driver Model.

This patch makes the necessary changes while also removing obsolescent
calls/properties as follows:

- fdtdec_* calls replaced with dev_read_* equivalents;
- 'clock-freq-min-max' property replaced by querying the frequency of
  the source clock 'base_clk';
- The card detect erratum workaround is applied during probe rather than
  overriding get_cd.

The card detect workaround (Microchip ref. DS80000736E, erratum #15) is
not always needed and can be disabled using a vendor specific DT
property.

Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23 00:08:52 +02:00
Tom Rini
5949f36f08 Merge branch '2020-09-22-assorted-bugfixes'
- Fix for environment location on some PowerPC boards
- Typo / documentation fix
- Two fixes for mpc8xxx
2020-09-22 16:47:48 -04:00
Chris Packham
dc8368b7ee configs: powerpc: Don't set CONFIG_ENV_ADDR for QorIQ SPIFLASH
Setting CONFIG_ENV_ADDR to something other than 0 stops gd->env_addr
from being allocated dynamically. When the environment is in SPI we need
it to be allocated as we can't use a direct memory mapped address.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2020-09-22 11:26:19 -04:00
Heinrich Schuchardt
643b5e7ea3 disk: typo Terra Bytes
512 * 2^32 bytes equals 2 tebibytes.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-22 11:26:19 -04:00
Heinrich Schuchardt
4061191727 doc/build/gcc.rst: add missing apt-get *install*
The install command is missing for an apt-get command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-22 11:05:32 -04:00
Rasmus Villemoes
24e8c0e3b3 gpio/mpc83xx_spisel_boot.c: include log.h
Fix build failure, it used to get this implicitly through common.h
until f7ae49fc4f (common: Drop log.h from common header).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-09-22 11:05:32 -04:00
Rasmus Villemoes
10a6aa963c spi: mpc8xxx_spi.c: fix cs activate/deactivate
Somewhere between v2020.04 and v2020.07 the mpc8xxx_spi driver broke,
I'm guessing due to this hunk

@@ -559,6 +560,8 @@ int dm_gpio_set_dir_flags(struct gpio_desc *desc, ulong flags)
        if (ret)
                return ret;

+       /* combine the requested flags (for IN/OUT) and the descriptor flags */
+       flags |= desc->flags;
        ret = _dm_gpio_set_dir_flags(desc, flags);

from commit 695e5fd546 ("gpio: update dir_flags management"). But
the blame is mostly on the driver itself which seems rather confused:
The chip select gpios are requested with GPIOD_ACTIVE_LOW, but then in
each activate/deactivate, dm_gpio_set_dir_flags() is called with
merely GPIOD_IS_OUT, and then the driver call set_value(0) for
activate.

That used to work, but with the above hunk, the ACTIVE_LOW setting
from the request becomes persistent, so the gpio driver ends up being
asked to set the value to 1 in mpc8xxx_spi_cs_activate().

So drop the dm_gpio_set_dir_flags() calls in the activate/deactivate
functions, and use a value of 1 to mean "logically enabled".

Ideally, I think we should also drop the GPIOD_ACTIVE_LOW from the
request and make it up to the list of gpio cs in DT to indicate
whether that CS is enabled when driven low (as is of course usually
the case), but that requires changing
arch/powerpc/dts/gdsys/gazerbeam-base.dtsi among others, and I don't
have that hardware to test on. I have, however, tested our
own (mpc8309-based) hardware with this change, and I have also tested
that removing the GPIOD_ACTIVE_LOW from the request and updating our
DT as

-                       gpios = <&spisel 0 0>;
+                       gpios = <&spisel 0 GPIO_ACTIVE_LOW>;

still works.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-09-22 11:05:32 -04:00
Tom Rini
ba2a0cbb05 Prepare v2020.10-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-21 13:45:23 -04:00
Tom Rini
d6b241bcd7 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-21 13:45:07 -04:00
Tom Rini
10431c4eaa Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Several ACPI bug fixes
- Intel edison: Move config SYS_MALLOC_LEN to Kconfig
- Use "emmc" in ApolloLake FSP devicetree bindings
2020-09-21 11:01:07 -04:00
Wolfgang Wallner
40edea3a07 x86: acpi: Add memset to initialize SPCR table
Add a missing memset to acpi_create_spcr().

The other acpi_create_xxxx() functions perform a memset on their
structures, acpi_create_spcr() does not and as a result the contents of
this table are partly uninitialized (and thus random after every reset).

Fixes: b288cd9600 ("x86: acpi: Generate SPCR table")
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix the tags format in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:36 +08:00
Wolfgang Wallner
3f6966ab2b x86: acpi: Fix calculation of DSDT length
Currently, the calculation for the length of the DSDT table includes any
bytes that are added for alignment, but those bytes are not initialized.

This is because the DSDT length is calculated after a call to
acpi_inc_align(). Split this up into the following sequence:

  * acpi_inc()
  * Calculate DSDT length
  * acpi_align()

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Wolfgang Wallner
674c58c7b7 x86: fsp: Replace e-mmc with emmc in devicetree bindings
The term eMMC is used inconsistently within the FSP devicetree
bindings (e-mmc and emmc), especially for "emmc-host-max-speed"
documentation and code disagree.

Change all eMMC instances within the FSP bindings to consistently
use "emmc". The term "emmc" is already used a lot within U-Boot,
while "e-mmc" is only used in the FSP bindings.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Andy Shevchenko
4364a3f852 cmd: acpi: Print revisions in hex format
The revisions are usually dates in hex-decimal format representing
YYYYmmdd. Print them in hex to see this clearly.

Before:
  ...
  FACP 000e5420 0000f4 (v06 U-BOOT U-BOOTBL 538970376 INTL 0)
  DSDT 000e4780 000ba0 (v02 U-BOOT U-BOOTBL 65536 INTL 538968870)
  ...
After:
  ...
  FACP 000e5420 0000f4 (v06 U-BOOT U-BOOTBL 20200908 INTL 0)
  DSDT 000e4780 000ba0 (v02 U-BOOT U-BOOTBL 10000 INTL 20200326)
  ...

Fixes: 0b885bcfd9 ("acpi: Add an acpi command")
Cc: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Andy Shevchenko
5a53441a91 x86: edison: Move config SYS_MALLOC_LEN to Kconfig
This patch moves the the config SYS_MALLOC_LEN to Kconfig
as it is already done for zynq arch in commit 01aa5b8f05
("Kconfig: Move config SYS_MALLOC_LEN to Kconfig for zynq").

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 09:47:24 +08:00
Tom Rini
400f84c5ba Pull request for UEFI sub-system for efi-2020-10-rc5 (2)
The following bugs are fixed:
 
 * incorrect online help for setenv and env
 * description of function efi_mem_carve_out()
 * replace printf() by log_err() in stm32mp1_rng driver
 
 A unit test is provided to check that the boot hart id is provided in the
 RISC-V device-tree.
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Merge tag 'efi-2020-10-rc5-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc5 (2)

The following bugs are fixed:

* incorrect online help for setenv and env
* description of function efi_mem_carve_out()
* replace printf() by log_err() in stm32mp1_rng driver

A unit test is provided to check that the boot hart id is provided in the
RISC-V device-tree.
2020-09-19 08:35:20 -04:00
Tom Rini
667ab37d58 Merge branch '2020-09-18-assorted-bugfixes'
- SquashFS Coverity fixes
- bitflip fix in the alternate memtest command
- Disable networking on bcmstb boards where we didn't have any network
  drivers enabled.
2020-09-19 08:31:52 -04:00
Maxim Uvarov
8f0ac536d4 efi: change 'env -e -i' usage syntax
'env -e -i' syntax was changed from "," to ":". Account for this also
in the documentation.

Fixes: 2b3fbcb59f ("efi_loader: use ':' as separator for setenv -i")
Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Correct the usage description for setenv -e too.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Heinrich Schuchardt
52a8481827 efi_selftest: check for RISC-V boot-hartid in FDT
On RISC-V check that the /chosen node has a boot-hartid property.

To run the test configure with CONFIG_CMD_BOOTEFI_SELFTEST=y and issue

    setenv efi_selftest device tree
    setenv serial# myserial
    bootefi selftest

If the test succeeds, it reports the boot-hartid, e.g.

    boot-hartid: 1

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Heinrich Schuchardt
18161a8a4e efi_selftest: rework device tree test
Allow specifying the node on which a property is searched.
Test the device tree consistency more rigorously.
Some efi_st_printf() calls have been converted to efi_st_error().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Maxim Uvarov
ffbeafe7e2 efi_memory: refine overlap_only_ram description
Refine text for overlap_only_ram description to
match to what exactly flag does and aling description
with other functions.

Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-18 22:23:58 +02:00
Heinrich Schuchardt
cf0bf89227 rng: stm32mp1: use log() instead of printf()
The logging system provides flexible filtering and enhanced output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-09-18 22:23:58 +02:00
Ralph Siemsen
9989fb18bd cmd: mem: fix range of bitflip test
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch fixes the pointer arithmetic problem.

A second problem arises because u-boot "mtest" command expects the
ending address to be inclusive. When computing (end - start) this
results in missing 1 byte of the requested length. The bitflip test
expects a count rather than an "ending" address. Thus it fails to test
the last word of the requested range. Fixed by using (end - start + 1).

Added Kconfig option to optionally disable the bitflip test, since it
does add significantly to the time taken for "mtest".

Fixes: 8e434cb705 ("cmd: mem: Add bitflip
memory test to alternate mtest")

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-18 16:19:58 -04:00
Thomas Fitzsimmons
e03dd8a05f configs: bcmstb: Disable networking support
Silence the "Driver Model for Ethernet drivers" migration warning for
the bcm7445 and bcm7260 ports, neither of which supports networking yet.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-09-18 16:19:58 -04:00
Joao Marcos Costa
a7dc37d38c fs/squashfs: Fix Coverity Scan defects
Fix control flow issues and null pointer dereferences.

Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
2020-09-18 16:19:58 -04:00
Tom Rini
98f3ee09d0 ----------------------------------------------------------------
Fixes for 2020.10
 -----------------
 
 - Toradex boards
 - mx6qsabrelite: fix env offset
 - esdhc_imx: waiting for clock instead of sleep
 - dyn RAM calibration for entry point i.MX6
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/728274602
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Merge tag 'u-boot-imx-20200918' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

----------------------------------------------------------------
Fixes for 2020.10
-----------------

- Toradex boards
- mx6qsabrelite: fix env offset
- esdhc_imx: waiting for clock instead of sleep
- dyn RAM calibration for entry point i.MX6

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/728274602
2020-09-18 10:42:12 -04:00
Soeren Moch
4516b535bf board: tbs2910: Disable CONFIG_ENV_VARS_UBOOT_CONFIG in defconfig
This is not required for sysboot (we defined fdtfile), let's save a few
bytes in the binary image without these variables.

Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-09-18 10:39:43 +02:00