Commit graph

28401 commits

Author SHA1 Message Date
Tom Rini
a4fb5df214 Merge branch 'microblaze' of git://git.denx.de/u-boot-microblaze 2015-02-09 11:44:46 -05:00
Tom Rini
10918c03a9 Merge git://git.denx.de/u-boot-arc 2015-02-09 10:25:20 -05:00
Michal Simek
7f33899221 microblaze: spl: Add LISTS to linker script
This is required for driver model.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:13:12 +01:00
Michal Simek
ca7d22662e microblaze: spl: Do not call mem_malloc_init and use early alloc
This patch has some parts connected together:
- Use _gd in bss section which is automatically cleared
  Location at SPL_MALLOC_END wasn't cleared at all
- Use MALLOC_F_LEN(early alloc) instead of FULL MALLOC
  (mem_malloc_init is not called at all)
- Simplify malloc and stack init.
  At the end of SPL addr is malloc area and below is stack

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:13:12 +01:00
Michal Simek
405e651d70 microblaze: Add support for CONFIG_SYS_MALLOC_F_LEN
Create space for dm_init where calloc is called
and malloc_base has to be initialized.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:13:12 +01:00
Michal Simek
0510b14b73 microblaze: Do not use CONFIG_SYS_GENERIC_GLOBAL_DATA
Because it is not compatible with DM where
malloc_base has to be available early and init
has to be done in ASM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:13:12 +01:00
Michal Simek
de86765bc4 bdinfo: Show information about fdt blob via bdinfo
Microblaze target supports both OF and !OF cases
and from log is not clear which version is running.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:13:05 +01:00
Michal Simek
7c4dd54255 microblaze: Speedup code copy
Remove one instruction in the loop which speedup
code copying.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:12:46 +01:00
Michal Simek
e945f6dc28 microblaze: Move architecture to use generic board init
Compile code with -fPIC to get GOT. Do not build SPL
with fPIC because it increasing SPL size for nothing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:11:56 +01:00
Michal Simek
4dd097427a microblaze: Enable SPL_NOR support when FLASH_BASE is setup
Simplify SPL NOR init.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:58 +01:00
Michal Simek
9cef20b109 microblaze: Fix gd_t address which is placed at the end of BRAM
Setup gd from ASM to be availalbe for board_init_r.
Setting it up in spl_board_init is too late when
MALLOC is used.
Space for gd is located behind MALLOC area at the end of BRAM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:58 +01:00
Michal Simek
e4a4743e48 microblaze: Remove unused asm label
It is not used at all that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:58 +01:00
Michal Simek
2c7c32fa7f microblaze: Use standard interrupt_init() function
Do not use microblaze specific interrupt init function.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:58 +01:00
Michal Simek
7c6814f184 microblaze: Remove unneeded data section adding from DTB
DTB is added to rodata section:
  [ 2] .rodata           PROGBITS        84c5b60c 05c60c 00c618 00   A
0   0  4
  [ 3] .dtb.init.rodata  PROGBITS        84c67c30 068c30 003c80 00   A
0   0 16
  [ 4] .rela.dyn         RELA            84c6b8b0 06c8b0 000534 0c   A
0   0  4
  [ 5] .data             PROGBITS        84c6bde4 06cde4 001536 00  WA
0   0 16

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:57 +01:00
Michal Simek
070b8e0da2 microblaze: Add debug message about enabling interrupts
Add one more debug message about enabling global interrupts.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:57 +01:00
Michal Simek
e217b0d50d microblaze: Fix coding style
No functional changes just to pass checkpatch.pl.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:57 +01:00
Michal Simek
4c0922f367 microblaze: Remove DEBUG_INT macro and use debug() instead
Do not use specific macros for debugging.
Also remove compilation warning:
w+../arch/microblaze/cpu/interrupts.c: In function 'interrupt_handler':
w+../arch/microblaze/cpu/interrupts.c:153:2: warning: format '%x'
expects argument of type 'unsigned int', but argument 2 has type 'void
(*)(void *)' [-Wformat]
w+../arch/microblaze/cpu/interrupts.c:153:2: warning: format '%x'
expects argument of type 'unsigned int', but argument 4 has type 'void
*' [-Wformat]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:57 +01:00
Michal Simek
5e2fc801ff microblaze: Fix coding style in exception.c
Just coding style cleanup - no functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:56 +01:00
Michal Simek
1c424d2697 microblaze: Show return address from exception
Show also return address from exception which should
suggest where the problem is.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:56 +01:00
Michal Simek
cd8574c0a7 microblaze: Fix stack usage in interrupt handler
Do not save registers below r1 stack pointer because
it is not checked by stack undeflow is not able to detect
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:56 +01:00
Andreas Bießmann
61d7b1bb5f common/board_r: manual relocation for cmd table
This is required for architectures still need manual relocation like avr32, mk68
and others.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2015-02-09 15:09:42 +01:00
Michal Simek
0267ba5d86 common: Move dram_init() declaration to common location
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-02-09 15:08:48 +01:00
Alexey Brodkin
a67ef280f4 arc: build libgcc in U-Boot
This way we may have very limited set of functions implemented so we
save some space.

Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.

For example:
 * we may use little-endian toolchain but build U-Boot for ether
endianess
 * we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports

Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
   text	   data	    bss	    dec	    hex	filename
 222217	  24912	 214820	 461949	  70c7d	u-boot.libgcc-prebuilt

$ arc-linux-size u-boot.libgcc-private
   text	   data	    bss	    dec	    hex	filename
 222361	  24912	 214820	 462093	  70d0d	u-boot.libgcc-private
--->8---

Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
51f4999bc5 arc: move CPU flags selection to the main "config.mk"
As a preparation to ARCv2 port submission we're moving CPU slection
flags to a common location.
Also it will allow us to have more flexible CPU specification, not only
ISA version but CPU family as well checking CONFIG_ARC_CPU_xxx.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
836d2cc2ee arc: move SYS_MONITOR_BASE setup in Konfig
Following SPARK ARC now has SYS_MONITOR_BASE setup via Kconfig.
This makes "include/configs/*.h" cleaner and more flexible.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
a1dbe57d2d arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.h
Common arch_early_init_r() is used in "arc/lib/cpu.c" for all ARC boards
so there's no sense in separate per-board definitions.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
bcba9742ce arc: get rid of useless CONFIG_SKIP_LOWLEVEL_INIT
Currently there's nothing related to really low-level init on ARC so
CONFIG_SKIP_LOWLEVEL_INIT definition makes no sense.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
6eb651ad29 arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.h
There're no other options for ARC except "generic board" so ther's no
point to define CONFIG_SYS_GENERIC_BOARD per board.

We now have it set fo all ARC boards.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
1f9ad44546 arc: add selection of endianess in Kconfig
This change allows to keep board description clean and minimalistic.
This is especially helpful if one board may house different CPUs with
different features.

It is applicable to both FPGA-based boards or those that have CPUs
mounted on interchnagable daughter-boards.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
205e7a7b77 arc: select cache settings via menuconfig
This change allows to keep board description clean and minimalistic.
This is especially helpful if one board may house different CPUs with
different features.

It is applicable to both FPGA-based boards or those that have CPUs
mounted on interchnagable daughter-boards.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
5ff40f3d42 arc: define and use PTAG AUX regs for MMUv3 only
DC_PTAG and IC_PTAG registers only exist in MMUv3.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
812980bdd6 arc: add more flavours of ARC700 series CPU
Now we may select a particular version of ARC700:
 * ARC750D or
 * ARC770D

It allows more flexible (or more fine tuned) configuration of U-Boot.
Before that change we relied on minimal configuration but now we may
use specific features of each CPU.

Moreover allows us to escape manual selection of options that
exist in both CPUs but may have say different version like MMUv2 in
ARC750D vs MMUv3 in ARC770D.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Alexey Brodkin
832325c18d arc: remove CPU hard-coded selection from board description in include/configs
With switch to Kconfig we only need very board-specific descriptions in
include/configs.

CPU selection is performed with either defconfig or manually via
menuconfig.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-02-09 16:41:20 +03:00
Igor Guryanov
f958a91fa5 arc: memcmp - fix zero-delay loop utilization
It's prohibited to put branch instruction in the very end of zero-delay
loop. On execution this causes "Illegal instruction" exception.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
2015-02-09 16:41:20 +03:00
Tom Rini
e35c6c7978 kwbimage: Make the Makefile pass in CONFIG_SYS_SPI_U_BOOT_OFFS
We can't use config.h directly as some platforms include headers that
aren't safe to use in normal Linux userland.

Signed-off-by: Tom Rini <trini@ti.com>
2015-02-07 07:03:00 -05:00
Tom Rini
5c123f5fbf Merge git://git.denx.de/u-boot-marvell 2015-02-06 12:02:59 -05:00
Stefan Roese
68102b81e8 arm: mvebu: maxbcm: Fix compilation warning and add Spansion SPI NOR support
This patch fixes the following compilation warning for maxbcm:

Building maxbcm board...
   text    data     bss     dec     hex filename
 160075    6596   38240  204911   3206f ./u-boot
board/maxbcm/maxbcm.c: In function 'reset_phy':
board/maxbcm/maxbcm.c:68:6: warning: unused variable 'reg' [-Wunused-variable]
  u16 reg;
      ^
board/maxbcm/maxbcm.c:66:6: warning: unused variable 'devadr' [-Wunused-variable]
  u16 devadr = CONFIG_PHY_BASE_ADDR;
      ^

Additionally support Spansion SPI NOR flash is added. With larger SPI device
support via the CONFIG_SPI_FLASH_BAR define.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:25:08 +01:00
Stefan Roese
f8d25d7466 arm: mvebu: drivers/ddr: Add DDR3 driver with training code from Marvell bin_hdr
This patch adds the DDR3 setup and training code taken from the Marvell
U-Boot repository. This code used to be included as a binary (bin_hdr)
into the AXP boot image. Not linked with the main U-Boot. With this code
addition and the following serdes/PHY setup code, the Armada-XP support
in mainline U-Boot is finally self-contained. So the complete image
for booting can be built from mainline U-Boot. Without any additional
external inclusion. Hopefully other MVEBU SoC's will follow here.

Support for some SoC's has been removed in this version. This is:

MV_MSYS:
The code referred to by the MV_MSYS define is currently unused. And its
not really planned to support this in mainline. So lets remove it to
make the code clearer and increase the readability.

MV88F68XX (A38x):
The code referred to by the MV88F68XX define (A38x) is currently unused.
And its partial and not sufficient for this device in this stage.
So lets remove it to make the code clearer and increase the readability.

MV88F66XX (ALP):
The code referred to by the MV88F66XX define is currently unused. And its
not really planned to support this in mainline. So lets remove it to
make the code clearer and increase the readability.

MV88F78X60_Z1:
The code referred to by the MV88F78X60_Z1 define is currently unused. As the
Z1 revision of the AXP is not supported in mainline anymore.
So lets remove it to make the code clearer and increase the readability.

Remove support for Z1 & A0 AXP revisions (steppings). The current stepping
is B0 and this is the only one that is actively supported in this code
version.

Tested on AXP using a SPD DIMM setup on the Marvell DB-MV784MP-GP board and
on a custom fixed DDR configuration board (maxbcm).

Note:
This code has undergone many hours of coding-style cleanup and refactoring.
It still is not checkpatch clean though, I'm afraid. As the factoring of the
code has so many levels of indentation that many lines are longer than 80
chars. This might be some task to tackly later on.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:25:03 +01:00
Stefan Roese
2e19cc316f arm: mvebu: Add Serdes PHY config code
This code is ported from the Marvell bin_hdr code into mainline
SPL U-Boot. It needs to be executed very early so that the devices
connected to the serdes PHY are configured correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:59 +01:00
Stefan Roese
b0f80b913f arm: armada-xp: Add SPL support used to include the DDR training code
This patch adds SPL support to the Marvell Armada-XP. With this addition
the bin_hdr integration is not needed any more. The SPL will first
initialize the serdes/PHY and the call the DDR setup and training code
now integrated into mainline U-Boot.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:56 +01:00
Stefan Roese
0cf47862bf scripts/Makefile.spl: Add MVEBU DDR code to SPL
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:54 +01:00
Stefan Roese
5632e580c6 tools: kwbimage: Support u-boot.img padding to CONFIG_SYS_SPI_U_BOOT_OFFS
This is used on the AXP boards, to pad u-boot.img to the desired offset in
SPI flash (only this boot target supported right now). This offset is
used by the SPL then to load u-boot.img into SDRAM and execute it there.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:51 +01:00
Stefan Roese
a90ffb5632 Makefile: Add another kwb build target used on Marvell Armada-XP (AXP)
This build target now includes the SPL binary as the bin_hdr into the
kwb image. Its used on the AXP port with the mainlined DDR training code.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:48 +01:00
Stefan Roese
2554167cc1 arm: db-mv784mp-gp: Enable SPL to include DDR training code into U-Boot
This patch adds SPL support to the db-mv784mp-gp eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:46 +01:00
Stefan Roese
e7778ec153 arm: maxbcm: Enable SPL to include DDR training code into U-Boot
This patch adds SPL support to the maxbcm MV78460 based board. Including
the fixed DDR configuratrion needed for the DDR training code. And the
the serdes PHY init code.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:43 +01:00
Stefan Roese
2f20aa82f4 arm: mvebu: Placeholder bin_hdr file can now be removed
With this patchset the Marvell bin_hdr (DDR training) code is intergrated
into mainline U-Boot. We can remove the placeholder file again, which was
only introduced to make U-Boot compile and link again.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:41 +01:00
Stefan Roese
1e0b5984f4 arm: armada-xp: Change built target to include the SPL binary as bin_hdr
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:36 +01:00
DrEagle
9a5e0a7d5b kirkwood: sheevaplug: add FDT support
LIBFDT feature is required to support new kernels.

Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:34 +01:00
DrEagle
7f30f4b5b2 kirkwood: sheevaplug: fix multiple defines
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:24:32 +01:00
DrEagle
815451e0d1 kirkwood: sheevaplug: fix style
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06 17:23:42 +01:00