Commit graph

43977 commits

Author SHA1 Message Date
Simon Glass
5644aeea8e samsung: nand: Drop s3c2410_nand driver
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:31 -04:00
Simon Glass
7a7530afb8 samsung: usb: Drop ohci-s3c24xx driver
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:30 -04:00
Simon Glass
ebf925051f samsung: mmc: Drop s3c_sdi driver
This is no-longer used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-06-05 11:02:30 -04:00
Simon Glass
0d8c939414 samsung: Drop s3c24x0 arch-specific code
This is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:29 -04:00
Simon Glass
2e5184dd5f gpio: samsung: Drop s3c2440_gpio driver
This is no longer used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:29 -04:00
Simon Glass
12d738ae4c api: Add a header for api_init()
Put this in its own header instead of using common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:29 -04:00
Simon Glass
4baf23e0be common: Move get_OPB_freq() and get_PCI_freq() to PPC header
These should not be in common.h. Move the to an arch-specific header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:28 -04:00
Simon Glass
58a8ec4cc0 common: Move pcie_setup_hoses() to PPC header
Only one board needs this definition. Move it to an arch-specific header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:28 -04:00
Simon Glass
787ea6e453 common: Drop pci_master_init()
This should not be in common.h. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:27 -04:00
Simon Glass
4fcc6a7b89 common: Move pci_target_init() to PPC header
Only one boards needs this definition. Move it to an arch-specific header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:27 -04:00
Simon Glass
a55132bd6c common: Drop pci_pre_init() and is_pci_host()
These should not be in common.h. They are used in some legacy PowerPC
code. Just drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:26 -04:00
Simon Glass
f66f88f643 common: Drop inclusion of pci.h
This should not be in common.h - remove it and update the only file that
needs it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:26 -04:00
Tom Rini
8bb687fdc1 t81xx: Migrate TI81XX/TI816X/TI814X symbols to Kconfig
The symbol CONFIG_TI81XX is used for the parts that are common to the
TI816x and TI814x SoCs and are not part of CONFIG_ARCH_OMAP2PLUS nor
CONFIG_AM33XX.  It however has so few uses that we can just modify the
code to check for both and drop the symbol. The symbols CONFIG_TI816X
and CONFIG_TI814X are for the repective SoCs.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:25 -04:00
Tom Rini
1d7f6ad2bf ti816x: Modernize the defconfig
- Switch to using <configs/ti_armv7_omap.h> and family.  This lets us
  drop lots of custom defines.
- Ensure that our default environment uses DEFAULT_LINUX_BOOT_ENV so
  that Linux will boot correctly.
- Enable CONFIG_DISTRO_DEFAULTS
- Switch to using CONFIG_OF_CONTROL
- Various other cleanups to match other SoCs in the family line.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:25 -04:00
Tom Rini
708ca4daf9 ti816x: Import dts files from Linux Kernel v4.11
This brings in the required dts/dtsi files for the TI8168-EVM from the
Linux Kernel v4.11 release.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:25 -04:00
Tom Rini
77e99277a2 ti816x: Enable NAND
The TI8168-EVM comes with NAND on board.  Enable it and move environment
over there.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:24 -04:00
Tom Rini
dab2fc2863 ti816x_evm: Disable CONFIG_USE_PRIVATE_LIBGCC
On this platform, we can trace a general failure to boot to enabling /
disabling this option.  When this is enabled, we go off into the
weeds during SPL and are unable to talk with the SD card and
mmc_initialize() fails.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:24 -04:00
Tom Rini
8627733941 ti816x: Rework DDR initialization sequence
The ti816x/am389x SoC is the first generation in what U-Boot calls the
"am33xx" family.  In the first generation of this family the DDR
initialization sequence is quite different from all of the subsequent
generations.  Whereas with ti814x (second generation) we can easily work
the minor differenced between that and am33xx (third generation), our
attempts to do this for ti816x weren't sufficient.  Rather than add a
large amount of #ifdef logic to make this different sequence work we add
a new file, ti816x_emif4.c to handle the various required undocumented
register writes and sequence and leverage what we can from
arch/arm/mach-omap2/am33xx/ddr.c still.  As DDR2 has similar problems
today but I am unable to test it, we drop the DDR2 defines from the code
rather than imply that it works by leaving it.  We also remove a bunch
of other untested code about changing the speed the DDR runs at.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:23 -04:00
Tom Rini
ffb5656862 armv7: Mark the default lowlevel_init function as weak
Rather than have a long and if check in the Makefile, mark the default
lowlevel_init function as weak (as we do on armv8) so that SoCs can
override it if needed, and it will still be discarded if unused.
Provide a weak s_init as well to allow for this to link and be
discarded.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 11:02:23 -04:00
Anna, Suman
7c0c6be52c configs: davinci: omapl138_lcdk: add random eth address support
Any TFTP or DHCP boot on the Davinci OMAP-L138 LCDK board requires
that the 'ethaddr' variable be defined. There are no e-fuses to store
the ethernet mac address for this platform, and neither is a MAC
address reserved in any format. So enable random MAC address support
so that networking boot can be supported.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-06-05 11:02:23 -04:00
Vagrant Cascadian
e320d37766 Enable PXE boot on meson-gxbb.
Enable distro_bootcmd PXE functions on meson-gxbb systems.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 11:02:22 -04:00
Tom Rini
f0a1ad4698 Merge git://git.denx.de/u-boot-x86 2017-06-04 22:29:33 -04:00
Bin Meng
d7f7ba36b2 x86: fsp: Remove the call to set up internal uart in fsp_init()
First of all, it's inappropriate to call setup_internal_uart() in a
generic API fsp_init(), as CONFIG_INTERNAL_UART is an option that
is only available on BayTrail platform. Secondly even for BayTrail,
there is no need to call setup_internal_uart() at all, as Intel FSP
will do this for us.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
37d1023264 x86: baytrail: Fix boot hang with a debug build
It was observed that when -DDEBUG is used to generate a debug build,
U-Boot does not boot on MinnowMax board. A workaround is to disable
CONFIG_DEBUG_UART. The real issue is that in order to have the debug
uart to work, BayTrail SoC needs to be configured so that its internal
uart is available to be used as the debug uart.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
f8f291b096 x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer
At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
for these options and change the property from a boolean type to
an integer type, and change their names to explicitly indicate what
the property is really for.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
5e74e5a682 x86: baytrail: Use macros instead of magic numbers for FSP settings
Introduce various meaningful macros for FSP settings and switch over
to use them instead of magic numbers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
6702488cfa x86: baytrail: Remove "serial-debug-port-*" settings
"serial-debug-port-address" and "serial-debug-port-type" settings
are actually reserved in the FSP UPD data structure. Remove them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Bin Meng
455a5a8086 x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1
The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per
FSP default settings. 0 is not valid.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 08:55:22 +08:00
Tom Rini
dd31be21bf Merge git://git.denx.de/u-boot-fdt 2017-06-04 13:13:29 -04:00
Tom Rini
5cafcbab58 Merge git://git.denx.de/u-boot-net 2017-06-03 18:05:28 -04:00
Tom Rini
541f538f4c Merge git://git.denx.de/u-boot-fsl-qoriq 2017-06-03 18:05:04 -04:00
Tom Rini
b07d044d5b Merge git://git.denx.de/u-boot-sunxi 2017-06-03 18:04:54 -04:00
Tom Rini
91d27a17c6 Kconfig: Migrate FS_FAT / FAT_WRITE
Now that these symbols are in Kconfig, migrate all users.  Use imply on
a number of platforms that default to having this enabled.  As part of
this we must migrate some straglers for CMD_FAT and DOS_PARTITION.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-03 17:55:34 -04:00
Sekhar Nori
4a72d8dcc9 board: ti: enable support for writing to fat partition
Enable support for writing to FAT partitions on
TI's boards.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-03 17:55:19 -04:00
Sekhar Nori
0dbb9a93c3 config_fallbacks: add additional fallbacks for fat filesystem
Add fallbacks needed to keep all boards building
while they are migrated to use Kconfig symbols
instead of defines in <board>_config.h files for
FAT filesystem.

These should eventually go away once Kconfig select
or imply statements are put in place and duplicated
defines in <board>_config.h removed.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[trini: Update logic since CMD_FAT / CONFIG_SPL_FAT_SUPPORT are
        selecting FS_FAT]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-03 17:55:18 -04:00
Sekhar Nori
391b037ee6 configs: k2g_evm: make sure config fallbacks take effect
Since config fallbacks contained in include/config_fallbacks.h
come into k2g_evm.h file through ti_armv7_keystone2.h, it should
be the last file included.

Without this, #define of FAT_WRITE when environment is in FAT
does not happen as the environment location is decided later
in the file.

Similar issues can come with other config fallbacks implemented.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-03 17:55:18 -04:00
Sekhar Nori
ae8733910b configs: k2*_evm: let each board decide env location
Not all TI Keystone2 EVMs want environment in NAND flash.
K2G EVM which has an MMC/SD slot, keep environment in a
FAT partition on SD card.

Since ti_armv7_keystone2.h defines environment is in NAND,
boards which do not follow that have to #undef'ine that
configuration. This leads to ugly ordering issues around
where exactly the include of ti_armv7_keystone2.h can come
in within the k2*_evm.h files.

Move environment location to config file of each board.
This should make it easy to change it for any one board
without affecting all other boards.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-03 17:55:18 -04:00
Sekhar Nori
eedfb89e61 fs: fat: add kbuild configuration support
Add Kconfig symbols for various configurations
supported by FAT filesystem support code.

CONFIG_SUPPORT_VFAT has been left out since its
force enabled in include/fat.h and probably
should get removed at some point.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
[trini: add select FS_FAT for CMD_FAT and SPL_FAT_SUPPORT]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-03 17:55:16 -04:00
Paul Burton
2303bff7d5 net: pch_gbe: Add cache maintenance
On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is
present. When there is no IOCU we need to writeback or invalidate the
data caches at appropriate points. Perform this cache maintenance in
the pch_gbe driver which is used on the MIPS Boston development board.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Paul Burton
52e727c8eb net: pch_gbe: CPU accessible addresses are virtual
Use the virt_to_bus & bus_to_virt functions rather than phys_to_bus &
bus_to_phys, since the addresses accessed by the CPU will be virtual
rather than physical. On MIPS physical & virtual addresses differ as we
use virtual addresses in kseg0, and attempting to use physical addresses
directly caused problems as they're in the user segment which would be
mapped via the uninitialised TLB.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Paul Burton
db225f1131 net: pch_gbe: Fix rx descriptor buffer addresses
The loop to set up buffer addresses in rx descriptors always operated on
descriptor 0, rather than on each descriptor sequentially. Fix this in
order to setup correct buffer addresses for each descriptor.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Paul Burton
43979cbacb net: pch_gbe: Reset during probe
Using the EG20T gigabit ethernet controller on the MIPS Boston board, we
find that we have to reset the controller in order for the RGMII link to
the PHY to become functional. Without doing so we constantly time out in
pch_gbe_mdio_ready.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Siva Durga Prasad Paladugu
f0b94c4bcd net: zynq_gem: Dont flush dummy descriptors
Dont flush dummy descriptors as they are already
allocated from a region with dcache off. Tested
this on Zynq(zc702) and ZynqMP(zcu102) boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Siva Durga Prasad Paladugu
dea004e41a net: zynq_gem: Use wait_for_bit with non breakable
Use wait_for_bit to be non breakable as using it with
breakable causes issue of un interruptible auto negotiation.
This is due to the ctrlc pressed will taken for wait_for_bit()
abort during phy_read() and hence not coming out of
auto negotiation.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:20 -05:00
Phil Edworthy
68e6ecadc5 net: phy: marvell 88e151x: Fix handling of RGMII interface types
The 88E1518 code is programming the wrong registers for rgmii-id,
rgmii-txid and rgmii-rxid interfaces.

Since the PHY defaults to rgmii-id, it would appear that the code
was previously only used with sgmii and rgmii-id interfaces.

Tested on 88E1512 PHY in rgmii-id mode which is from the same family
as 88E1518.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00
xypron.glpk@gmx.de
c08248d601 net: core: avoid possible NULL pointer dereference
Checking if dev is NULL after dereferencing it does not make sense.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00
Sekhar Nori
96d1d84c79 drivers: net: cpsw: abort init() on aneg timeout
Abort CPSW driver init when auto-negotiation of link
times out. Currently, the code ignores return status
of phy_startup(), and goes ahead with network operation
(like DHCP) even though the link may be down.

Instead, abort init process if link is down or if there
is another error, so phy_startup() can easily be retried
again. This also helps quick fallback to next network interface
(like USB RNDIS) without inordinate delay.

Tested on AM571x IDK and AM335x BeagleBone black.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00
Wenyou Yang
6de046eaa7 net: macb: Fix GMAC not work when enable DM_ETH
Always search the PHY to determine the macb->phy_addr before using
the PHY to fix "No PHY present" error.

Fix the wrong test of the GMAC's phy interface mode, it should be
PHY_INTERFACE_MODE_RGMII.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00
Stefan Chulski
e09d0c8314 net: mvpp2.c: Enable 10G support for port 0 (SFI)
This patch fixes some remaining issues in the mvpp2 driver for the 10GB
support on port 0. These changes are:

- Incorrect PCS configuration
- Skip PHY configuration when no PHY is connected
- Skip GMAC configurations if 10G SFI mode set

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:19 -05:00
Madalin Bucur
cc1aa218f5 armv8/ls1046a: RGMII PHY requires internal delay on Tx
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-02 14:44:18 -05:00