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ti816x: Enable NAND
The TI8168-EVM comes with NAND on board. Enable it and move environment over there. Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
dab2fc2863
commit
77e99277a2
3 changed files with 62 additions and 4 deletions
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@ -25,11 +25,13 @@ DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
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#if defined(CONFIG_NAND)
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gpmc_init();
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#endif
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return 0;
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}
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#ifdef CONFIG_SPL_BUILD
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static struct module_pin_mux mmc_pin_mux[] = {
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{ OFFSET(pincntl157), PULLDOWN_EN | PULLUDDIS | MODE(0x0) },
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{ OFFSET(pincntl158), PULLDOWN_EN | PULLUDEN | MODE(0x0) },
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@ -7,7 +7,9 @@ CONFIG_TARGET_TI816X_EVM=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_LIBDISK_SUPPORT=y
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CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_SPL_FAT_SUPPORT=y
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CONFIG_SYS_EXTRA_OPTIONS="NAND"
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CONFIG_BOOTDELAY=3
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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CONFIG_VERSION_VARIABLE=y
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@ -68,8 +68,6 @@
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#define CONFIG_SYS_TIMERBASE 0x4802E000
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#undef CONFIG_NAND_OMAP_GPMC
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/*
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* NS16550 Configuration
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*/
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@ -86,10 +84,66 @@
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#define CONFIG_SERIAL3
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_ENV_IS_NOWHERE
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/*
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* GPMC NAND block. We support 1 device and the physical address to
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* access CS0 at is 0x8000000.
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*/
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#define CONFIG_SYS_NAND_BASE 0x8000000
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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/* NAND: SPL related configs */
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SPL_NAND_AM33XX_BCH
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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/* NAND: device related configs */
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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/* NAND: driver related configs */
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_NAND_OMAP_GPMC_PREFETCH
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#define CONFIG_NAND_OMAP_ELM
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
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10, 11, 12, 13, 14, 15, 16, 17, \
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18, 19, 20, 21, 22, 23, 24, 25, \
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26, 27, 28, 29, 30, 31, 32, 33, \
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34, 35, 36, 37, 38, 39, 40, 41, \
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42, 43, 44, 45, 46, 47, 48, 49, \
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50, 51, 52, 53, 54, 55, 56, 57, }
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 14
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
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#define MTDIDS_DEFAULT "nand0=nand.0"
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#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
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"128k(NAND.SPL)," \
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"128k(NAND.SPL.backup1)," \
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"128k(NAND.SPL.backup2)," \
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"128k(NAND.SPL.backup3)," \
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"256k(NAND.u-boot-spl-os)," \
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"1m(NAND.u-boot)," \
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"128k(NAND.u-boot-env)," \
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"128k(NAND.u-boot-env.backup1)," \
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"8m(NAND.kernel)," \
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"-(NAND.file-system)"
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0x001c0000
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#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
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#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
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/* SPL */
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/* Defines for SPL */
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#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x40400000
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#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
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